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Searched refs:rsr (Results 1 – 25 of 32) sorted by relevance

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/external/u-boot/arch/xtensa/include/asm/arch-de212/
Dtie-asm.h60 rsr.ACCLO \at1 // MAC16 option
62 rsr.ACCHI \at1 // MAC16 option
72 rsr.SCOMPARE1 \at1 // conditional store option
74 rsr.M0 \at1 // MAC16 option
76 rsr.M1 \at1 // MAC16 option
78 rsr.M2 \at1 // MAC16 option
80 rsr.M3 \at1 // MAC16 option
/external/u-boot/arch/xtensa/include/asm/arch-dc232b/
Dtie-asm.h39 rsr \at1, ACCLO // MAC16 accumulator
40 rsr \at2, ACCHI
47 rsr \at1, M0 // MAC16 registers
48 rsr \at2, M1
51 rsr \at1, M2
52 rsr \at2, M3
59 rsr \at1, SCOMPARE1 // conditional store option
/external/u-boot/arch/xtensa/include/asm/arch-dc233c/
Dtie-asm.h71 rsr \at1, ACCLO // MAC16 option
73 rsr \at1, ACCHI // MAC16 option
83 rsr \at1, M0 // MAC16 option
85 rsr \at1, M1 // MAC16 option
87 rsr \at1, M2 // MAC16 option
89 rsr \at1, M3 // MAC16 option
91 rsr \at1, SCOMPARE1 // conditional store option
/external/u-boot/arch/xtensa/cpu/
Dstart.S302 rsr a0, windowbase
375 rsr a2, EXCCAUSE # find handler
395 rsr a3, EXCSAVE1
417 rsr a2, WINDOWSTART
421 rsr a2, SAR
422 rsr a3, EPC1
423 rsr a4, EXCVADDR
430 rsr a3, LBEG
433 rsr a3, LEND
441 rsr a2, EXCCAUSE
[all …]
/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dcpu_init.c146 gd->arch.reset_status = __raw_readl(&im->reset.rsr); in cpu_init_f()
147 __raw_writel(~(RSR_RES), &im->reset.rsr); in cpu_init_f()
416 ulong rsr = gd->arch.reset_status; in prt_83xx_rsr() local
424 if (rsr & bits[i].mask) { in prt_83xx_rsr()
431 print_83xx_arb_event(rsr & RSR_BMRS); in prt_83xx_rsr()
/external/u-boot/drivers/sysreset/
Dsysreset_mpc83xx.c149 ulong rsr = gd->arch.reset_status; in mpc83xx_sysreset_get_status() local
166 if (rsr & bits[i].mask) { in mpc83xx_sysreset_get_status()
189 res = print_83xx_arb_event(rsr & RSR_BMRS, buf, size); in mpc83xx_sysreset_get_status()
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun50i_h6.c531 if ((readl(&mctl_phy->dx[0].rsr[0]) & 0x3) == 2 && in mctl_channel_init()
532 (readl(&mctl_phy->dx[1].rsr[0]) & 0x3) == 2) { in mctl_channel_init()
535 if ((readl(&mctl_phy->dx[2].rsr[0]) & 0x3) != 2 || in mctl_channel_init()
536 (readl(&mctl_phy->dx[3].rsr[0]) & 0x3) != 2) in mctl_channel_init()
549 if ((readl(&mctl_phy->dx[0].rsr[0]) & 0x3) == 0 && in mctl_channel_init()
550 (readl(&mctl_phy->dx[1].rsr[0]) & 0x3) == 0) { in mctl_channel_init()
566 debug("DRAM PHY DX%dRSR0 = %x\n", i, readl(&mctl_phy->dx[i].rsr[0])); in mctl_channel_init()
/external/u-boot/drivers/net/
Dat91_emac.c361 writel(readl(&emac->rsr) & in at91emac_init()
363 &emac->rsr); in at91emac_init()
436 writel(readl(&emac->rsr) | AT91_EMAC_RSR_REC, in at91emac_recv()
437 &emac->rsr); in at91emac_recv()
Dne2000_base.c378 __maybe_unused u8 rsr; in dp83902a_RxEvent() local
384 DP_IN(base, DP_RSR, rsr); in dp83902a_RxEvent()
/external/clang/test/CodeGen/
Dbuiltins-arm64.c52 unsigned rsr() { in rsr() function
Dbuiltins-arm.c209 unsigned rsr() { in rsr() function
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopVectorize/
Dif-pred-not-when-safe.ll61 %rsr = srem i32 %psr, 17
72 %ysr.0 = phi i32 [ %rsr, %if.then ], [ %psr, %for.body ]
Dif-pred-non-void.ll95 %rsr = srem i32 %psr, %lsr
102 %ysr.0 = phi i32 [ %rsr, %if.then ], [ %psr, %for.body ]
/external/u-boot/arch/arm/mach-at91/include/mach/
Dat91_emac.h20 u32 rsr; member
/external/u-boot/arch/m68k/include/asm/
Dimmap_5307.h21 u8 rsr; member
Dimmap_520x.h83 u8 rsr; member
Dimmap_5235.h197 u8 rsr; /* 0x02 */ member
Dimmap_5227x.h66 u8 rsr; member
Dimmap_547x_8x.h62 u32 rsr; /* 0x44 */ member
Dimmap_5301x.h141 u8 rsr; member
Dimmap_5445x.h83 u8 rsr; member
Dimmap_5275.h347 u8 rsr; member
Dimmap_5441x.h99 u8 rsr; member
Dimmap_5329.h141 u8 rsr; member
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Ddram_sun50i_h6.h264 u32 rsr[4]; /* 0xd0 */ member

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