| /external/arm-trusted-firmware/plat/arm/common/aarch64/ |
| D | execution_state_switch.c | 44 u_register_t spsr, pc, scr, sctlr; in arm_execution_state_switch() local
62 spsr = read_ctx_reg(el3_ctx, CTX_SPSR_EL3); in arm_execution_state_switch()
63 caller_64 = (GET_RW(spsr) == MODE_RW_64); in arm_execution_state_switch()
94 from_el2 = caller_64 ? (GET_EL(spsr) == MODE_EL2) : in arm_execution_state_switch()
95 (GET_M32(spsr) == MODE32_hyp); in arm_execution_state_switch()
130 spsr = SPSR_MODE32((u_register_t) el, in arm_execution_state_switch()
140 spsr = SPSR_64((u_register_t) el, MODE_SP_ELX, in arm_execution_state_switch()
154 ep.spsr = (uint32_t) spsr; in arm_execution_state_switch()
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| /external/arm-trusted-firmware/plat/hisilicon/poplar/ |
| D | bl2_plat_setup.c | 62 uint32_t spsr; in poplar_get_spsr_for_bl33_entry() local
75 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
76 return spsr; in poplar_get_spsr_for_bl33_entry()
81 unsigned int hyp_status, mode, spsr; in poplar_get_spsr_for_bl33_entry() local
92 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in poplar_get_spsr_for_bl33_entry()
94 return spsr; in poplar_get_spsr_for_bl33_entry()
133 bl_mem_params->ep_info.spsr = poplar_get_spsr_for_bl32_entry(); in poplar_bl2_handle_post_image_load()
140 bl_mem_params->ep_info.spsr = poplar_get_spsr_for_bl33_entry(); in poplar_bl2_handle_post_image_load()
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| /external/arm-trusted-firmware/services/spd/trusty/ |
| D | trusty.c | 441 ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in trusty_setup()
444 ep_info->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in trusty_setup()
470 uint32_t spsr; in trusty_setup() local
477 spsr = ns_ep_info->spsr; in trusty_setup()
478 if (GET_RW(spsr) == MODE_RW_64 && GET_EL(spsr) == MODE_EL2) { in trusty_setup()
479 spsr &= ~(MODE_EL_MASK << MODE_EL_SHIFT); in trusty_setup()
480 spsr |= MODE_EL1 << MODE_EL_SHIFT; in trusty_setup()
482 if (GET_RW(spsr) == MODE_RW_32 && GET_M32(spsr) == MODE32_hyp) { in trusty_setup()
483 spsr &= ~(MODE32_MASK << MODE32_SHIFT); in trusty_setup()
484 spsr |= MODE32_svc << MODE32_SHIFT; in trusty_setup()
[all …]
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| /external/arm-trusted-firmware/plat/layerscape/common/ |
| D | ls_common.c | 150 uint32_t spsr; in ls_get_spsr_for_bl33_entry() local
160 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in ls_get_spsr_for_bl33_entry()
161 return spsr; in ls_get_spsr_for_bl33_entry()
169 unsigned int hyp_status, mode, spsr; in ls_get_spsr_for_bl33_entry() local
180 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in ls_get_spsr_for_bl33_entry()
182 return spsr; in ls_get_spsr_for_bl33_entry()
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| D | ls_bl2_setup.c | 79 bl_mem_params->ep_info.spsr = ls_get_spsr_for_bl32_entry(); in ls_bl2_handle_post_image_load()
86 bl_mem_params->ep_info.spsr = ls_get_spsr_for_bl33_entry(); in ls_bl2_handle_post_image_load()
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| /external/arm-trusted-firmware/plat/arm/common/ |
| D | arm_common.c | 66 uint32_t spsr; in arm_get_spsr_for_bl33_entry() local
76 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
77 return spsr; in arm_get_spsr_for_bl33_entry()
85 unsigned int hyp_status, mode, spsr; in arm_get_spsr_for_bl33_entry() local
96 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in arm_get_spsr_for_bl33_entry()
98 return spsr; in arm_get_spsr_for_bl33_entry()
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| /external/arm-trusted-firmware/lib/el3_runtime/aarch64/ |
| D | context_mgmt.c | 102 if (GET_RW(ep->spsr) == MODE_RW_64) in cm_setup_context()
178 if (((GET_RW(ep->spsr) == MODE_RW_64) && (GET_EL(ep->spsr) == MODE_EL2)) in cm_setup_context()
179 || ((GET_RW(ep->spsr) != MODE_RW_64) in cm_setup_context()
180 && (GET_M32(ep->spsr) == MODE32_hyp))) { in cm_setup_context()
185 if ((security_state == SECURE) && (GET_EL(ep->spsr) == MODE_EL2)) { in cm_setup_context()
186 if (GET_RW(ep->spsr) != MODE_RW_64) { in cm_setup_context()
206 if (GET_RW(ep->spsr) == MODE_RW_64) in cm_setup_context()
258 write_ctx_reg(state, CTX_SPSR_EL3, ep->spsr); in cm_setup_context()
596 uintptr_t entrypoint, uint32_t spsr) in cm_set_elr_spsr_el3() argument
607 write_ctx_reg(state, CTX_SPSR_EL3, spsr); in cm_set_elr_spsr_el3()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hikey_bl2_setup.c | 84 uint32_t spsr; in hikey_get_spsr_for_bl33_entry() local
94 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey_get_spsr_for_bl33_entry()
95 return spsr; in hikey_get_spsr_for_bl33_entry()
100 unsigned int hyp_status, mode, spsr; in hikey_get_spsr_for_bl33_entry() local
111 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey_get_spsr_for_bl33_entry()
113 return spsr; in hikey_get_spsr_for_bl33_entry()
149 bl_mem_params->ep_info.spsr = hikey_get_spsr_for_bl32_entry(); in hikey_bl2_handle_post_image_load()
156 bl_mem_params->ep_info.spsr = hikey_get_spsr_for_bl33_entry(); in hikey_bl2_handle_post_image_load()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_bl2_setup.c | 176 uint32_t spsr; in hikey960_get_spsr_for_bl33_entry() local
186 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in hikey960_get_spsr_for_bl33_entry()
187 return spsr; in hikey960_get_spsr_for_bl33_entry()
192 unsigned int hyp_status, mode, spsr; in hikey960_get_spsr_for_bl33_entry() local
203 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in hikey960_get_spsr_for_bl33_entry()
205 return spsr; in hikey960_get_spsr_for_bl33_entry()
236 bl_mem_params->ep_info.spsr = hikey960_get_spsr_for_bl32_entry(); in hikey960_bl2_handle_post_image_load()
243 bl_mem_params->ep_info.spsr = hikey960_get_spsr_for_bl33_entry(); in hikey960_bl2_handle_post_image_load()
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| /external/arm-trusted-firmware/plat/qemu/common/ |
| D | qemu_bl2_setup.c | 122 uint32_t spsr; in qemu_get_spsr_for_bl33_entry() local
134 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in qemu_get_spsr_for_bl33_entry()
136 spsr = SPSR_MODE32(MODE32_svc, in qemu_get_spsr_for_bl33_entry()
140 return spsr; in qemu_get_spsr_for_bl33_entry()
184 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl32_entry(); in qemu_bl2_handle_post_image_load()
212 bl_mem_params->ep_info.spsr = qemu_get_spsr_for_bl33_entry(); in qemu_bl2_handle_post_image_load()
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| /external/arm-trusted-firmware/services/spd/tlkd/ |
| D | tlkd_common.c | 85 uint32_t ep_attr, spsr; in tlkd_init_tlk_ep_state() local
98 spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in tlkd_init_tlk_ep_state()
100 spsr = SPSR_MODE32(MODE32_svc, in tlkd_init_tlk_ep_state()
112 tlk_entry_point->spsr = spsr; in tlkd_init_tlk_ep_state()
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| /external/arm-trusted-firmware/plat/imx/imx8m/imx8mm/ |
| D | imx8mm_bl31_setup.c | 65 uint32_t spsr; in get_spsr_for_bl33_entry() local
73 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
74 return spsr; in get_spsr_for_bl33_entry()
124 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
132 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/ti/k3/common/ |
| D | k3_bl31_setup.c | 45 uint32_t spsr; in k3_get_spsr_for_bl33_entry() local
53 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in k3_get_spsr_for_bl33_entry()
54 return spsr; in k3_get_spsr_for_bl33_entry()
74 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in bl31_early_platform_setup2()
82 bl33_image_ep_info.spsr = k3_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/socionext/synquacer/ |
| D | sq_bl31_setup.c | 52 uint32_t spsr; in sq_get_spsr_for_bl33_entry() local
60 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in sq_get_spsr_for_bl33_entry()
61 return spsr; in sq_get_spsr_for_bl33_entry()
100 bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry(); in bl31_early_platform_setup2()
116 bl33_image_ep_info.spsr = sq_get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | smccc_macros.S | 36 mrs r2, spsr
40 mrs r2, spsr
44 mrs r2, spsr
48 mrs r2, spsr
52 mrs r2, spsr
57 mrs r2, spsr
82 mrs r12, spsr
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| /external/arm-trusted-firmware/plat/intel/soc/common/aarch64/ |
| D | platform_common.c | 44 uint32_t spsr; in socfpga_get_spsr_for_bl33_entry() local
57 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in socfpga_get_spsr_for_bl33_entry()
58 return spsr; in socfpga_get_spsr_for_bl33_entry()
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| /external/arm-trusted-firmware/plat/imx/imx8m/imx8mq/ |
| D | imx8mq_bl31_setup.c | 93 uint32_t spsr; in get_spsr_for_bl33_entry() local
101 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
102 return spsr; in get_spsr_for_bl33_entry()
146 bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); in bl31_early_platform_setup2()
154 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
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| /external/arm-trusted-firmware/plat/intel/soc/stratix10/ |
| D | bl2_plat_setup.c | 137 uint32_t spsr; in get_spsr_for_bl33_entry() local
150 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
151 return spsr; in get_spsr_for_bl33_entry()
162 bl_mem_params->ep_info.spsr = get_spsr_for_bl33_entry(); in bl2_plat_handle_post_image_load()
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| /external/arm-trusted-firmware/plat/intel/soc/agilex/ |
| D | bl2_plat_setup.c | 139 uint32_t spsr; in get_spsr_for_bl33_entry() local
152 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in get_spsr_for_bl33_entry()
153 return spsr; in get_spsr_for_bl33_entry()
164 bl_mem_params->ep_info.spsr = get_spsr_for_bl33_entry(); in bl2_plat_handle_post_image_load()
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| /external/arm-trusted-firmware/plat/marvell/common/aarch64/ |
| D | marvell_common.c | 112 uint32_t spsr; in marvell_get_spsr_for_bl33_entry() local
125 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in marvell_get_spsr_for_bl33_entry()
126 return spsr; in marvell_get_spsr_for_bl33_entry()
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| /external/arm-trusted-firmware/plat/mediatek/common/ |
| D | mtk_plat_common.c | 103 uint32_t spsr; in plat_get_spsr_for_bl33_entry() local
116 spsr = SPSR_MODE32(mode, 0, ee, daif); in plat_get_spsr_for_bl33_entry()
117 return spsr; in plat_get_spsr_for_bl33_entry()
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| /external/arm-trusted-firmware/plat/renesas/rcar/ |
| D | bl2_plat_mem_params_desc.c | 32 .ep_info.spsr = SPSR_64(MODE_EL3,
55 .ep_info.spsr = 0,
71 .ep_info.spsr = SPSR_64(BL33_MODE, MODE_SP_ELX,
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| /external/u-boot/arch/arm/lib/ |
| D | vectors.S | 210 mrs r6, spsr
228 mrs lr, spsr @ get the spsr
229 str lr, [r13, #4] @ save spsr in position 1 of saved stack
232 msr spsr, r13 @ switch modes, make sure moves will execute
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| /external/arm-trusted-firmware/plat/xilinx/common/ |
| D | plat_startup.c | 228 bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM, in fsbl_atf_handover()
232 bl32->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in fsbl_atf_handover()
243 bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM, in fsbl_atf_handover()
252 bl33->spsr = SPSR_64(target_el, MODE_SP_ELX, in fsbl_atf_handover()
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| /external/arm-trusted-firmware/plat/socionext/uniphier/ |
| D | uniphier_image_desc.c | 49 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
71 .ep_info.spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
89 .ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
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