1 /*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch_helpers.h>
8 #include <common/bl_common.h>
9 #include <common/debug.h>
10 #include <drivers/arm/cci.h>
11 #include <drivers/console.h>
12 #include <lib/mmio.h>
13 #include <lib/xlat_tables/xlat_tables.h>
14 #include <plat/common/platform.h>
15
16 #include <mtk_plat_common.h>
17 #include <mtk_sip_svc.h>
18 #include <plat_private.h>
19
20 struct atf_arg_t gteearg;
21
clean_top_32b_of_param(uint32_t smc_fid,u_register_t * px1,u_register_t * px2,u_register_t * px3,u_register_t * px4)22 void clean_top_32b_of_param(uint32_t smc_fid,
23 u_register_t *px1,
24 u_register_t *px2,
25 u_register_t *px3,
26 u_register_t *px4)
27 {
28 /* if parameters from SMC32. Clean top 32 bits */
29 if (0 == (smc_fid & SMC_AARCH64_BIT)) {
30 *px1 = *px1 & SMC32_PARAM_MASK;
31 *px2 = *px2 & SMC32_PARAM_MASK;
32 *px3 = *px3 & SMC32_PARAM_MASK;
33 *px4 = *px4 & SMC32_PARAM_MASK;
34 }
35 }
36
37 #if MTK_SIP_KERNEL_BOOT_ENABLE
38 static struct kernel_info k_info;
39
save_kernel_info(uint64_t pc,uint64_t r0,uint64_t r1,uint64_t k32_64)40 static void save_kernel_info(uint64_t pc,
41 uint64_t r0,
42 uint64_t r1,
43 uint64_t k32_64)
44 {
45 k_info.k32_64 = k32_64;
46 k_info.pc = pc;
47
48 if (LINUX_KERNEL_32 == k32_64) {
49 /* for 32 bits kernel */
50 k_info.r0 = 0;
51 /* machtype */
52 k_info.r1 = r0;
53 /* tags */
54 k_info.r2 = r1;
55 } else {
56 /* for 64 bits kernel */
57 k_info.r0 = r0;
58 k_info.r1 = r1;
59 }
60 }
61
get_kernel_info_pc(void)62 uint64_t get_kernel_info_pc(void)
63 {
64 return k_info.pc;
65 }
66
get_kernel_info_r0(void)67 uint64_t get_kernel_info_r0(void)
68 {
69 return k_info.r0;
70 }
71
get_kernel_info_r1(void)72 uint64_t get_kernel_info_r1(void)
73 {
74 return k_info.r1;
75 }
76
get_kernel_info_r2(void)77 uint64_t get_kernel_info_r2(void)
78 {
79 return k_info.r2;
80 }
81
boot_to_kernel(uint64_t x1,uint64_t x2,uint64_t x3,uint64_t x4)82 void boot_to_kernel(uint64_t x1, uint64_t x2, uint64_t x3, uint64_t x4)
83 {
84 static uint8_t kernel_boot_once_flag;
85 /* only support in booting flow */
86 if (0 == kernel_boot_once_flag) {
87 kernel_boot_once_flag = 1;
88
89 console_init(gteearg.atf_log_port,
90 UART_CLOCK, UART_BAUDRATE);
91 INFO("save kernel info\n");
92 save_kernel_info(x1, x2, x3, x4);
93 bl31_prepare_kernel_entry(x4);
94 INFO("el3_exit\n");
95 console_uninit();
96 }
97 }
98 #endif
99
plat_get_spsr_for_bl33_entry(void)100 uint32_t plat_get_spsr_for_bl33_entry(void)
101 {
102 unsigned int mode;
103 uint32_t spsr;
104 unsigned int ee;
105 unsigned long daif;
106
107 INFO("Secondary bootloader is AArch32\n");
108 mode = MODE32_svc;
109 ee = 0;
110 /*
111 * TODO: Choose async. exception bits if HYP mode is not
112 * implemented according to the values of SCR.{AW, FW} bits
113 */
114 daif = DAIF_ABT_BIT | DAIF_IRQ_BIT | DAIF_FIQ_BIT;
115
116 spsr = SPSR_MODE32(mode, 0, ee, daif);
117 return spsr;
118 }
119