sse2 (reference) in projects: external - OpenGrok search results

Project(s)

Full Search
Definition
Symbol
File Path
History
Type

Searched refs:sse2 (Results 1 – 25 of 1166) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...47

/external/libjpeg-turbo/
D	Android.bp	`91 "simd/i386/jccolor-sse2.asm", 94 "simd/i386/jcgray-sse2.asm", 95 "simd/i386/jchuff-sse2.asm", 96 "simd/i386/jcphuff-sse2.asm", 99 "simd/i386/jcsample-sse2.asm", 102 "simd/i386/jdcolor-sse2.asm", 105 "simd/i386/jdmerge-sse2.asm", 108 "simd/i386/jdsample-sse2.asm", 112 "simd/i386/jfdctfst-sse2.asm", 115 "simd/i386/jfdctint-sse2.asm", [all …]`
/external/XNNPACK/src/xnnpack/
D	params-init.h	94 params.sse2.input_zero_point[i] = (int16_t) (uint16_t) input_zero_point; in xnn_init_q8_gemm_params() 95 params.sse2.kernel_zero_point[i] = (int16_t) (uint16_t) kernel_zero_point; in xnn_init_q8_gemm_params() 97 params.sse2.multiplier[0] = multiplier; in xnn_init_q8_gemm_params() 98 params.sse2.multiplier[1] = multiplier; in xnn_init_q8_gemm_params() 99 params.sse2.multiplier[2] = multiplier; in xnn_init_q8_gemm_params() 100 params.sse2.multiplier[3] = multiplier; in xnn_init_q8_gemm_params() 101 params.sse2.rounding[0] = UINT64_C(0x40000000); in xnn_init_q8_gemm_params() 102 params.sse2.rounding[1] = UINT64_C(0x40000000); in xnn_init_q8_gemm_params() 103 params.sse2.remainder_mask[0] = (int32_t) remainder_mask; in xnn_init_q8_gemm_params() 104 params.sse2.remainder_mask[1] = (int32_t) remainder_mask; in xnn_init_q8_gemm_params() [all …]
/external/llvm/test/CodeGen/X86/
D	sse2-intrinsics-x86-upgrade.ll	2 ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 \| FileCheck %s 9 %res = call <2 x i64> @llvm.x86.sse2.psll.dq.bs(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] 12 declare <2 x i64> @llvm.x86.sse2.psll.dq.bs(<2 x i64>, i32) nounwind readnone 20 %res = call <2 x i64> @llvm.x86.sse2.psrl.dq.bs(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] 23 declare <2 x i64> @llvm.x86.sse2.psrl.dq.bs(<2 x i64>, i32) nounwind readnone 30 %res = call <2 x i64> @llvm.x86.sse2.psll.dq(<2 x i64> %a0, i32 8) ; <<2 x i64>> [#uses=1] 33 declare <2 x i64> @llvm.x86.sse2.psll.dq(<2 x i64>, i32) nounwind readnone 41 %res = call <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64> %a0, i32 8) ; <<2 x i64>> [#uses=1] 44 declare <2 x i64> @llvm.x86.sse2.psrl.dq(<2 x i64>, i32) nounwind readnone 52 %res = call <2 x double> @llvm.x86.sse2.cvtdq2pd(<4 x i32> %a0) ; <<2 x double>> [#uses=1] [all …]
D	sse2-intrinsics-x86.ll	2 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse2 \| FileCheck %s --check-prefix=SSE 15 …%res = call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>… 18 declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone 31 …%res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d… 34 declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone 47 …%res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d… 50 declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone 71 %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] 74 declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone 91 %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] [all …]
D	pic-load-remat.ll	1 ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic \| grep psllw \| grep pb 8 …%tmp4403 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> zeroinitializer, <8 x i16> zeroin… 9 …%tmp4443 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> zeroinitializer, <8 x i16> zeroin… 10 …%tmp4609 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> zeroinitializer, <8 x i16> bitcast… 12 …%tmp4658 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4651, <8 x i16> bitcast (<4 x … 13 …%tmp4669 = tail call <8 x i16> @llvm.x86.sse2.pavg.w( <8 x i16> < i16 -23170, i16 -23170, i16 -231… 14 …%tmp4679 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4669, <8 x i16> %tmp4669 ) no… 16 …%tmp4700 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4689, <8 x i16> zeroinitializ… 19 …%tmp4779 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4772, <8 x i16> bitcast (<4 x … 21 …%tmp4821 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4810, <8 x i16> zeroinitializ… [all …]
D	vec_shift5.ll	2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X32 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X64 19 …%1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> <i16 1, i16 2, i16 4, i16 8, i16 1, i16 … 33 …%1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> <i16 4, i16 8, i16 16, i16 32, i16 4, i1… 47 …%1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> <i16 4, i16 8, i16 16, i16 32, i16 4, i1… 61 %1 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> <i32 1, i32 2, i32 4, i32 8>, i32 3) 75 %1 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> <i32 4, i32 8, i32 16, i32 32>, i32 3) 89 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> <i32 4, i32 8, i32 16, i32 32>, i32 3) 104 %1 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> <i64 1, i64 2>, i32 3) 119 %1 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> <i64 8, i64 16>, i32 3) [all …]
D	vec_shift.ll	2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X32 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X64 18 …%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind rea… 39 …%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 ) ; <<8 x i16… 44 declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone 57 …%tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone… 61 declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone 63 declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
D	vec_shift3.ll	2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X32 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X64 18 …%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone … 33 …%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; … 51 …%tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone… 56 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone 57 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone
D	avx-intrinsics-x86_64.ll	6 %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; <i64> [#uses=1] 9 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone 14 …%res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#u… 17 declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone 22 %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; <i64> [#uses=1] 25 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
/external/libvpx/libvpx/vpx_dsp/x86/
D	highbd_variance_sse2.c	`261 DECLS(sse2); 277 unsigned int sse2; \ 280 &sse2, NULL, NULL); \ 282 sse += sse2; \ 286 &sse2, NULL, NULL); \ 288 sse += sse2; \ 291 &sse2, NULL, NULL); \ 293 sse += sse2; \ 311 uint32_t sse2; \ 314 &sse2, NULL, NULL); \ [all …]`
D	variance_sse2.c	`436 DECLS(sse2, sse2); 450 unsigned int sse2; \ 453 ref_stride, h, &sse2, NULL, NULL); \ 455 sse_tmp += sse2; \ 459 ref_stride, h, &sse2, NULL, NULL); \ 461 sse_tmp += sse2; \ 464 ref_stride, h, &sse2, NULL, NULL); \ 466 sse_tmp += sse2; \ 489 FNS(sse2, sse2); 507 DECLS(sse2, sse2); [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
D	pic-load-remat.ll	1 ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic \| grep psllw \| grep pb 8 …%tmp4403 = tail call <8 x i16> @llvm.x86.sse2.psubs.w( <8 x i16> zeroinitializer, <8 x i16> zeroin… 9 …%tmp4443 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> zeroinitializer, <8 x i16> zeroin… 10 …%tmp4609 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> zeroinitializer, <8 x i16> bitcast… 12 …%tmp4658 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4651, <8 x i16> bitcast (<4 x … 13 …%tmp4669 = tail call <8 x i16> @llvm.x86.sse2.pavg.w( <8 x i16> < i16 -23170, i16 -23170, i16 -231… 14 …%tmp4679 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4669, <8 x i16> %tmp4669 ) no… 16 …%tmp4700 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4689, <8 x i16> zeroinitializ… 19 …%tmp4779 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp4772, <8 x i16> bitcast (<4 x … 21 …%tmp4821 = tail call <8 x i16> @llvm.x86.sse2.padds.w( <8 x i16> %tmp4810, <8 x i16> zeroinitializ… [all …]
D	vec_shift5.ll	2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X32 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X64 19 …%1 = tail call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> <i16 1, i16 2, i16 4, i16 8, i16 1, i16 … 33 …%1 = tail call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> <i16 4, i16 8, i16 16, i16 32, i16 4, i1… 47 …%1 = tail call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> <i16 4, i16 8, i16 16, i16 32, i16 4, i1… 61 %1 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> <i32 1, i32 2, i32 4, i32 8>, i32 3) 75 %1 = tail call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> <i32 4, i32 8, i32 16, i32 32>, i32 3) 89 %1 = tail call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> <i32 4, i32 8, i32 16, i32 32>, i32 3) 103 %1 = tail call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> <i64 1, i64 2>, i32 3) 117 %1 = tail call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> <i64 8, i64 16>, i32 3) [all …]
D	fptosi-constant.ll	11 %r = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 5.0e+09, double undef>) 20 %r = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> <double 5.0e+09, double undef>) 29 %r = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 5.0e+19, double undef>) 38 %r = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> <double 5.0e+19, double undef>) 47 %r = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> <double 5.0e+09, double 5.0e+09>) 56 %r = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> <double 5.0e+09, double 5.0e+09>) 103 …%r = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> <float 5.0e+09, float 5.0e+09, float 5.0e+… 112 …%r = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> <float 5.0e+09, float 5.0e+09, float 5.0e… 116 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) 117 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) [all …]
D	sse2-intrinsics-x86.ll	2 ; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse2 -show-mc-encoding \| FileC… 5 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse2 -show-mc-encoding \| Fil… 19 …%res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d… 22 declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone 35 …%res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x d… 38 declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone 68 %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] 71 declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone 95 %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; <i32> [#uses=1] 98 declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>) nounwind readnone [all …]
D	vec_shift.ll	2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X32 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X64 18 …%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind rea… 39 …%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 ) ; <<8 x i16… 44 declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone 57 …%tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone… 61 declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone 63 declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
D	vec_shift3.ll	2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X32 3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 \| FileCheck %s --check-prefix=X64 18 …%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 %bits ) nounwind readnone … 33 …%tmp3 = tail call <2 x i64> @llvm.x86.sse2.pslli.q( <2 x i64> %x1, i32 10 ) nounwind readnone ; … 51 …%tmp4 = tail call <8 x i16> @llvm.x86.sse2.psrai.w( <8 x i16> %tmp2, i32 %bits ) nounwind readnone… 56 declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone 57 declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone
/external/llvm/test/Transforms/InstCombine/
D	x86-sse2.ll	8 ; CHECK-NEXT: [[TMP2:%.]] = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> [[TMP1]]) 14 %3 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %2) 25 %3 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %2) 32 ; CHECK-NEXT: [[TMP1:%.]] = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a, <2 x … 36 %2 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a, <2 x double> %1) 49 %5 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %2, <2 x double> %4) 62 %5 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %2, <2 x double> %4) 69 ; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %a, <2 x … 73 %2 = tail call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %a, <2 x double> %1) 86 %5 = tail call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %2, <2 x double> %4) [all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/X86/
D	x86-sse2.ll	12 %3 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %2) 23 %3 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %2) 37 %5 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %2, <2 x double> %4) 50 %5 = tail call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %2, <2 x double> %4) 64 %5 = tail call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %2, <2 x double> %4) 77 %5 = tail call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %2, <2 x double> %4) 91 %5 = tail call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> %2, <2 x double> %4) 104 %5 = tail call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> %2, <2 x double> %4) 118 %5 = tail call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> %2, <2 x double> %4) 131 %5 = tail call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> %2, <2 x double> %4) [all …]
/external/XNNPACK/src/q8-vadd/
D	sse2.c	23 …const __m128i vzero_point_product = _mm_load_si128((const __m128i) &params->sse2.zero_point_produ… in xnn_q8_vadd_ukernel__sse2() 24 const __m128i va_multiplier_lo = _mm_load_si128((const __m128i) &params->sse2.a_multiplier_lo); in xnn_q8_vadd_ukernel__sse2() 25 const __m128i va_multiplier_hi = _mm_load_si128((const __m128i) &params->sse2.a_multiplier_hi); in xnn_q8_vadd_ukernel__sse2() 26 const __m128i vb_multiplier_lo = _mm_load_si128((const __m128i) &params->sse2.b_multiplier_lo); in xnn_q8_vadd_ukernel__sse2() 27 const __m128i vb_multiplier_hi = _mm_load_si128((const __m128i) &params->sse2.b_multiplier_hi); in xnn_q8_vadd_ukernel__sse2() 28 const __m128i vremainder_mask = _mm_load_si128((const __m128i) params->sse2.remainder_mask); in xnn_q8_vadd_ukernel__sse2() 29 …const __m128i vremainder_threshold = _mm_load_si128((const __m128i) params->sse2.remainder_thresh… in xnn_q8_vadd_ukernel__sse2() 30 const __m128i vshift = _mm_cvtsi32_si128((int) params->sse2.shift); in xnn_q8_vadd_ukernel__sse2() 68 const __m128i vy_zero_point = _mm_load_si128((const __m128i) params->sse2.y_zero_point); in xnn_q8_vadd_ukernel__sse2() 71 vy = _mm_max_epu8(vy, _mm_load_si128((const __m128i*) params->sse2.y_min)); in xnn_q8_vadd_ukernel__sse2() [all …]
/external/libjpeg-turbo/simd/
D	CMakeLists.txt	107 x86_64/jccolor-sse2.asm x86_64/jcgray-sse2.asm x86_64/jchuff-sse2.asm 108 x86_64/jcphuff-sse2.asm x86_64/jcsample-sse2.asm x86_64/jdcolor-sse2.asm 109 x86_64/jdmerge-sse2.asm x86_64/jdsample-sse2.asm x86_64/jfdctfst-sse2.asm 110 x86_64/jfdctint-sse2.asm x86_64/jidctflt-sse2.asm x86_64/jidctfst-sse2.asm 111 x86_64/jidctint-sse2.asm x86_64/jidctred-sse2.asm x86_64/jquantf-sse2.asm 112 x86_64/jquanti-sse2.asm 124 i386/jccolor-sse2.asm i386/jcgray-sse2.asm i386/jchuff-sse2.asm 125 i386/jcphuff-sse2.asm i386/jcsample-sse2.asm i386/jdcolor-sse2.asm 126 i386/jdmerge-sse2.asm i386/jdsample-sse2.asm i386/jfdctfst-sse2.asm 127 i386/jfdctint-sse2.asm i386/jidctflt-sse2.asm i386/jidctfst-sse2.asm [all …]
/external/libaom/libaom/aom_dsp/x86/
D	highbd_variance_sse2.c	`281 DECLS(sse2); 294 unsigned int sse2; \ 300 src, src_stride, x_offset, y_offset, dst, dst_stride, h, &sse2, \ 303 sse += sse2; \ 307 &sse2, NULL, NULL); \ 309 sse += sse2; \ 313 dst_stride, h, &sse2, NULL, NULL); \ 315 sse += sse2; \ 318 dst_stride, h, &sse2, NULL, NULL); \ 320 sse += sse2; \ [all …]`
D	intrapred_asm_sse2.asm	`30 INIT_XMM sse2 52 INIT_XMM sse2 73 INIT_XMM sse2 93 INIT_XMM sse2 122 INIT_XMM sse2 148 INIT_XMM sse2 175 INIT_XMM sse2 189 INIT_XMM sse2 208 INIT_XMM sse2 241 INIT_XMM sse2 [all …]`
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/ConstProp/
D	sse.ll	11 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 7.0, double undef>) nounwind 12 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 7.0, double undef>) nounwind 31 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 1.75, double undef>) nounwind 32 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 1.75, double undef>) nounwind 53 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %dm) nounwind 54 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %dm) nounwind 74 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %dm) nounwind 75 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %dm) nounwind 95 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %dm) nounwind 96 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %dm) nounwind [all …]
/external/libaom/libaom/aom_dsp/arm/
D	variance_neon.c	87 uint32_t sse1, sse2; in aom_variance32x64_neon() local 90 32, 32, &sse2, &sum2); in aom_variance32x64_neon() 91 sse = sse1 + sse2; in aom_variance32x64_neon() 100 uint32_t sse1, sse2; in aom_variance64x32_neon() local 103 64, 16, &sse2, &sum2); in aom_variance64x32_neon() 104 sse = sse1 + sse2; in aom_variance64x32_neon() 113 uint32_t sse1, sse2; in aom_variance64x64_neon() local 117 64, 16, &sse2, &sum2); in aom_variance64x64_neon() 118 sse1 += sse2; in aom_variance64x64_neon() 122 b_stride, 64, 16, &sse2, &sum2); in aom_variance64x64_neon() [all …]

12 3 4 5 6 7 8 9 10 >>...47

art
bionic
bootable
build
compatibility
cts
dalvik
developers
development
device
external
frameworks
hardware
kernel
libcore
libnativehelper
packages
pdk
platform_testing
sdk
system
test
toolchain
tools