1; RUN: opt < %s -constprop -S | FileCheck %s 2; REQUIRES: x86-registered-target 3 4define i1 @test_sse_cvts_exact() nounwind readnone { 5; CHECK-LABEL: @test_sse_cvts_exact( 6; CHECK-NOT: call 7; CHECK: ret i1 true 8entry: 9 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 3.0, float undef, float undef, float undef>) nounwind 10 %i1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> <float 3.0, float undef, float undef, float undef>) nounwind 11 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 7.0, double undef>) nounwind 12 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 7.0, double undef>) nounwind 13 %sum02 = add i32 %i0, %i2 14 %sum13 = add i64 %i1, %i3 15 %cmp02 = icmp eq i32 %sum02, 10 16 %cmp13 = icmp eq i64 %sum13, 10 17 %b = and i1 %cmp02, %cmp13 18 ret i1 %b 19} 20 21; Inexact values should not fold as they are dependent on rounding mode 22define i1 @test_sse_cvts_inexact() nounwind readnone { 23; CHECK-LABEL: @test_sse_cvts_inexact( 24; CHECK: call 25; CHECK: call 26; CHECK: call 27; CHECK: call 28entry: 29 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind 30 %i1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind 31 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> <double 1.75, double undef>) nounwind 32 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> <double 1.75, double undef>) nounwind 33 %sum02 = add i32 %i0, %i2 34 %sum13 = add i64 %i1, %i3 35 %cmp02 = icmp eq i32 %sum02, 4 36 %cmp13 = icmp eq i64 %sum13, 4 37 %b = and i1 %cmp02, %cmp13 38 ret i1 %b 39} 40 41; FLT_MAX/DBL_MAX should not fold 42define i1 @test_sse_cvts_max() nounwind readnone { 43; CHECK-LABEL: @test_sse_cvts_max( 44; CHECK: call 45; CHECK: call 46; CHECK: call 47; CHECK: call 48entry: 49 %fm = bitcast <4 x i32> <i32 2139095039, i32 undef, i32 undef, i32 undef> to <4 x float> 50 %dm = bitcast <2 x i64> <i64 9218868437227405311, i64 undef> to <2 x double> 51 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %fm) nounwind 52 %i1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %fm) nounwind 53 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %dm) nounwind 54 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %dm) nounwind 55 %sum02 = add i32 %i0, %i2 56 %sum13 = add i64 %i1, %i3 57 %sum02.sext = sext i32 %sum02 to i64 58 %b = icmp eq i64 %sum02.sext, %sum13 59 ret i1 %b 60} 61 62; INF should not fold 63define i1 @test_sse_cvts_inf() nounwind readnone { 64; CHECK-LABEL: @test_sse_cvts_inf( 65; CHECK: call 66; CHECK: call 67; CHECK: call 68; CHECK: call 69entry: 70 %fm = bitcast <4 x i32> <i32 2139095040, i32 undef, i32 undef, i32 undef> to <4 x float> 71 %dm = bitcast <2 x i64> <i64 9218868437227405312, i64 undef> to <2 x double> 72 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %fm) nounwind 73 %i1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %fm) nounwind 74 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %dm) nounwind 75 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %dm) nounwind 76 %sum02 = add i32 %i0, %i2 77 %sum13 = add i64 %i1, %i3 78 %sum02.sext = sext i32 %sum02 to i64 79 %b = icmp eq i64 %sum02.sext, %sum13 80 ret i1 %b 81} 82 83; NAN should not fold 84define i1 @test_sse_cvts_nan() nounwind readnone { 85; CHECK-LABEL: @test_sse_cvts_nan( 86; CHECK: call 87; CHECK: call 88; CHECK: call 89; CHECK: call 90entry: 91 %fm = bitcast <4 x i32> <i32 2143289344, i32 undef, i32 undef, i32 undef> to <4 x float> 92 %dm = bitcast <2 x i64> <i64 9221120237041090560, i64 undef> to <2 x double> 93 %i0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %fm) nounwind 94 %i1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %fm) nounwind 95 %i2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %dm) nounwind 96 %i3 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %dm) nounwind 97 %sum02 = add i32 %i0, %i2 98 %sum13 = add i64 %i1, %i3 99 %sum02.sext = sext i32 %sum02 to i64 100 %b = icmp eq i64 %sum02.sext, %sum13 101 ret i1 %b 102} 103 104define i1 @test_sse_cvtts_exact() nounwind readnone { 105; CHECK-LABEL: @test_sse_cvtts_exact( 106; CHECK-NOT: call 107; CHECK: ret i1 true 108entry: 109 %i0 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 3.0, float undef, float undef, float undef>) nounwind 110 %i1 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> <float 3.0, float undef, float undef, float undef>) nounwind 111 %i2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> <double 7.0, double undef>) nounwind 112 %i3 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> <double 7.0, double undef>) nounwind 113 %sum02 = add i32 %i0, %i2 114 %sum13 = add i64 %i1, %i3 115 %cmp02 = icmp eq i32 %sum02, 10 116 %cmp13 = icmp eq i64 %sum13, 10 117 %b = and i1 %cmp02, %cmp13 118 ret i1 %b 119} 120 121define i1 @test_sse_cvtts_inexact() nounwind readnone { 122; CHECK-LABEL: @test_sse_cvtts_inexact( 123; CHECK-NOT: call 124; CHECK: ret i1 true 125entry: 126 %i0 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind 127 %i1 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> <float 1.75, float undef, float undef, float undef>) nounwind 128 %i2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> <double 1.75, double undef>) nounwind 129 %i3 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> <double 1.75, double undef>) nounwind 130 %sum02 = add i32 %i0, %i2 131 %sum13 = add i64 %i1, %i3 132 %cmp02 = icmp eq i32 %sum02, 2 133 %cmp13 = icmp eq i64 %sum13, 2 134 %b = and i1 %cmp02, %cmp13 135 ret i1 %b 136} 137 138; FLT_MAX/DBL_MAX should not fold 139define i1 @test_sse_cvtts_max() nounwind readnone { 140; CHECK-LABEL: @test_sse_cvtts_max( 141; CHECK: call 142; CHECK: call 143; CHECK: call 144; CHECK: call 145entry: 146 %fm = bitcast <4 x i32> <i32 2139095039, i32 undef, i32 undef, i32 undef> to <4 x float> 147 %dm = bitcast <2 x i64> <i64 9218868437227405311, i64 undef> to <2 x double> 148 %i0 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %fm) nounwind 149 %i1 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %fm) nounwind 150 %i2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %dm) nounwind 151 %i3 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %dm) nounwind 152 %sum02 = add i32 %i0, %i2 153 %sum13 = add i64 %i1, %i3 154 %sum02.sext = sext i32 %sum02 to i64 155 %b = icmp eq i64 %sum02.sext, %sum13 156 ret i1 %b 157} 158 159; INF should not fold 160define i1 @test_sse_cvtts_inf() nounwind readnone { 161; CHECK-LABEL: @test_sse_cvtts_inf( 162; CHECK: call 163; CHECK: call 164; CHECK: call 165; CHECK: call 166entry: 167 %fm = bitcast <4 x i32> <i32 2139095040, i32 undef, i32 undef, i32 undef> to <4 x float> 168 %dm = bitcast <2 x i64> <i64 9218868437227405312, i64 undef> to <2 x double> 169 %i0 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %fm) nounwind 170 %i1 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %fm) nounwind 171 %i2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %dm) nounwind 172 %i3 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %dm) nounwind 173 %sum02 = add i32 %i0, %i2 174 %sum13 = add i64 %i1, %i3 175 %sum02.sext = sext i32 %sum02 to i64 176 %b = icmp eq i64 %sum02.sext, %sum13 177 ret i1 %b 178} 179 180; NAN should not fold 181define i1 @test_sse_cvtts_nan() nounwind readnone { 182; CHECK-LABEL: @test_sse_cvtts_nan( 183; CHECK: call 184; CHECK: call 185; CHECK: call 186; CHECK: call 187entry: 188 %fm = bitcast <4 x i32> <i32 2143289344, i32 undef, i32 undef, i32 undef> to <4 x float> 189 %dm = bitcast <2 x i64> <i64 9221120237041090560, i64 undef> to <2 x double> 190 %i0 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %fm) nounwind 191 %i1 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %fm) nounwind 192 %i2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %dm) nounwind 193 %i3 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %dm) nounwind 194 %sum02 = add i32 %i0, %i2 195 %sum13 = add i64 %i1, %i3 196 %sum02.sext = sext i32 %sum02 to i64 197 %b = icmp eq i64 %sum02.sext, %sum13 198 ret i1 %b 199} 200 201declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone 202declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone 203declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone 204declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone 205declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone 206declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone 207declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone 208declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone 209