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Searched refs:tdinit2 (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/dram_timings/
Dlpddr3_stock.c40 u32 tdinit2 = (11 * CONFIG_DRAM_CLK) + 1; /* 11us */ in mctl_set_timing_params() local
79 writel(PTR4_TDINIT2(tdinit2) | PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()
Dddr3_1333.c40 u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1; /* 200us */ in mctl_set_timing_params() local
83 writel(PTR4_TDINIT2(tdinit2) | PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()
Dddr2_v3s.c40 u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1; /* 200us */ in mctl_set_timing_params() local
80 writel(PTR4_TDINIT2(tdinit2) | PTR4_TDINIT3(tdinit3), &mctl_ctl->ptr[4]); in mctl_set_timing_params()
Dh6_lpddr3.c70 u32 tdinit2 = (11 * CONFIG_DRAM_CLK) + 1; /* 11us */ in mctl_set_timing_params() local
128 writel(tdinit2 | (tdinit3 << 18), &mctl_phy->ptr[4]); in mctl_set_timing_params()
Dh6_ddr3_1333.c84 u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1; in mctl_set_timing_params() local
140 writel(tdinit2 | (tdinit3 << 18), &mctl_phy->ptr[4]); in mctl_set_timing_params()
/external/u-boot/arch/arm/mach-sunxi/
Ddram_sun9i.c667 const unsigned int tdinit2 = 200 * CONFIG_DRAM_CLK; /* 200us */ in mctl_channel_init() local
671 writel((tdinit3 << 18) | tdinit2, &mctl_phy->ptr[4]); in mctl_channel_init()
677 const unsigned int tdinit2 = 22 * CONFIG_DRAM_CLK; /* 11us */ in mctl_channel_init() local
681 writel((tdinit3 << 18) | tdinit2, &mctl_phy->ptr[4]); in mctl_channel_init()
Ddram_sun8i_a83t.c123 u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1; /* 200us */ in auto_set_timing_para() local
163 tdinit2 = (11 * CONFIG_DRAM_CLK) + 1; /* 200us */ in auto_set_timing_para()
196 writel(((tdinit2 << 0) | (tdinit3 << 20)), &mctl_ctl->ptr4); in auto_set_timing_para()
Ddram_sun8i_a33.c123 u32 tdinit2 = (200 * CONFIG_DRAM_CLK) + 1; /* 200us */ in auto_set_timing_para() local
164 writel(((tdinit2 << 0) | (tdinit3 << 20)), &mctl_ctl->ptr4); in auto_set_timing_para()