| /external/v8/src/codegen/ppc/ |
| D | assembler-ppc.cc | 907 uintptr_t uimm16 = src2.immediate(); in cmpli() local
913 DCHECK(is_uint16(uimm16)); in cmpli()
915 uimm16 &= kImm16Mask; in cmpli()
916 emit(CMPLI | cr.code() * B23 | L * B21 | src1.code() * B16 | uimm16); in cmpli()
937 uintptr_t uimm16 = src2.immediate(); in cmplwi() local
939 DCHECK(is_uint16(uimm16)); in cmplwi()
941 uimm16 &= kImm16Mask; in cmplwi()
942 emit(CMPLI | cr.code() * B23 | L * B21 | src1.code() * B16 | uimm16); in cmplwi()
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| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 686 def ANDi_MM : MMRel, ArithLogicI<"andi", uimm16, GPR32Opnd>,
688 def ORi_MM : MMRel, ArithLogicI<"ori", uimm16, GPR32Opnd, II_ORI, immZExt16,
690 def XORi_MM : MMRel, ArithLogicI<"xori", uimm16, GPR32Opnd, II_XORI,
1109 (ORi_MM GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>;
1111 (ORi_MM GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>;
1113 (XORi_MM GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>;
1115 (XORi_MM GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>;
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| D | MicroMips32r6InstrInfo.td | 632 class ANDI_MMR6_DESC : ArithLogicI<"andi", uimm16, GPR32Opnd, II_ANDI>;
635 class ORI_MMR6_DESC : ArithLogicI<"ori", uimm16, GPR32Opnd, II_ORI, immZExt16,
640 class XORI_MMR6_DESC : ArithLogicI<"xori", uimm16, GPR32Opnd, II_XORI,
1136 dag InOperandList = (ins uimm16:$imm16);
1710 (ANDI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>,
1713 (ANDI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>,
1716 (ORI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>,
1719 (ORI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>,
1722 (XORI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>,
1725 (XORI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>,
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| D | MipsCondMov.td | 92 (select (i32 (seteq CRC:$lhs, immZExt16:$uimm16)), DRC:$T, DRC:$F),
93 (MOVZInst DRC:$T, (XORiOp CRC:$lhs, immZExt16:$uimm16), DRC:$F)>;
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| D | MipsInstrInfo.td | 471 // uimm16 < uimm16_relaxed
741 // Like uimm16_64 but coerces simm16 to uimm16.
762 // Like uimm16_64 but coerces simm16 to uimm16.
837 // Like simm16 but coerces uimm16 to simm16.
1678 ArithLogicI<"andi", uimm16, GPR32Opnd, II_ANDI, immZExt16, and>,
1681 ArithLogicI<"ori", uimm16, GPR32Opnd, II_ORI, immZExt16, or>,
1684 ArithLogicI<"xori", uimm16, GPR32Opnd, II_XORI, immZExt16, xor>,
|
| D | Mips64InstrInfo.td | 399 InstSE<(outs RO:$rt, uimm16:$imm16), (ins),
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MicroMips32r6InstrInfo.td | 526 dag InOperandList = (ins GPROpnd:$rs, uimm16:$imm);
626 class ANDI_MMR6_DESC : ArithLogicI<"andi", uimm16, GPR32Opnd, II_ANDI>;
629 class ORI_MMR6_DESC : ArithLogicI<"ori", uimm16, GPR32Opnd, II_ORI, immZExt16,
634 class XORI_MMR6_DESC : ArithLogicI<"xori", uimm16, GPR32Opnd, II_XORI,
1126 dag InOperandList = (ins uimm16:$imm16);
1660 (ANDI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>,
1663 (ANDI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>,
1666 (ORI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>,
1669 (ORI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>,
1672 (XORI_MMR6 GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>,
[all …]
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| D | MipsCondMov.td | 92 (select (i32 (seteq CRC:$lhs, immZExt16:$uimm16)), DRC:$T, DRC:$F),
93 (MOVZInst DRC:$T, (XORiOp CRC:$lhs, immZExt16:$uimm16), DRC:$F)>;
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| D | MipsInstrInfo.td | 639 // uimm16 < uimm16_relaxed
946 // Like uimm16_64 but coerces simm16 to uimm16.
967 // Like uimm16_64 but coerces simm16 to uimm16.
1047 // Like simm16 but coerces uimm16 to simm16.
2027 ArithLogicI<"andi", uimm16, GPR32Opnd, II_ANDI, immZExt16, and>,
2030 ArithLogicI<"ori", uimm16, GPR32Opnd, II_ORI, immZExt16, or>,
2033 ArithLogicI<"xori", uimm16, GPR32Opnd, II_XORI, immZExt16, xor>,
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| D | MicroMipsInstrInfo.td | 743 def ANDi_MM : MMRel, ArithLogicI<"andi", uimm16, GPR32Opnd, II_ANDI>,
745 def ORi_MM : MMRel, ArithLogicI<"ori", uimm16, GPR32Opnd, II_ORI, immZExt16,
748 def XORi_MM : MMRel, ArithLogicI<"xori", uimm16, GPR32Opnd, II_XORI,
|
| D | Mips32r6InstrInfo.td | 358 dag InOperandList = (ins GPROpnd:$rs, uimm16:$imm);
|
| D | Mips64InstrInfo.td | 476 InstSE<(outs RO:$rt, uimm16:$imm16), (ins),
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | inlineasm-operand-code.ll | 36 ; This is _also_ -3 because uimm16 values are silently coerced to simm16 when
|
| /external/llvm/test/CodeGen/Mips/ |
| D | inlineasm-operand-code.ll | 36 ; This is _also_ -3 because uimm16 values are silently coerced to simm16 when
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenDAGISel.inc | 3556 …:{ *:[i32] }:$lhs, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:{ *:[Other]…
3557 …2] }:$lhs, (LO16:{ *:[i32] } (imm:{ *:[i32] })<<P:Predicate_immZExt16>>:$uimm16)), GPR32:{ *:[i32]…
3652 …:{ *:[i32] }:$lhs, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:{ *:[Other]…
3653 …2] }:$lhs, (LO16:{ *:[i32] } (imm:{ *:[i32] })<<P:Predicate_immZExt16>>:$uimm16)), GPR64:{ *:[i64]…
3748 …:{ *:[i32] }:$lhs, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:{ *:[Other]…
3749 …2] }:$lhs, (LO16:{ *:[i32] } (imm:{ *:[i32] })<<P:Predicate_immZExt16>>:$uimm16)), GPR32:{ *:[i32]…
3844 …:{ *:[i32] }:$lhs, (imm:{ *:[i32] })<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:{ *:[Other]…
3845 …2] }:$lhs, (LO16:{ *:[i32] } (imm:{ *:[i32] })<<P:Predicate_immZExt16>>:$uimm16)), GPR32:{ *:[i32]…
4608 …:{ *:[i64] }:$lhs, (imm:{ *:[i64] })<<P:Predicate_immZExt16>><<X:LO16>>:$uimm16, SETEQ:{ *:[Other]…
4609 …4] }:$lhs, (LO16:{ *:[i64] } (imm:{ *:[i64] })<<P:Predicate_immZExt16>>:$uimm16)), GPR32:{ *:[i32]…
[all …]
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| D | MipsGenInstrInfo.inc | 9640 uimm16 = 97,
|