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Searched refs:v_add3_u32 (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/amd/compiler/tests/
Dtest_assembler.cpp238 …aco_ptr<VOP3A_instruction> add3{create_instruction<VOP3A_instruction>(aco_opcode::v_add3_u32, Form…
256 …aco_ptr<VOP3A_instruction> add3{create_instruction<VOP3A_instruction>(aco_opcode::v_add3_u32, Form…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop3-gfx9.s14 v_add3_u32 v1, v2, v3, v4 label
Dgfx9_asm_all.s45895 v_add3_u32 v5, v1, v2, v3 label
45898 v_add3_u32 v255, v1, v2, v3 label
45901 v_add3_u32 v5, v255, v2, v3 label
45904 v_add3_u32 v5, s1, v2, v3 label
45907 v_add3_u32 v5, s101, v2, v3 label
45910 v_add3_u32 v5, flat_scratch_lo, v2, v3 label
45913 v_add3_u32 v5, flat_scratch_hi, v2, v3 label
45916 v_add3_u32 v5, vcc_lo, v2, v3 label
45919 v_add3_u32 v5, vcc_hi, v2, v3 label
45922 v_add3_u32 v5, m0, v2, v3 label
[all …]
/external/mesa3d/src/amd/compiler/
Daco_optimizer.cpp2866 …else if (combine_three_valu_op(ctx, instr, aco_opcode::s_add_i32, aco_opcode::v_add3_u32, "012", 1… in combine_instruction()
2867 …else if (combine_three_valu_op(ctx, instr, aco_opcode::s_add_u32, aco_opcode::v_add3_u32, "012", 1… in combine_instruction()
2868 …else if (combine_three_valu_op(ctx, instr, aco_opcode::v_add_u32, aco_opcode::v_add3_u32, "012", 1… in combine_instruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOP3Instructions.td475 def V_ADD3_U32 : VOP3Inst <"v_add3_u32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX9.rst1107 v_add3_u32 dst, src0, src1, src2 :ref:`omod<amdgpu_synid_omod>`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dgfx9_dasm_all.txt43233 # CHECK: v_add3_u32 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x01,0x05,0x0e,0x04]
43236 # CHECK: v_add3_u32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0xff,0xd1,0x01,0x05,0x0e,0x04]
43239 # CHECK: v_add3_u32 v5, v255, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0xff,0x05,0x0e,0x04]
43242 # CHECK: v_add3_u32 v5, s1, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x01,0x04,0x0e,0x04]
43245 # CHECK: v_add3_u32 v5, s101, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x65,0x04,0x0e,0x04]
43248 # CHECK: v_add3_u32 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x66,0x04,0x0e,…
43251 # CHECK: v_add3_u32 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x67,0x04,0x0e,…
43254 # CHECK: v_add3_u32 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x6a,0x04,0x0e,0x04]
43257 # CHECK: v_add3_u32 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x6b,0x04,0x0e,0x04]
43260 # CHECK: v_add3_u32 v5, m0, v2, v3 ; encoding: [0x05,0x00,0xff,0xd1,0x7c,0x04,0x0e,0x04]
[all …]