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Searched refs:v_fma_f16 (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dllvm.fma.f16.ll16 ; VI: v_fma_f16 v[[R_F16:[0-9]+]], v[[A_F16]], v[[B_F16]], v[[C_F16]]
42 ; VI: v_fma_f16 v[[R_F16:[0-9]+]], v[[B_F16]], v[[A_F16]], v[[C_F16]]
65 ; VI: v_fma_f16 v[[R_F16:[0-9]+]], v[[A_F16]], v[[B_F16]], v[[C_F16]]
88 ; VI: v_fma_f16 v[[R_F16:[0-9]+]], v[[A_F16]], v[[B_F16]], v[[C_F16]]
127 ; VI-DAG: v_fma_f16 v[[R_F16_0:[0-9]+]], v[[A_V2_F16]], v[[B_V2_F16]], v[[C_V2_F16]]
128 ; VI-DAG: v_fma_f16 v[[R_F16_1:[0-9]+]], v[[A_F16_1]], v[[B_F16_1]], v[[C_F16_1]]
172 ; VI-DAG: v_fma_f16 v[[R_F16_1:[0-9]+]], v[[C_F16_1]], v[[A_F16]], v[[B_F16_1]]
173 ; VI-DAG: v_fma_f16 v[[R_F16_0:[0-9]+]], v[[C_V2_F16]], v[[A_F16]], v[[B_V2_F16]]
215 ; VI-DAG: v_fma_f16 v[[R_F16_0:[0-9]+]], v[[A_V2_F16]], v[[B_F16]], v[[C_V2_F16]]
216 ; VI-DAG: v_fma_f16 v[[R_F16_1:[0-9]+]], v[[A_F16_1]], v[[B_F16]], v[[C_F16_1]]
[all …]
Dfmuladd.f16.ll14 ; VI-DENORM: v_fma_f16 {{v[0-9]+, v[0-9]+, v[0-9]+}}
31 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], [[R1]], 2.0, [[R2]]
53 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], [[R1]], 2.0, [[R2]]
75 ; VI-DENORM-CONTRACT: v_fma_f16 [[RESULT:v[0-9]+]], [[R1]], 2.0, [[R2]]
104 ; VI-DENORM-CONTRACT: v_fma_f16 [[RESULT:v[0-9]+]], [[R1]], 2.0, [[R2]]
131 ; VI-DENORM: v_fma_f16 [[R2:v[0-9]+]], [[R1]], -2.0, [[R2]]
153 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], [[R1]], 2.0, [[R2]]
177 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], [[R1]], -2.0, [[R2]]
199 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], [[R1]], 2.0, -[[R2]]
224 ; VI-DENORM-CONTRACT: v_fma_f16 [[RESULT:v[0-9]+]], [[REGA]], [[REGB]], -[[REGC]]
[all …]
Dllvm.fmuladd.f16.ll23 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], v[[A_F16]], v[[B_F16]], v[[C_F16]]
53 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], v[[B_F16]], [[KA]], v[[C_F16]]
81 ; VI-DENORM: v_fma_f16 [[RESULT:v[0-9]+]], v[[A_F16]], [[KA]], v[[C_F16]]
141 ; VI-DENORM-DAG: v_fma_f16 v[[RES0:[0-9]+]], v[[A_V2_F16]], v[[B_V2_F16]], v[[C_V2_F16]]
142 ; VI-DENORM-DAG: v_fma_f16 v[[RES1:[0-9]+]], v[[A_F16_1]], v[[B_F16_1]], v[[C_F16_1]]
Dfmul-2-combine-multi-use.ll121 ; VI-DENORM: v_fma_f16 v{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}, 1.0
144 ; VI-DENORM-DAG: v_fma_f16 [[MAD:v[0-9]+]], [[X]], 2.0, v{{[0-9]+}}
164 ; VI-DENORM-DAG: v_fma_f16 [[MAD:v[0-9]+]], |[[X]]|, 2.0, v{{[0-9]+}}
185 ; VI-DENORM: v_fma_f16 {{v[0-9]+}}, |[[X:s[0-9]+]]|, 2.0, v{{[0-9]+}}
186 ; VI-DENORM: v_fma_f16 {{v[0-9]+}}, |[[X]]|, 2.0, v{{[0-9]+}}
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop3-gfx9.s197 v_fma_f16 v5, v1, -v2, v3 label
200 v_fma_f16 v5, v1, v2, |v3| label
203 v_fma_f16 v5, v1, v2, v3 clamp label
206 v_fma_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] label
209 v_fma_f16 v5, v1, v2, v3 op_sel:[0,1,0,0] label
212 v_fma_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] label
Dvop3.s446 v_fma_f16 v5, v1, v2, 0.5 label
449 v_fma_f16 v5, -v1, -v2, -v3 label
452 v_fma_f16 v5, |v1|, |v2|, |v3| label
455 v_fma_f16 v5, v1, v2, v3 clamp label
Dgfx8_asm_all.s52062 v_fma_f16 v5, v1, v2, v3 label
52065 v_fma_f16 v255, v1, v2, v3 label
52068 v_fma_f16 v5, v255, v2, v3 label
52071 v_fma_f16 v5, s1, v2, v3 label
52074 v_fma_f16 v5, s101, v2, v3 label
52077 v_fma_f16 v5, flat_scratch_lo, v2, v3 label
52080 v_fma_f16 v5, flat_scratch_hi, v2, v3 label
52083 v_fma_f16 v5, vcc_lo, v2, v3 label
52086 v_fma_f16 v5, vcc_hi, v2, v3 label
52089 v_fma_f16 v5, tba_lo, v2, v3 label
[all …]
Dgfx9_asm_all.s46906 v_fma_f16 v5, v1, v2, v3 label
46909 v_fma_f16 v255, v1, v2, v3 label
46912 v_fma_f16 v5, v255, v2, v3 label
46915 v_fma_f16 v5, s1, v2, v3 label
46918 v_fma_f16 v5, s101, v2, v3 label
46921 v_fma_f16 v5, flat_scratch_lo, v2, v3 label
46924 v_fma_f16 v5, flat_scratch_hi, v2, v3 label
46927 v_fma_f16 v5, vcc_lo, v2, v3 label
46930 v_fma_f16 v5, vcc_hi, v2, v3 label
46933 v_fma_f16 v5, m0, v2, v3 label
[all …]
/external/mesa3d/src/amd/compiler/
Daco_ir.cpp292 case aco_opcode::v_fma_f16: in can_use_opsel()
Daco_register_allocation.cpp451 case aco_opcode::v_fma_f16: in get_subdword_definition_info()
1796 …(instr->opcode == aco_opcode::v_fma_f16 && program->chip_class >= GFX10)) && !instr->usesModifiers… in register_allocation()
2075 (instr->opcode == aco_opcode::v_fma_f16 && program->chip_class >= GFX10)) && in register_allocation()
2102 case aco_opcode::v_fma_f16: in register_allocation()
Daco_optimizer.cpp2811 …ed_fma ? (ctx.program->chip_class == GFX8 ? aco_opcode::v_fma_legacy_f16 : aco_opcode::v_fma_f16) : in combine_instruction()
3040 if ((instr->opcode == aco_opcode::v_fma_f32 || instr->opcode == aco_opcode::v_fma_f16) && in select_instruction()
3220 else if (instr->opcode == aco_opcode::v_fma_f16) in apply_literals()
Daco_validate.cpp682 case aco_opcode::v_fma_f16: in get_subdword_bytes_written()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dvop3_gfx9.txt3 # GFX9: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04]
6 # GFX9: v_fma_f16 v5, -v1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x24]
9 # GFX9: v_fma_f16 v5, v1, |v2|, v3 ; encoding: [0x05,0x02,0x06,0xd2,0x01,0x05,0x0e,0x04]
12 # GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x06,0xd2,0x01,0x05,0x0e,0…
15 # GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x05,0x78,0x06,0xd2,0x01,0x05,0x0e,0…
18 # GFX9: v_fma_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0x06,0xd2,0x01,0x05,0x0e,0x04]
Dvop3_vi.txt243 # VI: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04]
246 # VI: v_fma_f16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0xf0,0x04,0x0e,0x04]
249 # VI: v_fma_f16 v5, v1, v2, |v3| ; encoding: [0x05,0x04,0xee,0xd1,0x01,0x05,0x0e,0x04]
252 # VI: v_fma_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xee,0xd1,0x01,0x05,0x0e,0x04]
Dgfx8_dasm_all.txt48486 # CHECK: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04]
48489 # CHECK: v_fma_f16 v255, v1, v2, v3 ; encoding: [0xff,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04]
48492 # CHECK: v_fma_f16 v5, v255, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0xff,0x05,0x0e,0x04]
48495 # CHECK: v_fma_f16 v5, s1, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x04,0x0e,0x04]
48498 # CHECK: v_fma_f16 v5, s101, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x65,0x04,0x0e,0x04]
48501 # CHECK: v_fma_f16 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x66,0x04,0x0e,0…
48504 # CHECK: v_fma_f16 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x67,0x04,0x0e,0…
48507 # CHECK: v_fma_f16 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x6a,0x04,0x0e,0x04]
48510 # CHECK: v_fma_f16 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x6b,0x04,0x0e,0x04]
48513 # CHECK: v_fma_f16 v5, tba_lo, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x6c,0x04,0x0e,0x04]
[all …]
Dgfx9_dasm_all.txt44235 # CHECK: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04]
44238 # CHECK: v_fma_f16 v255, v1, v2, v3 ; encoding: [0xff,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04]
44241 # CHECK: v_fma_f16 v5, v255, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0xff,0x05,0x0e,0x04]
44244 # CHECK: v_fma_f16 v5, s1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x04,0x0e,0x04]
44247 # CHECK: v_fma_f16 v5, s101, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x65,0x04,0x0e,0x04]
44250 # CHECK: v_fma_f16 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x66,0x04,0x0e,0…
44253 # CHECK: v_fma_f16 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x67,0x04,0x0e,0…
44256 # CHECK: v_fma_f16 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x6a,0x04,0x0e,0x04]
44259 # CHECK: v_fma_f16 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x6b,0x04,0x0e,0x04]
44262 # CHECK: v_fma_f16 v5, m0, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x7c,0x04,0x0e,0x04]
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOP3Instructions.td430 def V_FMA_F16 : VOP3Inst <"v_fma_f16", VOP3_Profile<VOP_F16_F16_F16_F16>, fma>;
788 defm V_FMA_F16_gfx9 : VOP3OpSel_F16_Real_gfx9 <0x206, "v_fma_f16">;
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX8.rst1209 …v_fma_f16 dst, src0, src1, src2 :ref:`clamp<amdgpu_synid_clamp>` :re…
DAMDGPUAsmGFX9.rst1391 …v_fma_f16 dst, src0, src1, src2 :ref:`vop3_op_sel<amdgpu_synid_vop3_…