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Searched refs:v_lshl_or_b32 (Results 1 – 20 of 20) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dpack.v2f16.ll63 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[ELT0]]
88 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[ELT0]]
114 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[K]]
134 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[K]]
156 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[K]], 16, [[MASKED]]
178 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[K]], 16, [[MASKED]]
199 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], 64, 16, [[MASKED]]
Dpack.v2i16.ll59 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[MASKED]]
82 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[MASKED]]
107 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, [[K]]
126 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[VAL1]], 16, 64
145 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[K]], 16, [[VAL0]]
163 ; GFX9: v_lshl_or_b32 [[PACKED:v[0-9]+]], 7, 16, [[VAL]]
Dinsert_vector_elt.v2i16.ll285 ; GFX9: v_lshl_or_b32 [[RES:v[0-9]+]], [[K]], 16, [[ELT0]]
310 ; GFX9: v_lshl_or_b32 [[RES:v[0-9]+]], -15, 16, [[ELT0]]
331 ; GFX9: v_lshl_or_b32 [[RES:v[0-9]+]], [[ELT1]], 16, [[ELT0]]
352 ; GFX9: v_lshl_or_b32 [[RES:v[0-9]+]], [[ELT1]], 16, 53
371 ; GFX9: v_lshl_or_b32 [[RES:v[0-9]+]], [[K]], 16, [[ELT0]]
397 ; GFX9: v_lshl_or_b32 [[RES:v[0-9]+]], 35, 16, [[ELT0]]
533 ; GFX9: v_lshl_or_b32 v[[INS_HALF:[0-9]+]], [[VAL]], 16, [[AND]]
587 ; GFX9: v_lshl_or_b32 v[[INS_HI:[0-9]+]], [[VAL]], 16, [[AND]]
Dfptrunc.f16.ll48 ; GFX9: v_lshl_or_b32 v[[R_V2_F16:[0-9]+]], v[[R_F16_1]], 16, v[[R_F16_LO]]
78 ; GFX9: v_lshl_or_b32 v[[R_V2_F16:[0-9]+]], v[[R_F16_1]], 16, v[[R_F16_LO]]
Dllvm.rint.f16.ll47 ; GFX9: v_lshl_or_b32 v[[R_V2_F16:[0-9]+]], v[[R_F16_1]], 16, v[[R_F16_LO]]
Dllvm.log10.f16.ll59 ; GFX9: v_lshl_or_b32 v[[R_F32_5:[0-9]+]], v[[R_F32_2]], 16, v[[R_F32_4]]
Dllvm.log.f16.ll59 ; GFX9: v_lshl_or_b32 v[[R_F32_5:[0-9]+]], v[[R_F32_2]], 16, v[[R_F32_4]]
Dload-hi16.ll225 ; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16,
246 ; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16,
267 ; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16,
289 ; GFX906: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16,
Dllvm.round.ll91 ; GFX9: v_lshl_or_b32
Dload-lo16.ll106 ; GFX9: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, v{{[0-9]+}}
179 ; GFX9: v_lshl_or_b32 v{{[0-9]+}}, v{{[0-9]+}}, 16, v{{[0-9]+}}
365 ; GFX9: v_lshl_or_b32
Dpacked-op-sel.ll209 ; GCN: v_lshl_or_b32 [[PACKED:v[0-9]+]], [[SCALAR1]], 16, [[SCALAR0]]
597 ; GCN: v_lshl_or_b32
Dmad-mix-lo.ll234 ; GFX9: v_lshl_or_b32 v0, v0, 16, v1
Dfcanonicalize-elimination.ll213 ; GFX9: v_lshl_or_b32 [[V:v[0-9]+]], [[V1]], 16, [[V0_16]]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AMDGPU/
Dvop3-gfx9.s18 v_lshl_or_b32 v1, v2, v3, v4 label
Dgfx9_asm_all.s46027 v_lshl_or_b32 v5, v1, v2, v3 label
46030 v_lshl_or_b32 v255, v1, v2, v3 label
46033 v_lshl_or_b32 v5, v255, v2, v3 label
46036 v_lshl_or_b32 v5, s1, v2, v3 label
46039 v_lshl_or_b32 v5, s101, v2, v3 label
46042 v_lshl_or_b32 v5, flat_scratch_lo, v2, v3 label
46045 v_lshl_or_b32 v5, flat_scratch_hi, v2, v3 label
46048 v_lshl_or_b32 v5, vcc_lo, v2, v3 label
46051 v_lshl_or_b32 v5, vcc_hi, v2, v3 label
46054 v_lshl_or_b32 v5, m0, v2, v3 label
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOP3Instructions.td476 def V_LSHL_OR_B32 : VOP3Inst <"v_lshl_or_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>;
/external/mesa3d/src/amd/compiler/
Daco_optimizer.cpp2856 …else if (combine_three_valu_op(ctx, instr, aco_opcode::s_lshl_b32, aco_opcode::v_lshl_or_b32, "120… in combine_instruction()
2857 …else combine_three_valu_op(ctx, instr, aco_opcode::v_lshlrev_b32, aco_opcode::v_lshl_or_b32, "210"… in combine_instruction()
Daco_instruction_selection.cpp7002 prim_flag = bld.vop3(aco_opcode::v_lshl_or_b32, bld.def(v1), odd, Operand(1u), prim_flag); in ngg_visit_emit_vertex_with_counter()
7874 …bld.vop3(aco_opcode::v_lshl_or_b32, Definition(get_ssa_temp(ctx, &instr->dest.ssa)), tg_num, Opera… in visit_intrinsic()
11188 tmp = bld.vop3(aco_opcode::v_lshl_or_b32, bld.def(v1), vtxindex[i], Operand(10u * i), tmp); in ngg_pack_prim_exp_arg()
11195 … tmp = bld.vop3(aco_opcode::v_lshl_or_b32, bld.def(v1), edgeflag, Operand(10u * i + 9u), tmp); in ngg_pack_prim_exp_arg()
11200 tmp = bld.vop3(aco_opcode::v_lshl_or_b32, bld.def(v1), is_null, Operand(31u), tmp); in ngg_pack_prim_exp_arg()
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DAMDGPUAsmGFX9.rst1419 v_lshl_or_b32 dst, src0, src1, src2 :ref:`omod<amdgpu_synid_omod>`
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/
Dgfx9_dasm_all.txt43365 # CHECK: v_lshl_or_b32 v5, v1, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x01,0x05,0x0e,0x04]
43368 # CHECK: v_lshl_or_b32 v255, v1, v2, v3 ; encoding: [0xff,0x00,0x00,0xd2,0x01,0x05,0x0e,0x04]
43371 # CHECK: v_lshl_or_b32 v5, v255, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0xff,0x05,0x0e,0x04]
43374 # CHECK: v_lshl_or_b32 v5, s1, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x01,0x04,0x0e,0x04]
43377 # CHECK: v_lshl_or_b32 v5, s101, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x65,0x04,0x0e,0x04]
43380 # CHECK: v_lshl_or_b32 v5, flat_scratch_lo, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x66,0x04,0x…
43383 # CHECK: v_lshl_or_b32 v5, flat_scratch_hi, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x67,0x04,0x…
43386 # CHECK: v_lshl_or_b32 v5, vcc_lo, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x6a,0x04,0x0e,0x04]
43389 # CHECK: v_lshl_or_b32 v5, vcc_hi, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x6b,0x04,0x0e,0x04]
43392 # CHECK: v_lshl_or_b32 v5, m0, v2, v3 ; encoding: [0x05,0x00,0x00,0xd2,0x7c,0x04,0x0e,0x04]
[all …]