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Searched refs:val32 (Results 1 – 25 of 64) sorted by relevance

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/external/elfutils/libdwfl/
Dlinux-core-attach.c154 uint32_t val32 = read_4ubyte_unaligned_noncvt (desc + item->offset); in core_next_thread() local
155 val32 = (elf_getident (core, NULL)[EI_DATA] == ELFDATA2MSB in core_next_thread()
156 ? be32toh (val32) : le32toh (val32)); in core_next_thread()
157 pid_t tid = (int32_t) val32; in core_next_thread()
158 eu_static_assert (sizeof val32 <= sizeof tid); in core_next_thread()
207 uint32_t val32 = read_4ubyte_unaligned_noncvt (desc + item->offset); in core_set_initial_registers() local
208 val32 = (elf_getident (core, NULL)[EI_DATA] == ELFDATA2MSB in core_set_initial_registers()
209 ? be32toh (val32) : le32toh (val32)); in core_set_initial_registers()
210 tid = (int32_t) val32; in core_set_initial_registers()
211 eu_static_assert (sizeof val32 <= sizeof tid); in core_set_initial_registers()
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/external/u-boot/drivers/ata/
Dfsl_sata.c94 u32 val32; in init_sata() local
176 val32 = in_le32(&reg->hcontrol); in init_sata()
177 val32 &= ~HCONTROL_ONOFF; in init_sata()
178 val32 |= HCONTROL_FORCE_OFFLINE; in init_sata()
179 out_le32(&reg->hcontrol, val32); in init_sata()
188 val32 = in_le32(&reg->hcontrol); in init_sata()
189 val32 |= HCONTROL_HDR_SNOOP; in init_sata()
190 out_le32(&reg->hcontrol, val32); in init_sata()
193 val32 = in_le32(&reg->hcontrol); in init_sata()
194 val32 &= ~HCONTROL_INT_EN_ALL; in init_sata()
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Dfsl_ahci.c113 u32 val32; in init_sata() local
191 val32 = in_le32(&reg->hcontrol); in init_sata()
192 val32 &= ~HCONTROL_ONOFF; in init_sata()
193 val32 |= HCONTROL_FORCE_OFFLINE; in init_sata()
194 out_le32(&reg->hcontrol, val32); in init_sata()
203 val32 = in_le32(&reg->hcontrol); in init_sata()
204 val32 |= HCONTROL_HDR_SNOOP; in init_sata()
205 out_le32(&reg->hcontrol, val32); in init_sata()
208 val32 = in_le32(&reg->hcontrol); in init_sata()
209 val32 &= ~HCONTROL_INT_EN_ALL; in init_sata()
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/external/webrtc/webrtc/base/
Dbitbuffer_unittest.cc45 uint32_t val32; in TEST() local
53 EXPECT_TRUE(buffer.ReadUInt32(&val32)); in TEST()
54 EXPECT_EQ(0x23456789u, val32); in TEST()
62 uint32_t val32; in TEST() local
72 EXPECT_TRUE(buffer.ReadUInt32(&val32)); in TEST()
73 EXPECT_EQ(0x34567890u, val32); in TEST()
97 uint32_t val32; in TEST() local
104 EXPECT_TRUE(buffer.ReadUInt32(&val32)); in TEST()
105 EXPECT_EQ(0x98765432u, val32); in TEST()
292 uint32_t val32; in TEST() local
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/external/u-boot/board/imgtec/malta/
Dmalta.c170 u32 val32; in pci_init_board() local
204 pci_read_config_dword(bdf, PCI_CFG_PIIX4_GENCFG, &val32); in pci_init_board()
205 val32 |= PCI_CFG_PIIX4_GENCFG_SERIRQ; in pci_init_board()
206 pci_write_config_dword(bdf, PCI_CFG_PIIX4_GENCFG, val32); in pci_init_board()
219 val32 |= PCI_COMMAND_MASTER | PCI_COMMAND_IO; in pci_init_board()
220 pci_write_config_dword(bdf, PCI_COMMAND, val32); in pci_init_board()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dextend-bit-ops-i16.ll13 %val32 = zext i16 %val16 to i32
14 store i32 %val32, i32 addrspace(1)* %out
28 %val32 = zext i16 %val16 to i32
29 store i32 %val32, i32 addrspace(1)* %out
43 %val32 = zext i16 %val16 to i32
44 store i32 %val32, i32 addrspace(1)* %out
/external/llvm/test/CodeGen/NVPTX/
Dhalf.ll37 %val32 = fpext half %val16 to float
38 store float %val32, float addrspace(1)* %out
56 %val32 = load float, float addrspace(1)* %in
57 %val16 = fptrunc float %val32 to half
66 %val32 = load double, double addrspace(1)* %in
67 %val16 = fptrunc double %val32 to half
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/NVPTX/
Dhalf.ll41 %val32 = fpext half %val16 to float
42 store float %val32, float addrspace(1)* %out
60 %val32 = load float, float addrspace(1)* %in
61 %val16 = fptrunc float %val32 to half
70 %val32 = load double, double addrspace(1)* %in
71 %val16 = fptrunc double %val32 to half
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Daddsub.ll16 %val32 = load i32, i32* @var_i32
17 %newval32 = add i32 %val32, 4095
61 %val32 = load i32, i32* @var_i32
62 %newval32 = add i32 %val32, 14610432 ; =0xdef000
78 %val32 = load i32, i32* @var_i32
79 %newval32 = sub i32 %val32, 4095
95 %val32 = load i32, i32* @var_i32
96 %newval32 = sub i32 %val32, 14610432 ; =0xdef000
Dhalf.ll54 %val32 = fpext half %val16 to float
55 ret float %val32
63 %val32 = fpext half %val16 to double
64 ret double %val32
Darm64-fp128.ll65 %val32 = fptosi fp128 %val to i32
66 store i32 %val32, i32* @var32
80 %val32 = fptoui fp128 %val to i32
81 store i32 %val32, i32* @var32
95 %val32 = sitofp i32 %src32 to fp128
96 store volatile fp128 %val32, fp128* @lhs
111 %val32 = uitofp i32 %src32 to fp128
112 store volatile fp128 %val32, fp128* @lhs
Dmisched-fusion-addr.ll36 %val32 = trunc i64 %add to i32
37 store volatile i32 %val32, i32* @var_32bit
48 %val32 = load volatile i32, i32* @var_32bit
49 %ext = zext i32 %val32 to i64
Dbitfield.ll83 define void @test_shifts(i32 %val32, i64 %val64) {
86 %shift1 = ashr i32 %val32, 31
90 %shift2 = lshr i32 %val32, 8
94 %shift3 = shl i32 %val32, 1
118 %shift9 = lshr i32 %val32, 31
122 %shift10 = shl i32 %val32, 31
/external/llvm/test/CodeGen/AArch64/
Daddsub.ll16 %val32 = load i32, i32* @var_i32
17 %newval32 = add i32 %val32, 4095
61 %val32 = load i32, i32* @var_i32
62 %newval32 = add i32 %val32, 14610432 ; =0xdef000
78 %val32 = load i32, i32* @var_i32
79 %newval32 = sub i32 %val32, 4095
95 %val32 = load i32, i32* @var_i32
96 %newval32 = sub i32 %val32, 14610432 ; =0xdef000
Darm64-fp128.ll65 %val32 = fptosi fp128 %val to i32
66 store i32 %val32, i32* @var32
80 %val32 = fptoui fp128 %val to i32
81 store i32 %val32, i32* @var32
95 %val32 = sitofp i32 %src32 to fp128
96 store volatile fp128 %val32, fp128* @lhs
111 %val32 = uitofp i32 %src32 to fp128
112 store volatile fp128 %val32, fp128* @lhs
Dhalf.ll54 %val32 = fpext half %val16 to float
55 ret float %val32
63 %val32 = fpext half %val16 to double
64 ret double %val32
/external/u-boot/lib/zstd/
Dmem.h80 ZSTD_STATIC void ZSTD_writeLE32(void *memPtr, U32 val32) { put_unaligned_le32(val32, memPtr); } in ZSTD_writeLE32() argument
106 ZSTD_STATIC void ZSTD_writeBE32(void *memPtr, U32 val32) { put_unaligned_be32(val32, memPtr); } in ZSTD_writeBE32() argument
/external/u-boot/drivers/pci/
Dpci.c70 u32 val32; \
72 if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0) { \
77 *val = (val32 >> ((offset & (int)off_mask) * 8)); \
87 u32 val32, mask, ldata, shift; \
89 if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0)\
95 val32 = (val32 & ~mask) | ldata; \
97 if (pci_hose_write_config_dword(hose, dev, offset & 0xfc, val32) < 0)\
/external/llvm/test/CodeGen/ARM/
Dhalf.ll37 %val32 = fpext half %val16 to float
38 ret float %val32
50 %val32 = fpext half %val16 to double
51 ret double %val32
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dhalf.ll37 %val32 = fpext half %val16 to float
38 ret float %val32
50 %val32 = fpext half %val16 to double
51 ret double %val32
/external/deqp/framework/delibs/debase/
DdeFloat16.h42 deFloat16 deFloat32To16 (float val32);
43 deFloat16 deFloat32To16Round (float val32, deRoundingMode mode);
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/MIR/AArch64/
Dinvalid-target-flag-name.mir10 %val32 = load i32, i32* @var_i32
11 ret i32 %val32
Dexpected-target-flag-name.mir10 %val32 = load i32, i32* @var_i32
11 ret i32 %val32
/external/llvm/test/CodeGen/MIR/AArch64/
Dexpected-target-flag-name.mir10 %val32 = load i32, i32* @var_i32
11 ret i32 %val32
Dinvalid-target-flag-name.mir10 %val32 = load i32, i32* @var_i32
11 ret i32 %val32

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