| /external/google-breakpad/src/tools/solaris/dump_syms/testdata/ |
| D | dump_syms_regtest.stabs | 5 0: .stabs "dump_syms_regtest.cc",N_UNDF,0x0,0x67,0x71c
6 …alfred/cvs/breakpad/google-breakpad20070927/src/tools/solaris/dump_syms/testdata/",N_SO,0x0,0x0,0x0
7 2: .stabs "dump_syms_regtest.cc",N_SO,0x0,0x4,0x0
8 3: .stabs "",N_OBJ,0x0,0x0,0x0
9 4: .stabs "",N_OBJ,0x0,0x0,0x0
10 …<<Sun C++ 5.8 Patch 121018-07 2006/11/01 (ccfe)>>;G=.XAB6Z2hOiL$Gl1b.;A=2",N_OPT,0x0,0x0,0x46fcb88e
11 6: .stabs "dump_syms_regtest.cc",N_SOL,0x0,0x0,0x0
12 7: .stabs "char:t(0,1)=bsc1;0;8",N_ISYM,0x0,0x0,0x0
13 8: .stabs "short:t(0,2)=bs2;0;16",N_ISYM,0x0,0x0,0x0
14 9: .stabs "int:t(0,3)=bs4;0;32",N_ISYM,0x0,0x0,0x0
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | armv8.4a-actmon.s | 9 msr AMCR_EL0, x0
10 msr AMCFGR_EL0, x0
11 msr AMCGCR_EL0, x0
12 msr AMUSERENR_EL0, x0
13 msr AMCNTENCLR0_EL0, x0
14 msr AMCNTENSET0_EL0, x0
15 msr AMEVCNTR00_EL0, x0
16 msr AMEVCNTR01_EL0, x0
17 msr AMEVCNTR02_EL0, x0
18 msr AMEVCNTR03_EL0, x0
[all …]
|
| D | ldr-pseudo.s | 10 ldr x0, =0x1234
14 ldr x0, =0x12340000
18 ldr x0, =0xabc00000000
20 ldr x0, =0xbeef000000000000
35 adds x0, x0, #1
36 adds x0, x0, #1
37 adds x0, x0, #1
38 adds x0, x0, #1
41 adds x0, x0, #1
42 adds x0, x0, #1
[all …]
|
| D | armv8.3a-signed-pointer.s | 5 mrs x0, apiakeylo_el1
6 mrs x0, apiakeyhi_el1
7 mrs x0, apibkeylo_el1
8 mrs x0, apibkeyhi_el1
9 mrs x0, apdakeylo_el1
10 mrs x0, apdakeyhi_el1
11 mrs x0, apdbkeylo_el1
12 mrs x0, apdbkeyhi_el1
13 mrs x0, apgakeylo_el1
14 mrs x0, apgakeyhi_el1
[all …]
|
| D | armv8.4a-mpam.s | 9 msr MPAM0_EL1, x0
10 msr MPAM1_EL1, x0
11 msr MPAM2_EL2, x0
12 msr MPAM3_EL3, x0
13 msr MPAM1_EL12, x0
14 msr MPAMHCR_EL2, x0
15 msr MPAMVPMV_EL2, x0
16 msr MPAMVPM0_EL2, x0
17 msr MPAMVPM1_EL2, x0
18 msr MPAMVPM2_EL2, x0
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | ldr-pseudo.s | 10 ldr x0, =0x1234
14 ldr x0, =0x12340000
18 ldr x0, =0xabc00000000
20 ldr x0, =0xbeef000000000000
35 adds x0, x0, #1
36 adds x0, x0, #1
37 adds x0, x0, #1
38 adds x0, x0, #1
41 adds x0, x0, #1
42 adds x0, x0, #1
[all …]
|
| /external/arm-trusted-firmware/plat/nvidia/tegra/common/aarch64/ |
| D | tegra_helpers.S | 66 mrs x0, midr_el1
68 and x0, x0, x1
69 lsr x0, x0, #MIDR_PN_SHIFT
70 cmp x0, #MIDR_PN_CORTEX_A57
77 mrs x0, CORTEX_A57_L2ECTLR_EL1
79 bic x0, x0, #CORTEX_A57_L2ECTLR_RET_CTRL_MASK
80 orr x0, x0, x1
81 msr CORTEX_A57_L2ECTLR_EL1, x0
84 mrs x0, CORTEX_A57_ECTLR_EL1
86 bic x0, x0, #CORTEX_A57_ECTLR_CPU_RET_CTRL_MASK
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-actmon.txt | 96 #CHECK: msr AMCR_EL0, x0
97 #CHECK: msr AMUSERENR_EL0, x0
98 #CHECK: msr AMCNTENCLR0_EL0, x0
99 #CHECK: msr AMCNTENSET0_EL0, x0
100 #CHECK: msr AMEVCNTR00_EL0, x0
101 #CHECK: msr AMEVCNTR01_EL0, x0
102 #CHECK: msr AMEVCNTR02_EL0, x0
103 #CHECK: msr AMEVCNTR03_EL0, x0
104 #CHECK: msr AMCNTENCLR1_EL0, x0
105 #CHECK: msr AMCNTENSET1_EL0, x0
[all …]
|
| D | armv8.4a-mpam.txt | 36 #CHECK: msr MPAM0_EL1, x0
37 #CHECK: msr MPAM1_EL1, x0
38 #CHECK: msr MPAM2_EL2, x0
39 #CHECK: msr MPAM3_EL3, x0
40 #CHECK: msr MPAM1_EL12, x0
41 #CHECK: msr MPAMHCR_EL2, x0
42 #CHECK: msr MPAMVPMV_EL2, x0
43 #CHECK: msr MPAMVPM0_EL2, x0
44 #CHECK: msr MPAMVPM1_EL2, x0
45 #CHECK: msr MPAMVPM2_EL2, x0
[all …]
|
| /external/libavc/common/armv8/ |
| D | ih264_padding_neon_av8.s | 92 sub x5, x0, x1
97 ld1 {v0.8b, v1.8b}, [x0], #16
180 sub x4, x0, x3
185 ldrb w8, [x0]
186 add x0, x0, x1
187 ldrb w9, [x0]
188 add x0, x0, x1
190 ldrb w10, [x0]
191 add x0, x0, x1
195 ldrb w11, [x0]
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-ldst-unscaled-pre-post.mir | 4 # CHECK: LDRSpost $x0, -4
8 liveins: $x0
10 $s0 = LDURSi $x0, 0
11 $x0 = SUBXri $x0, 4, 0
12 RET_ReallyLR implicit $x0
15 # CHECK: LDRDpost $x0, -4
19 liveins: $x0
21 $d0 = LDURDi $x0, 0
22 $x0 = SUBXri $x0, 4, 0
23 RET_ReallyLR implicit $x0
[all …]
|
| D | arm64-movi.ll | 12 ; CHECK-NEXT: mov x0, #30064771079
21 ; CHECK-NEXT: mov x0, #-4611686002321260541
30 ; CHECK-NEXT: mov x0, #-1229782938247303442
39 ; CHECK-NEXT: mov x0, #4503599627304960
49 ; CHECK-NEXT: orr x0, xzr, #0x4000000000
88 ; CHECK-NEXT: mov x0, #22136
89 ; CHECK-NEXT: movk x0, #43981, lsl #16
90 ; CHECK-NEXT: movk x0, #4660, lsl #32
91 ; CHECK-NEXT: movk x0, #5, lsl #48
99 ; CHECK-NEXT: mov x0, #1126236160
[all …]
|
| /external/u-boot/arch/arm/cpu/armv8/ |
| D | start.S | 67 adr x0, _start /* x0 <- Runtime value of _start */
69 sub x9, x0, x1 /* x9 <- Run-vs-link offset */
73 ldp x0, x1, [x2], #16 /* (x0, x1) <- (Link location, fixup) */
78 add x0, x0, x9
80 str x4, [x0]
95 adr x0, vectors
105 3: set_vbar vbar_el3, x0
106 mrs x0, scr_el3
107 orr x0, x0, #0xf /* SCR_EL3.NS|IRQ|FIQ|EA */
108 msr scr_el3, x0
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
| D | sqdecb.s | 14 sqdecb x0
20 sqdecb x0, all
26 sqdecb x0, all, mul #1
32 sqdecb x0, all, mul #16
43 sqdecb x0, w0
49 sqdecb x0, w0, all
55 sqdecb x0, w0, all, mul #1
61 sqdecb x0, w0, all, mul #16
67 sqdecb x0, w0, pow2
73 sqdecb x0, w0, pow2, mul #16
[all …]
|
| D | sqincb.s | 14 sqincb x0
20 sqincb x0, all
26 sqincb x0, all, mul #1
32 sqincb x0, all, mul #16
43 sqincb x0, w0
49 sqincb x0, w0, all
55 sqincb x0, w0, all, mul #1
61 sqincb x0, w0, all, mul #16
67 sqincb x0, w0, pow2
73 sqincb x0, w0, pow2, mul #16
[all …]
|
| D | incb.s | 10 incb x0
16 incb x0, all
22 incb x0, all, mul #1
28 incb x0, all, mul #16
34 incb x0, pow2
40 incb x0, vl1
46 incb x0, vl2
52 incb x0, vl3
58 incb x0, vl4
64 incb x0, vl5
[all …]
|
| D | sqincw.s | 14 sqincw x0
20 sqincw x0, all
26 sqincw x0, all, mul #1
32 sqincw x0, all, mul #16
43 sqincw x0, w0
49 sqincw x0, w0, all
55 sqincw x0, w0, all, mul #1
61 sqincw x0, w0, all, mul #16
67 sqincw x0, w0, pow2
73 sqincw x0, w0, pow2, mul #16
[all …]
|
| D | sqinch.s | 14 sqinch x0
20 sqinch x0, all
26 sqinch x0, all, mul #1
32 sqinch x0, all, mul #16
43 sqinch x0, w0
49 sqinch x0, w0, all
55 sqinch x0, w0, all, mul #1
61 sqinch x0, w0, all, mul #16
67 sqinch x0, w0, pow2
73 sqinch x0, w0, pow2, mul #16
[all …]
|
| D | sqdecd.s | 14 sqdecd x0
20 sqdecd x0, all
26 sqdecd x0, all, mul #1
32 sqdecd x0, all, mul #16
43 sqdecd x0, w0
49 sqdecd x0, w0, all
55 sqdecd x0, w0, all, mul #1
61 sqdecd x0, w0, all, mul #16
67 sqdecd x0, w0, pow2
73 sqdecd x0, w0, pow2, mul #16
[all …]
|
| D | sqdech.s | 14 sqdech x0
20 sqdech x0, all
26 sqdech x0, all, mul #1
32 sqdech x0, all, mul #16
43 sqdech x0, w0
49 sqdech x0, w0, all
55 sqdech x0, w0, all, mul #1
61 sqdech x0, w0, all, mul #16
67 sqdech x0, w0, pow2
73 sqdech x0, w0, pow2, mul #16
[all …]
|
| D | sqdecw.s | 14 sqdecw x0
20 sqdecw x0, all
26 sqdecw x0, all, mul #1
32 sqdecw x0, all, mul #16
43 sqdecw x0, w0
49 sqdecw x0, w0, all
55 sqdecw x0, w0, all, mul #1
61 sqdecw x0, w0, all, mul #16
67 sqdecw x0, w0, pow2
73 sqdecw x0, w0, pow2, mul #16
[all …]
|
| D | sqincd.s | 14 sqincd x0
20 sqincd x0, all
26 sqincd x0, all, mul #1
32 sqincd x0, all, mul #16
43 sqincd x0, w0
49 sqincd x0, w0, all
55 sqincd x0, w0, all, mul #1
61 sqincd x0, w0, all, mul #16
67 sqincd x0, w0, pow2
73 sqincd x0, w0, pow2, mul #16
[all …]
|
| D | uqincb.s | 14 uqincb x0
20 uqincb x0, all
26 uqincb x0, all, mul #1
32 uqincb x0, all, mul #16
84 uqincb x0, pow2
90 uqincb x0, vl1
96 uqincb x0, vl2
102 uqincb x0, vl3
108 uqincb x0, vl4
114 uqincb x0, vl5
[all …]
|
| D | uqdecb.s | 14 uqdecb x0
20 uqdecb x0, all
26 uqdecb x0, all, mul #1
32 uqdecb x0, all, mul #16
84 uqdecb x0, pow2
90 uqdecb x0, vl1
96 uqdecb x0, vl2
102 uqdecb x0, vl3
108 uqdecb x0, vl4
114 uqdecb x0, vl5
[all …]
|
| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | el3_common_macros.S | 35 mrs x0, sctlr_el3
36 orr x0, x0, x1
37 msr sctlr_el3, x0
79 mov_imm x0, ((SCR_RESET_VAL | SCR_EA_BIT | SCR_SIF_BIT) \
87 orr x0, x0, #(SCR_API_BIT | SCR_APK_BIT)
89 msr scr_el3, x0
124 mov_imm x0, ((MDCR_EL3_RESET_VAL | MDCR_SDD_BIT | \
129 msr mdcr_el3, x0
155 mov_imm x0, ((PMCR_EL0_RESET_VAL | PMCR_EL0_LP_BIT | \
159 msr pmcr_el0, x0
[all …]
|