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Searched refs:TEGRA_PKA1_BASE (Results 1 – 7 of 7) sorted by relevance

/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/drivers/se/
Dse.c195 se_regs[3] = mmio_read_32(TEGRA_PKA1_BASE + PKA1_MUTEX_WATCHDOG_NS_LIMIT); in tegra_se_suspend()
229 mmio_write_32(TEGRA_PKA1_BASE + PKA1_MUTEX_WATCHDOG_NS_LIMIT, se_regs[3]); in tegra_se_resume()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_psci_handlers.c119 se_regs[2] = mmio_read_32(TEGRA_PKA1_BASE + in tegra_soc_pwr_domain_suspend()
359 mmio_write_32(TEGRA_PKA1_BASE + PKA_MUTEX_WATCHDOG_NS_LIMIT, in tegra_soc_pwr_domain_on_finish()
Dplat_setup.c86 MAP_REGION_FLAT(TEGRA_PKA1_BASE, 0x10000U, /* 64KB */
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t210/
Dtegra_def.h255 #define TEGRA_PKA1_BASE U(0x70420000) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t186/
Dtegra_def.h209 #define TEGRA_PKA1_BASE U(0x03AD0000) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/include/t194/
Dtegra_def.h165 #define TEGRA_PKA1_BASE U(0x03AD0000) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_setup.c93 MAP_REGION_FLAT(TEGRA_PKA1_BASE, 0x1000U, /* 4KB */