| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | omod.ll | 15 %div2 = fmul float %add, 0.5
16 store float %div2, float addrspace(1)* %out.gep
31 %div2 = fmul float %add, 0.5
32 store float %div2, float addrspace(1)* %out.gep
42 %div2 = fmul float %add, 0.5
43 store float %div2, float addrspace(1)* undef
51 %div2 = fmul float %add, 0.5
52 store float %div2, float addrspace(1)* undef
60 %div2 = fmul float %add, 2.0
61 store float %div2, float addrspace(1)* undef
[all …]
|
| D | lds-oqap-crash.ll | 20 %div2 = udiv i32 %div1, 11
21 %div3 = udiv i32 %div2, %a
|
| D | structurize.ll | 71 %div2 = udiv i32 %div1, 11
72 %div3 = udiv i32 %div2, %a
|
| /external/llvm/test/CodeGen/X86/ |
| D | fdiv-combine.ll | 30 %div2 = fdiv arcp float %mul, %z
31 ret float %div2
45 %div2 = fdiv arcp float %mul, %z
46 ret float %div2
60 %div2 = fdiv float %mul, %z
61 ret float %div2
77 %div2 = fdiv arcp float %mul, %z
78 ret float %div2
93 %div2 = fdiv fast double %x, %y
94 %ret = fadd fast double %div2, %div1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | fdiv-combine.ll | 16 %div2 = fdiv float %c, %D
17 tail call void @foo_3f(float %div, float %div1, float %div2)
30 %div2 = fdiv double %c, %D
31 tail call void @foo_3d(double %div, double %div1, double %div2)
44 %div2 = fdiv <4 x float> %c, %D
45 tail call void @foo_3_4xf(<4 x float> %div, <4 x float> %div1, <4 x float> %div2)
58 %div2 = fdiv <2 x double> %c, %D
59 tail call void @foo_3_2xd(<2 x double> %div, <2 x double> %div1, <2 x double> %div2)
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | fdiv-combine.ll | 16 %div2 = fdiv float %c, %D
17 tail call void @foo_3f(float %div, float %div1, float %div2)
30 %div2 = fdiv double %c, %D
31 tail call void @foo_3d(double %div, double %div1, double %div2)
44 %div2 = fdiv <4 x float> %c, %D
45 tail call void @foo_3_4xf(<4 x float> %div, <4 x float> %div1, <4 x float> %div2)
58 %div2 = fdiv <2 x double> %c, %D
59 tail call void @foo_3_2xd(<2 x double> %div, <2 x double> %div1, <2 x double> %div2)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | fdiv-combine.ll | 30 %div2 = fdiv arcp float %mul, %z
31 ret float %div2
45 %div2 = fdiv arcp float %mul, %z
46 ret float %div2
60 %div2 = fdiv float %mul, %z
61 ret float %div2
77 %div2 = fdiv arcp float %mul, %z
78 ret float %div2
93 %div2 = fdiv fast double %x, %y
94 %ret = fadd fast double %div2, %div1
|
| /external/u-boot/drivers/clk/imx/ |
| D | clk-composite-8m.c | 59 int div1, div2; in imx8m_clk_composite_compute_dividers() local
67 for (div2 = 1; div2 <= PCG_DIV_MAX; div2++) { in imx8m_clk_composite_compute_dividers()
68 int new_error = ((parent_rate / div1) / div2) - rate; in imx8m_clk_composite_compute_dividers()
72 *postdiv = div2; in imx8m_clk_composite_compute_dividers()
|
| /external/u-boot/arch/arm/mach-sunxi/ |
| D | clock_sun8i_a83t.c | 111 unsigned int div1 = 0, div2 = 0; in clock_set_pll5() local
116 div2 << CCM_PLL5_DIV2_SHIFT | in clock_set_pll5()
132 int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> in clock_get_pll6() local
134 return 24000000 * n / div1 / div2; in clock_get_pll6()
|
| D | clock_sun50i_h6.c | 90 int div2 = ((rval & CCM_PLL6_CTRL_DIV2_MASK) >> in clock_get_pll6() local
93 return 24000000 / 4 * n / div1 / div2; in clock_get_pll6()
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | fdiv.ll | 37 %div2 = fdiv fast float %div1, %z
38 ret float %div2
46 %div2 = fdiv fast float %z, %div1
47 ret float %div2
|
| /external/llvm/test/Transforms/CodeGenPrepare/X86/ |
| D | select.ll | 63 %div2 = fdiv float %b, %a
65 %sel = select i1 %cmp, float %div1, float %div2
75 ; CHECK: %div2 = fdiv float %b, %a
78 ; CHECK: %sel = phi float [ %div1, %select.true.sink ], [ %div2, %select.false.sink ]
147 %div2 = sdiv i32 %b, %a
149 %sel = select i1 %cmp, i32 %div1, i32 %div2
153 ; CHECK: %sel = select i1 %cmp, i32 %div1, i32 %div2
|
| /external/u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| D | clock.h | 30 unsigned int div2; member
66 unsigned int div2; member
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | fdiv-combine.ll | 19 %div2 = fdiv double %c, %D
20 tail call void @foo_3d(double %div, double %div1, double %div2)
|
| D | ppc64-r2-alloc.ll | 9 %div2 = sdiv i32 %div1, %d
10 %div3 = sdiv i32 %div2, %d
69 %div62 = sdiv i32 %div61, %div2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | fdiv-combine.ll | 19 %div2 = fdiv double %c, %D
20 tail call void @foo_3d(double %div, double %div1, double %div2)
|
| D | ppc64-r2-alloc.ll | 9 %div2 = sdiv i32 %div1, %d
10 %div3 = sdiv i32 %div2, %d
69 %div62 = sdiv i32 %div61, %div2
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | lds-oqap-crash.ll | 20 %div2 = udiv i32 %div1, 11
21 %div3 = udiv i32 %div2, %a
|
| D | structurize.ll | 71 %div2 = udiv i32 %div1, 11
72 %div3 = udiv i32 %div2, %a
|
| /external/llvm/test/Transforms/InstSimplify/ |
| D | exact-nsw-nuw.ll | 54 ; CHECK-LABEL: @div2(
56 define i32 @div2(i32 %V) {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/ |
| D | exact-nsw-nuw.ll | 61 define i32 @div2(i32 %V) {
62 ; CHECK-LABEL: @div2(
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/ |
| D | fdiv.ll | 143 %div2 = fdiv arcp reassoc float %div1, %z
144 ret float %div2
156 %div2 = fdiv arcp reassoc <2 x float> %z, %div1
157 ret <2 x float> %div2
172 %div2 = fdiv fast float %div1, %z
174 ret float %div2
185 %div2 = fdiv fast float %z, %div1
187 ret float %div2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/ |
| D | complex-index.ll | 17 %div2 = lshr i64 %call1, 3
18 %mul = shl i64 %div2, 7
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/CodeGenPrepare/X86/ |
| D | select.ll | 81 %div2 = fdiv float %b, %a
83 %sel = select i1 %cmp, float %div1, float %div2
171 %div2 = sdiv i32 %b, %a
173 %sel = select i1 %cmp, i32 %div1, i32 %div2
|
| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | asm_macros.S | 211 div2: label
217 bhs div2
|