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1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
2 /*
3  * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _MSM_MDP_EXT_H_
7 #define _MSM_MDP_EXT_H_
8 
9 #include <linux/msm_mdp.h>
10 
11 #define MDP_IOCTL_MAGIC 'S'
12 /* atomic commit ioctl used for validate and commit request */
13 #define MSMFB_ATOMIC_COMMIT	_IOWR(MDP_IOCTL_MAGIC, 128, void *)
14 
15 /*
16  * Ioctl for updating the layer position asynchronously. Initially, pipes
17  * should be configured with MDP_LAYER_ASYNC flag set during the atomic commit,
18  * after which any number of position update calls can be made. This would
19  * enable multiple position updates within a single vsync. However, the screen
20  * update would happen only after vsync, which would pick the latest update.
21  *
22  * Limitations:
23  * - Currently supported only for video mode panels with single LM or dual LM
24  *   with source_split enabled.
25  * - Only position update is supported with no scaling/cropping.
26  * - Async layers should have unique z_order.
27  */
28 #define MSMFB_ASYNC_POSITION_UPDATE _IOWR(MDP_IOCTL_MAGIC, 129, \
29 					struct mdp_position_update)
30 
31 /*
32  * Ioctl for sending the config information.
33  * QSEED3 coefficeint LUT tables is passed by the user space using this IOCTL.
34  */
35 #define MSMFB_MDP_SET_CFG _IOW(MDP_IOCTL_MAGIC, 130, \
36 					      struct mdp_set_cfg)
37 
38 /*
39  * To allow proper structure padding for 64bit/32bit target
40  */
41 #ifdef __LP64
42 #define MDP_LAYER_COMMIT_V1_PAD 1
43 #else
44 #define MDP_LAYER_COMMIT_V1_PAD 2
45 #endif
46 
47 /*
48  * LAYER FLAG CONFIGURATION
49  */
50 /* left-right layer flip flag */
51 #define MDP_LAYER_FLIP_LR		0x1
52 
53 /* up-down layer flip flag */
54 #define MDP_LAYER_FLIP_UD		0x2
55 
56 /*
57  * This flag enables pixel extension for the current layer. Validate/commit
58  * call uses scale parameters when this flag is enabled.
59  */
60 #define MDP_LAYER_ENABLE_PIXEL_EXT	0x4
61 
62 /* Flag indicates that layer is foreground layer */
63 #define MDP_LAYER_FORGROUND		0x8
64 
65 /* Flag indicates that layer is associated with secure session */
66 #define MDP_LAYER_SECURE_SESSION	0x10
67 
68 /*
69  * Flag indicates that layer is drawing solid fill. Validate/commit call
70  * does not expect buffer when this flag is enabled.
71  */
72 #define MDP_LAYER_SOLID_FILL		0x20
73 
74 /* Layer format is deinterlace */
75 #define MDP_LAYER_DEINTERLACE		0x40
76 
77 /* layer contains bandwidth compressed format data */
78 #define MDP_LAYER_BWC			0x80
79 
80 /* layer is async position updatable */
81 #define MDP_LAYER_ASYNC			0x100
82 
83 /* layer contains postprocessing configuration data */
84 #define MDP_LAYER_PP			0x200
85 
86 /* Flag indicates that layer is associated with secure display session */
87 #define MDP_LAYER_SECURE_DISPLAY_SESSION 0x400
88 
89 /* Flag enabled qseed3 scaling for the current layer */
90 #define MDP_LAYER_ENABLE_QSEED3_SCALE   0x800
91 
92 /*
93  * layer will work in multirect mode, where single hardware should
94  * fetch multiple rectangles with a single hardware
95  */
96 #define MDP_LAYER_MULTIRECT_ENABLE		0x1000
97 
98 /*
99  * if flag present and multirect is enabled, multirect will work in parallel
100  * fetch mode, otherwise it will default to serial fetch mode.
101  */
102 #define MDP_LAYER_MULTIRECT_PARALLEL_MODE	0x2000
103 
104 /*
105  * DESTINATION SCALER FLAG CONFIGURATION
106  */
107 
108 /* Enable/disable Destination scaler */
109 #define MDP_DESTSCALER_ENABLE		0x1
110 
111 /*
112  * Indicating mdp_destination_scaler_data contains
113  * Scaling parameter update. Can be set anytime.
114  */
115 #define MDP_DESTSCALER_SCALE_UPDATE	0x2
116 
117 /*
118  * Indicating mdp_destination_scaler_data contains
119  * Detail enhancement setting update. Can be set anytime.
120  */
121 #define MDP_DESTSCALER_ENHANCER_UPDATE	0x4
122 
123 /*
124  * VALIDATE/COMMIT FLAG CONFIGURATION
125  */
126 
127 /*
128  * Client enables it to inform that call is to validate layers before commit.
129  * If this flag is not set then driver will use MSMFB_ATOMIC_COMMIT for commit.
130  */
131 #define MDP_VALIDATE_LAYER			0x01
132 
133 /*
134  * This flag is only valid for commit call. Commit behavior is synchronous
135  * when this flag is defined. It blocks current call till processing is
136  * complete. Behavior is asynchronous otherwise.
137  */
138 #define MDP_COMMIT_WAIT_FOR_FINISH		0x02
139 
140 /*
141  * This flag is only valid for commit call and used for debugging purpose. It
142  * forces the to wait for sync fences.
143  */
144 #define MDP_COMMIT_SYNC_FENCE_WAIT		0x04
145 
146 /* Flag to enable AVR(Adaptive variable refresh) feature. */
147 #define MDP_COMMIT_AVR_EN			0x08
148 
149 /*
150  * Flag to select one shot mode when AVR feature is enabled.
151  * Default mode is continuous mode.
152  */
153 #define MDP_COMMIT_AVR_ONE_SHOT_MODE		0x10
154 
155 /* Flag to update brightness when commit */
156 #define MDP_COMMIT_UPDATE_BRIGHTNESS		0x40
157 
158 /* Flag to enable concurrent writeback for the frame */
159 #define MDP_COMMIT_CWB_EN 0x800
160 
161 /*
162  * Flag to select DSPP as the data point for CWB. If CWB
163  * is enabled without this flag, LM will be selected as data point.
164  */
165 #define MDP_COMMIT_CWB_DSPP 0x1000
166 
167 #define MDP_COMMIT_VERSION_1_0		0x00010000
168 
169 /*
170  * Configuration structures
171  * All parameters are input to driver unless mentioned output parameter
172  * explicitly.
173  */
174 struct mdp_layer_plane {
175 	/* DMA buffer file descriptor information. */
176 	int fd;
177 
178 	/* Pixel offset in the dma buffer. */
179 	uint32_t offset;
180 
181 	/* Number of bytes in one scan line including padding bytes. */
182 	uint32_t stride;
183 };
184 
185 struct mdp_layer_buffer {
186 	/* layer width in pixels. */
187 	uint32_t width;
188 
189 	/* layer height in pixels. */
190 	uint32_t height;
191 
192 	/*
193 	 * layer format in DRM-style fourcc, refer drm_fourcc.h for
194 	 * standard formats
195 	 */
196 	uint32_t format;
197 
198 	/* plane to hold the fd, offset, etc for all color components */
199 	struct mdp_layer_plane planes[MAX_PLANES];
200 
201 	/* valid planes count in layer planes list */
202 	uint32_t plane_count;
203 
204 	/* compression ratio factor, value depends on the pixel format */
205 	struct mult_factor comp_ratio;
206 
207 	/*
208 	 * SyncFence associated with this buffer. It is used in two ways.
209 	 *
210 	 * 1. Driver waits to consume the buffer till producer signals in case
211 	 * of primary and external display.
212 	 *
213 	 * 2. Writeback device uses buffer structure for output buffer where
214 	 * driver is producer. However, client sends the fence with buffer to
215 	 * indicate that consumer is still using the buffer and it is not ready
216 	 * for new content.
217 	 */
218 	int	 fence;
219 
220 	/* 32bits reserved value for future usage. */
221 	uint32_t reserved;
222 };
223 
224 /*
225  * One layer holds configuration for one pipe. If client wants to stage single
226  * layer on two pipes then it should send two different layers with relative
227  * (x,y) information. Client must send same information during validate and
228  * commit call. Commit call may fail if client sends different layer information
229  * attached to same pipe during validate and commit. Device invalidate the pipe
230  * once it receives the vsync for that commit.
231  */
232 struct mdp_input_layer {
233 	/*
234 	 * Flag to enable/disable properties for layer configuration. Refer
235 	 * layer flag configuration section for all possible flags.
236 	 */
237 	uint32_t		flags;
238 
239 	/*
240 	 * Pipe selection for this layer by client. Client provides the index
241 	 * in validate and commit call. Device reserves the pipe once validate
242 	 * is successful. Device only uses validated pipe during commit call.
243 	 * If client sends different layer/pipe configuration in validate &
244 	 * commit then commit may fail.
245 	 */
246 	uint32_t		pipe_ndx;
247 
248 	/*
249 	 * Horizontal decimation value, this indicates the amount of pixels
250 	 * dropped for each pixel that is fetched from a line. It does not
251 	 * result in bandwidth reduction because pixels are still fetched from
252 	 * memory but dropped internally by hardware.
253 	 * The decimation value given should be power of two of decimation
254 	 * amount.
255 	 * 0: no decimation
256 	 * 1: decimate by 2 (drop 1 pixel for each pixel fetched)
257 	 * 2: decimate by 4 (drop 3 pixels for each pixel fetched)
258 	 * 3: decimate by 8 (drop 7 pixels for each pixel fetched)
259 	 * 4: decimate by 16 (drop 15 pixels for each pixel fetched)
260 	 */
261 	uint8_t			horz_deci;
262 
263 	/*
264 	 * Vertical decimation value, this indicates the amount of lines
265 	 * dropped for each line that is fetched from overlay. It saves
266 	 * bandwidth because decimated pixels are not fetched.
267 	 * The decimation value given should be power of two of decimation
268 	 * amount.
269 	 * 0: no decimation
270 	 * 1: decimation by 2 (drop 1 line for each line fetched)
271 	 * 2: decimation by 4 (drop 3 lines for each line fetched)
272 	 * 3: decimation by 8 (drop 7 lines for each line fetched)
273 	 * 4: decimation by 16 (drop 15 lines for each line fetched)
274 	 */
275 	uint8_t			vert_deci;
276 
277 	/*
278 	 * Used to set plane opacity. The range can be from 0-255, where
279 	 * 0 means completely transparent and 255 means fully opaque.
280 	 */
281 	uint8_t			alpha;
282 
283 	/*
284 	 * Blending stage to occupy in display, if multiple layers are present,
285 	 * highest z_order usually means the top most visible layer. The range
286 	 * acceptable is from 0-7 to support blending up to 8 layers.
287 	 */
288 	uint16_t		z_order;
289 
290 	/*
291 	 * Color used as color key for transparency. Any pixel in fetched
292 	 * image matching this color will be transparent when blending.
293 	 * The color should be in same format as the source image format.
294 	 */
295 	uint32_t		transp_mask;
296 
297 	/*
298 	 * Solid color used to fill the overlay surface when no source
299 	 * buffer is provided.
300 	 */
301 	uint32_t		bg_color;
302 
303 	/* blend operation defined in "mdss_mdp_blend_op" enum. */
304 	enum mdss_mdp_blend_op		blend_op;
305 
306 	/* color space of the source */
307 	enum mdp_color_space	color_space;
308 
309 	/*
310 	 * Source crop rectangle, portion of image that will be fetched. This
311 	 * should always be within boundaries of source image.
312 	 */
313 	struct mdp_rect		src_rect;
314 
315 	/*
316 	 * Destination rectangle, the position and size of image on screen.
317 	 * This should always be within panel boundaries.
318 	 */
319 	struct mdp_rect		dst_rect;
320 
321 	/* Scaling parameters. */
322 	void *scale;
323 
324 	/* Buffer attached with each layer. Device uses it for commit call. */
325 	struct mdp_layer_buffer	buffer;
326 
327 	/*
328 	 * Source side post processing configuration information for each
329 	 * layer.
330 	 */
331 	void 	*pp_info;
332 
333 	/*
334 	 * This is an output parameter.
335 	 *
336 	 * Only for validate call. Frame buffer device sets error code
337 	 * based on validate call failure scenario.
338 	 */
339 	int			error_code;
340 
341 	/* 32bits reserved value for future usage. */
342 	uint32_t		reserved[6];
343 };
344 
345 struct mdp_output_layer {
346 	/*
347 	 * Flag to enable/disable properties for layer configuration. Refer
348 	 * layer flag config section for all possible flags.
349 	 */
350 	uint32_t			flags;
351 
352 	/*
353 	 * Writeback destination selection for output. Client provides the index
354 	 * in validate and commit call.
355 	 */
356 	uint32_t			writeback_ndx;
357 
358 	/* Buffer attached with output layer. Device uses it for commit call */
359 	struct mdp_layer_buffer		buffer;
360 
361 	/* color space of the destination */
362 	enum mdp_color_space            color_space;
363 
364 	/* 32bits reserved value for future usage. */
365 	uint32_t			reserved[5];
366 };
367 
368 /*
369  * Destination scaling info structure holds setup parameters for upscaling
370  * setting in the destination scaling block.
371  */
372 struct mdp_destination_scaler_data {
373 	/*
374 	 * Flag to switch between mode for destination scaler. Please Refer to
375 	 * destination scaler flag config for all possible setting.
376 	 */
377 	uint32_t			flags;
378 
379 	/*
380 	 * Destination scaler selection index. Client provides the index in
381 	 * validate and commit call.
382 	 */
383 	uint32_t			dest_scaler_ndx;
384 
385 	/*
386 	 * LM width configuration per Destination scaling updates
387 	 */
388 	uint32_t			lm_width;
389 
390 	/*
391 	 * LM height configuration per Destination scaling updates
392 	 */
393 	uint32_t			lm_height;
394 
395 	/*
396 	 * The scaling parameters for all the mode except disable. For
397 	 * disabling the scaler, there is no need to provide the scale.
398 	 * A userspace pointer points to struct mdp_scale_data_v2.
399 	 */
400 	uint64_t	scale;
401 };
402 
403 /* Enable Deterministic Frame Rate Control (FRC) */
404 #define MDP_VIDEO_FRC_ENABLE (1 << 0)
405 
406 struct mdp_frc_info {
407 	/* flags to control FRC feature */
408 	uint32_t flags;
409 	/* video frame count per frame */
410 	uint32_t frame_cnt;
411 	/* video timestamp per frame in millisecond unit */
412 	int64_t timestamp;
413 };
414 
415 /*
416  * Commit structure holds layer stack send by client for validate and commit
417  * call. If layers are different between validate and commit call then commit
418  * call will also do validation. In such case, commit may fail.
419  */
420 struct mdp_layer_commit_v1 {
421 	/*
422 	 * Flag to enable/disable properties for commit/validate call. Refer
423 	 * validate/commit flag config section for all possible flags.
424 	 */
425 	uint32_t		flags;
426 
427 	/*
428 	 * This is an output parameter.
429 	 *
430 	 * Frame buffer device provides release fence handle to client. It
431 	 * triggers release fence when display hardware has consumed all the
432 	 * buffers attached to this commit call and buffer is ready for reuse
433 	 * for primary and external. For writeback case, it triggers it when
434 	 * output buffer is ready for consumer.
435 	 */
436 	int			release_fence;
437 
438 	/*
439 	 * Left_roi is optional configuration. Client configures it only when
440 	 * partial update is enabled. It defines the "region of interest" on
441 	 * left part of panel when it is split display. For non-split display,
442 	 * it defines the "region of interest" on the panel.
443 	 */
444 	struct mdp_rect		left_roi;
445 
446 	/*
447 	 * Right_roi is optional configuration. Client configures it only when
448 	 * partial update is enabled. It defines the "region of interest" on
449 	 * right part of panel for split display configuration. It is not
450 	 * required for non-split display.
451 	 */
452 	struct mdp_rect		right_roi;
453 
454 	 /* Pointer to a list of input layers for composition. */
455 	struct mdp_input_layer *input_layers;
456 
457 	/* Input layer count present in input list */
458 	uint32_t		input_layer_cnt;
459 
460 	/*
461 	 * Output layer for writeback display. It supports only one
462 	 * layer as output layer. This is not required for primary
463 	 * and external displays
464 	 */
465 	struct mdp_output_layer *output_layer;
466 
467 	/*
468 	 * This is an output parameter.
469 	 *
470 	 * Frame buffer device provides retire fence handle if
471 	 * COMMIT_RETIRE_FENCE flag is set in commit call. It triggers
472 	 * retire fence when current layers are swapped with new layers
473 	 * on display hardware. For video mode panel and writeback,
474 	 * retire fence and release fences are triggered at the same
475 	 * time while command mode panel triggers release fence first
476 	 * (on pingpong done) and retire fence (on rdptr done)
477 	 * after that.
478 	 */
479 	int			retire_fence;
480 
481 	/*
482 	 * Scaler data and control for setting up destination scaler.
483 	 * A userspace pointer that points to a list of
484 	 * struct mdp_destination_scaler_data.
485 	 */
486 	void 	*dest_scaler;
487 
488 	/*
489 	 * Represents number of Destination scaler data provied by userspace.
490 	 */
491 	uint32_t		dest_scaler_cnt;
492 
493 	/* FRC info per device which contains frame count and timestamp */
494 	struct mdp_frc_info *frc_info;
495 
496 	/* Backlight level that would update when display commit */
497 	uint32_t		bl_level;
498 
499 	/* 32-bits reserved value for future usage. */
500 	uint32_t		reserved[MDP_LAYER_COMMIT_V1_PAD];
501 };
502 
503 /*
504  * mdp_overlay_list - argument for ioctl MSMFB_ATOMIC_COMMIT
505  */
506 struct mdp_layer_commit {
507 	/*
508 	 * 32bit version indicates the commit structure selection
509 	 * from union. Lower 16bits indicates the minor version while
510 	 * higher 16bits indicates the major version. It selects the
511 	 * commit structure based on major version selection. Minor version
512 	 * indicates that reserved fields are in use.
513 	 *
514 	 * Current supported version is 1.0 (Major:1 Minor:0)
515 	 */
516 	uint32_t version;
517 	union {
518 		/* Layer commit/validate definition for V1 */
519 		struct mdp_layer_commit_v1 commit_v1;
520 	};
521 };
522 
523 struct mdp_point {
524 	uint32_t x;
525 	uint32_t y;
526 };
527 
528 /*
529  * Async updatable layers. One layer holds configuration for one pipe.
530  */
531 struct mdp_async_layer {
532 	/*
533 	 * Flag to enable/disable properties for layer configuration. Refer
534 	 * layer flag config section for all possible flags.
535 	 */
536 	uint32_t flags;
537 
538 	/*
539 	 * Pipe selection for this layer by client. Client provides the
540 	 * pipe index that the device reserved during ATOMIC_COMMIT.
541 	 */
542 	uint32_t		pipe_ndx;
543 
544 	/* Source start x,y. */
545 	struct mdp_point	src;
546 
547 	/* Destination start x,y. */
548 	struct mdp_point	dst;
549 
550 	/*
551 	 * This is an output parameter.
552 	 *
553 	 * Frame buffer device sets error code based on the failure.
554 	 */
555 	int			error_code;
556 
557 	uint32_t		reserved[3];
558 };
559 
560 /*
561  * mdp_position_update - argument for ioctl MSMFB_ASYNC_POSITION_UPDATE
562  */
563 struct mdp_position_update {
564 	 /* Pointer to a list of async updatable input layers */
565 	struct mdp_async_layer *input_layers;
566 
567 	/* Input layer count present in input list */
568 	uint32_t input_layer_cnt;
569 };
570 
571 #define MAX_DET_CURVES		3
572 struct mdp_det_enhance_data {
573 	uint32_t enable;
574 	int16_t sharpen_level1;
575 	int16_t sharpen_level2;
576 	uint16_t clip;
577 	uint16_t limit;
578 	uint16_t thr_quiet;
579 	uint16_t thr_dieout;
580 	uint16_t thr_low;
581 	uint16_t thr_high;
582 	uint16_t prec_shift;
583 	int16_t adjust_a[MAX_DET_CURVES];
584 	int16_t adjust_b[MAX_DET_CURVES];
585 	int16_t adjust_c[MAX_DET_CURVES];
586 };
587 
588 /* Flags to enable Scaler and its sub components */
589 #define ENABLE_SCALE			0x1
590 #define ENABLE_DETAIL_ENHANCE		0x2
591 #define ENABLE_DIRECTION_DETECTION	0x4
592 
593 /* LUT configuration flags */
594 #define SCALER_LUT_SWAP			0x1
595 #define SCALER_LUT_DIR_WR		0x2
596 #define SCALER_LUT_Y_CIR_WR		0x4
597 #define SCALER_LUT_UV_CIR_WR		0x8
598 #define SCALER_LUT_Y_SEP_WR		0x10
599 #define SCALER_LUT_UV_SEP_WR		0x20
600 
601 /* Y/RGB and UV filter configuration */
602 #define FILTER_EDGE_DIRECTED_2D		0x0
603 #define FILTER_CIRCULAR_2D		0x1
604 #define FILTER_SEPARABLE_1D		0x2
605 #define FILTER_BILINEAR			0x3
606 
607 /* Alpha filters */
608 #define FILTER_ALPHA_DROP_REPEAT	0x0
609 #define FILTER_ALPHA_BILINEAR		0x1
610 
611 /**
612  * struct mdp_scale_data_v2
613  * Driver uses this new Data structure for storing all scaling params
614  * This structure contains all pixel extension data and QSEED3 filter
615  * configuration and coefficient table indices
616  */
617 struct mdp_scale_data_v2 {
618 	uint32_t enable;
619 
620 	/* Init phase values */
621 	int32_t init_phase_x[MAX_PLANES];
622 	int32_t phase_step_x[MAX_PLANES];
623 	int32_t init_phase_y[MAX_PLANES];
624 	int32_t phase_step_y[MAX_PLANES];
625 
626 	/*
627 	 * This should be set to toal horizontal pixels
628 	 * left + right +  width
629 	 */
630 	uint32_t num_ext_pxls_left[MAX_PLANES];
631 
632 	/* Unused param for backward compatibility */
633 	uint32_t num_ext_pxls_right[MAX_PLANES];
634 
635 	/*
636 	 * This should be set to vertical pixels
637 	 * top + bottom + height
638 	 */
639 	uint32_t num_ext_pxls_top[MAX_PLANES];
640 
641 	/* Unused param for backward compatibility */
642 	uint32_t num_ext_pxls_btm[MAX_PLANES];
643 
644 	/* over fetch pixels */
645 	int32_t left_ftch[MAX_PLANES];
646 	int32_t left_rpt[MAX_PLANES];
647 	int32_t right_ftch[MAX_PLANES];
648 	int32_t right_rpt[MAX_PLANES];
649 
650 	/* Repeat pixels */
651 	uint32_t top_rpt[MAX_PLANES];
652 	uint32_t btm_rpt[MAX_PLANES];
653 	uint32_t top_ftch[MAX_PLANES];
654 	uint32_t btm_ftch[MAX_PLANES];
655 
656 	uint32_t roi_w[MAX_PLANES];
657 
658 	/*
659 	 * alpha plane can only be scaled using bilinear or pixel
660 	 * repeat/drop, specify these for Y and UV planes only
661 	 */
662 	uint32_t preload_x[MAX_PLANES];
663 	uint32_t preload_y[MAX_PLANES];
664 	uint32_t src_width[MAX_PLANES];
665 	uint32_t src_height[MAX_PLANES];
666 
667 	uint32_t dst_width;
668 	uint32_t dst_height;
669 
670 	uint32_t y_rgb_filter_cfg;
671 	uint32_t uv_filter_cfg;
672 	uint32_t alpha_filter_cfg;
673 	uint32_t blend_cfg;
674 
675 	uint32_t lut_flag;
676 	uint32_t dir_lut_idx;
677 
678 	/* for Y(RGB) and UV planes*/
679 	uint32_t y_rgb_cir_lut_idx;
680 	uint32_t uv_cir_lut_idx;
681 	uint32_t y_rgb_sep_lut_idx;
682 	uint32_t uv_sep_lut_idx;
683 
684 	struct mdp_det_enhance_data detail_enhance;
685 
686 	/* reserved value for future usage. */
687 	uint64_t reserved[8];
688 };
689 
690 /**
691  * struct mdp_scale_luts_info
692  * This struct pointer is received as payload in SET_CFG_IOCTL when the flags
693  * is set to MDP_QSEED3_LUT_CFG
694  * @dir_lut:      Direction detection coefficients table
695  * @cir_lut:      Circular coefficeints table
696  * @sep_lut:      Separable coefficeints table
697  * @dir_lut_size: Size of direction coefficients table
698  * @cir_lut_size: Size of circular coefficients table
699  * @sep_lut_size: Size of separable coefficients table
700  */
701 struct mdp_scale_luts_info {
702 	uint64_t dir_lut;
703 	uint64_t cir_lut;
704 	uint64_t sep_lut;
705 	uint32_t dir_lut_size;
706 	uint32_t cir_lut_size;
707 	uint32_t sep_lut_size;
708 };
709 
710 #define MDP_QSEED3_LUT_CFG 0x1
711 
712 struct mdp_set_cfg {
713 	uint64_t flags;
714 	uint32_t len;
715 	uint64_t payload;
716 };
717 #endif
718