1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 /* 3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __UAPI_CAM_ISP_H__ 7 #define __UAPI_CAM_ISP_H__ 8 9 #include <media/cam_defs.h> 10 #include <media/cam_isp_vfe.h> 11 #include <media/cam_isp_ife.h> 12 #include <media/cam_cpas.h> 13 14 /* ISP driver name */ 15 #define CAM_ISP_DEV_NAME "cam-isp" 16 17 /* HW type */ 18 #define CAM_ISP_HW_BASE 0 19 #define CAM_ISP_HW_CSID 1 20 #define CAM_ISP_HW_VFE 2 21 #define CAM_ISP_HW_IFE 3 22 #define CAM_ISP_HW_ISPIF 4 23 #define CAM_ISP_HW_MAX 5 24 25 /* Color Pattern */ 26 #define CAM_ISP_PATTERN_BAYER_RGRGRG 0 27 #define CAM_ISP_PATTERN_BAYER_GRGRGR 1 28 #define CAM_ISP_PATTERN_BAYER_BGBGBG 2 29 #define CAM_ISP_PATTERN_BAYER_GBGBGB 3 30 #define CAM_ISP_PATTERN_YUV_YCBYCR 4 31 #define CAM_ISP_PATTERN_YUV_YCRYCB 5 32 #define CAM_ISP_PATTERN_YUV_CBYCRY 6 33 #define CAM_ISP_PATTERN_YUV_CRYCBY 7 34 #define CAM_ISP_PATTERN_MAX 8 35 36 /* Usage Type */ 37 #define CAM_ISP_RES_USAGE_SINGLE 0 38 #define CAM_ISP_RES_USAGE_DUAL 1 39 #define CAM_ISP_RES_USAGE_MAX 2 40 41 /* Resource ID */ 42 #define CAM_ISP_RES_ID_PORT 0 43 #define CAM_ISP_RES_ID_CLK 1 44 #define CAM_ISP_RES_ID_MAX 2 45 46 /* Resource Type - Type of resource for the resource id 47 * defined in cam_isp_vfe.h, cam_isp_ife.h 48 */ 49 50 /* Lane Type in input resource for Port */ 51 #define CAM_ISP_LANE_TYPE_DPHY 0 52 #define CAM_ISP_LANE_TYPE_CPHY 1 53 #define CAM_ISP_LANE_TYPE_MAX 2 54 55 /* ISP Resurce Composite Group ID */ 56 #define CAM_ISP_RES_COMP_GROUP_NONE 0 57 #define CAM_ISP_RES_COMP_GROUP_ID_0 1 58 #define CAM_ISP_RES_COMP_GROUP_ID_1 2 59 #define CAM_ISP_RES_COMP_GROUP_ID_2 3 60 #define CAM_ISP_RES_COMP_GROUP_ID_3 4 61 #define CAM_ISP_RES_COMP_GROUP_ID_4 5 62 #define CAM_ISP_RES_COMP_GROUP_ID_5 6 63 #define CAM_ISP_RES_COMP_GROUP_ID_MAX 6 64 65 /* ISP packet opcode for ISP */ 66 #define CAM_ISP_PACKET_OP_BASE 0 67 #define CAM_ISP_PACKET_INIT_DEV 1 68 #define CAM_ISP_PACKET_UPDATE_DEV 2 69 #define CAM_ISP_PACKET_OP_MAX 3 70 71 /* ISP packet meta_data type for command buffer */ 72 #define CAM_ISP_PACKET_META_BASE 0 73 #define CAM_ISP_PACKET_META_LEFT 1 74 #define CAM_ISP_PACKET_META_RIGHT 2 75 #define CAM_ISP_PACKET_META_COMMON 3 76 #define CAM_ISP_PACKET_META_DMI_LEFT 4 77 #define CAM_ISP_PACKET_META_DMI_RIGHT 5 78 #define CAM_ISP_PACKET_META_DMI_COMMON 6 79 #define CAM_ISP_PACKET_META_CLOCK 7 80 #define CAM_ISP_PACKET_META_CSID 8 81 #define CAM_ISP_PACKET_META_DUAL_CONFIG 9 82 #define CAM_ISP_PACKET_META_GENERIC_BLOB_LEFT 10 83 #define CAM_ISP_PACKET_META_GENERIC_BLOB_RIGHT 11 84 #define CAM_ISP_PACKET_META_GENERIC_BLOB_COMMON 12 85 #define CAM_ISP_PACKET_META_REG_DUMP_PER_REQUEST 13 86 #define CAM_ISP_PACKET_META_REG_DUMP_ON_FLUSH 14 87 #define CAM_ISP_PACKET_META_REG_DUMP_ON_ERROR 15 88 89 /* DSP mode */ 90 #define CAM_ISP_DSP_MODE_NONE 0 91 #define CAM_ISP_DSP_MODE_ONE_WAY 1 92 #define CAM_ISP_DSP_MODE_ROUND 2 93 94 /* ISP Generic Cmd Buffer Blob types */ 95 #define CAM_ISP_GENERIC_BLOB_TYPE_HFR_CONFIG 0 96 #define CAM_ISP_GENERIC_BLOB_TYPE_CLOCK_CONFIG 1 97 #define CAM_ISP_GENERIC_BLOB_TYPE_BW_CONFIG 2 98 #define CAM_ISP_GENERIC_BLOB_TYPE_UBWC_CONFIG 3 99 #define CAM_ISP_GENERIC_BLOB_TYPE_CSID_CLOCK_CONFIG 4 100 #define CAM_ISP_GENERIC_BLOB_TYPE_FE_CONFIG 5 101 #define CAM_ISP_GENERIC_BLOB_TYPE_UBWC_CONFIG_V2 6 102 #define CAM_ISP_GENERIC_BLOB_TYPE_IFE_CORE_CONFIG 7 103 #define CAM_ISP_GENERIC_BLOB_TYPE_VFE_OUT_CONFIG 8 104 #define CAM_ISP_GENERIC_BLOB_TYPE_BW_CONFIG_V2 9 105 #define CAM_ISP_GENERIC_BLOB_TYPE_CSID_CONFIG 10 106 #define CAM_ISP_GENERIC_BLOB_TYPE_SENSOR_DIMENSION_CONFIG 11 107 #define CAM_ISP_GENERIC_BLOB_TYPE_CSID_QCFA_CONFIG 12 108 109 #define CAM_ISP_VC_DT_CFG 4 110 111 #define CAM_ISP_IFE0_HW 0x1 112 #define CAM_ISP_IFE1_HW 0x2 113 #define CAM_ISP_IFE0_LITE_HW 0x4 114 #define CAM_ISP_IFE1_LITE_HW 0x8 115 #define CAM_ISP_IFE2_LITE_HW 0x10 116 #define CAM_ISP_IFE2_HW 0x100 117 118 #define CAM_ISP_PXL_PATH 0x1 119 #define CAM_ISP_PPP_PATH 0x2 120 #define CAM_ISP_LCR_PATH 0x4 121 #define CAM_ISP_RDI0_PATH 0x8 122 #define CAM_ISP_RDI1_PATH 0x10 123 #define CAM_ISP_RDI2_PATH 0x20 124 #define CAM_ISP_RDI3_PATH 0x40 125 126 /* Per Path Usage Data */ 127 #define CAM_ISP_USAGE_INVALID 0 128 #define CAM_ISP_USAGE_LEFT_PX 1 129 #define CAM_ISP_USAGE_RIGHT_PX 2 130 #define CAM_ISP_USAGE_RDI 3 131 132 /* Acquire with custom hw */ 133 #define CAM_ISP_ACQ_CUSTOM_NONE 0 134 #define CAM_ISP_ACQ_CUSTOM_PRIMARY 1 135 #define CAM_ISP_ACQ_CUSTOM_SECONDARY 2 136 137 #define CAM_IFE_CSID_RDI_MAX 4 138 139 /* Query devices */ 140 /** 141 * struct cam_isp_dev_cap_info - A cap info for particular hw type 142 * 143 * @hw_type: Hardware type for the cap info 144 * @reserved: reserved field for alignment 145 * @hw_version: Hardware version 146 * 147 */ 148 struct cam_isp_dev_cap_info { 149 uint32_t hw_type; 150 uint32_t reserved; 151 struct cam_hw_version hw_version; 152 }; 153 154 /** 155 * struct cam_isp_query_cap_cmd - ISP query device capability payload 156 * 157 * @device_iommu: returned iommu handles for device 158 * @cdm_iommu: returned iommu handles for cdm 159 * @num_dev: returned number of device capabilities 160 * @reserved: reserved field for alignment 161 * @dev_caps: returned device capability array 162 * 163 */ 164 struct cam_isp_query_cap_cmd { 165 struct cam_iommu_handle device_iommu; 166 struct cam_iommu_handle cdm_iommu; 167 int32_t num_dev; 168 uint32_t reserved; 169 struct cam_isp_dev_cap_info dev_caps[CAM_ISP_HW_MAX]; 170 }; 171 172 /* Acquire Device */ 173 /** 174 * struct cam_isp_out_port_info - An output port resource info 175 * 176 * @res_type: output resource type defined in file 177 * cam_isp_vfe.h or cam_isp_ife.h 178 * @format: output format of the resource 179 * @wdith: output width in pixels 180 * @height: output height in lines 181 * @comp_grp_id: composite group id for the resource. 182 * @split_point: split point in pixels for the dual VFE. 183 * @secure_mode: flag to tell if output should be run in secure 184 * mode or not. See cam_defs.h for definition 185 * @reserved: reserved field for alignment 186 * 187 */ 188 struct cam_isp_out_port_info { 189 uint32_t res_type; 190 uint32_t format; 191 uint32_t width; 192 uint32_t height; 193 uint32_t comp_grp_id; 194 uint32_t split_point; 195 uint32_t secure_mode; 196 uint32_t reserved; 197 }; 198 199 /** 200 * struct cam_isp_out_port_info_v2 - An output port resource info 201 * 202 * @res_type: output resource type defined in file 203 * cam_isp_vfe.h or cam_isp_ife.h 204 * @format: output format of the resource 205 * @wdith: output width in pixels 206 * @height: output height in lines 207 * @comp_grp_id: composite group id for the resource. 208 * @split_point: split point in pixels for the dual VFE. 209 * @secure_mode: flag to tell if output should be run in secure 210 * mode or not. See cam_defs.h for definition 211 * @wm_mode: WM mode 212 * @out_port_res1: Output reserved field 213 * @out_port_res2: Output reserved field 214 * 215 */ 216 struct cam_isp_out_port_info_v2 { 217 uint32_t res_type; 218 uint32_t format; 219 uint32_t width; 220 uint32_t height; 221 uint32_t comp_grp_id; 222 uint32_t split_point; 223 uint32_t secure_mode; 224 uint32_t wm_mode; 225 uint32_t out_port_res1; 226 uint32_t out_port_res2; 227 }; 228 229 /** 230 * struct cam_isp_in_port_info - An input port resource info 231 * 232 * @res_type: input resource type define in file 233 * cam_isp_vfe.h or cam_isp_ife.h 234 * @lane_type: lane type: c-phy or d-phy. 235 * @lane_num: active lane number 236 * @lane_cfg: lane configurations: 4 bits per lane 237 * @vc: input virtual channel number 238 * @dt: input data type number 239 * @format: input format 240 * @test_pattern: test pattern for the testgen 241 * @usage_type: whether dual vfe is required 242 * @left_start: left input start offset in pixels 243 * @left_stop: left input stop offset in pixels 244 * @left_width: left input width in pixels 245 * @right_start: right input start offset in pixels. 246 * Only for Dual VFE 247 * @right_stop: right input stop offset in pixels. 248 * Only for Dual VFE 249 * @right_width: right input width in pixels. 250 * Only for dual VFE 251 * @line_start: top of the line number 252 * @line_stop: bottome of the line number 253 * @height: input height in lines 254 * @pixel_clk; sensor output clock 255 * @batch_size: batch size for HFR mode 256 * @dsp_mode: DSP stream mode (Defines as CAM_ISP_DSP_MODE_*) 257 * @hbi_cnt: HBI count for the camif input 258 * @reserved: Reserved field for alignment 259 * @num_out_res: number of the output resource associated 260 * @data: payload that contains the output resources 261 * 262 */ 263 struct cam_isp_in_port_info { 264 uint32_t res_type; 265 uint32_t lane_type; 266 uint32_t lane_num; 267 uint32_t lane_cfg; 268 uint32_t vc; 269 uint32_t dt; 270 uint32_t format; 271 uint32_t test_pattern; 272 uint32_t usage_type; 273 uint32_t left_start; 274 uint32_t left_stop; 275 uint32_t left_width; 276 uint32_t right_start; 277 uint32_t right_stop; 278 uint32_t right_width; 279 uint32_t line_start; 280 uint32_t line_stop; 281 uint32_t height; 282 uint32_t pixel_clk; 283 uint32_t batch_size; 284 uint32_t dsp_mode; 285 uint32_t hbi_cnt; 286 uint32_t reserved; 287 uint32_t num_out_res; 288 struct cam_isp_out_port_info data[1]; 289 }; 290 291 /** 292 * struct cam_isp_in_port_info_v2 - An input port resource info 293 * 294 * @res_type: input resource type define in file 295 * cam_isp_vfe.h or cam_isp_ife.h 296 * @lane_type: lane type: c-phy or d-phy. 297 * @lane_num: active lane number 298 * @lane_cfg: lane configurations: 4 bits per lane 299 * @vc: input virtual channel number 300 * @dt: input data type number 301 * @num_valid_vc_dt: valid vc and dt in array 302 * @format: input format 303 * @test_pattern: test pattern for the testgen 304 * @usage_type: whether dual vfe is required 305 * @left_start: left input start offset in pixels 306 * @left_stop: left input stop offset in pixels 307 * @left_width: left input width in pixels 308 * @right_start: right input start offset in pixels. 309 * Only for Dual VFE 310 * @right_stop: right input stop offset in pixels. 311 * only for Dual VFE 312 * @right_width: right input width in pixels. 313 * only for dual VFE 314 * @line_start: top of the line number 315 * @line_stop: bottome of the line number 316 * @height: input height in lines 317 * @pixel_clk; sensor output clock 318 * @batch_size: batch size for HFR mode 319 * @dsp_mode: DSP stream mode (Defines as CAM_ISP_DSP_MODE_*) 320 * @hbi_cnt: HBI count for the camif input 321 * @cust_node: if any custom HW block is present before IFE 322 * @num_out_res: number of the output resource associated 323 * @horizontal_bin: Horizontal Binning info 324 * @qcfa_bin: Quadra Binning info 325 * @csid_res_1: payload for future use 326 * @csid_res_2: payload for future use 327 * @ife_res_1: payload for future use 328 * @ife_res_2: payload for future use 329 * @data: payload that contains the output resources 330 * 331 */ 332 struct cam_isp_in_port_info_v2 { 333 uint32_t res_type; 334 uint32_t lane_type; 335 uint32_t lane_num; 336 uint32_t lane_cfg; 337 uint32_t vc[CAM_ISP_VC_DT_CFG]; 338 uint32_t dt[CAM_ISP_VC_DT_CFG]; 339 uint32_t num_valid_vc_dt; 340 uint32_t format; 341 uint32_t test_pattern; 342 uint32_t usage_type; 343 uint32_t left_start; 344 uint32_t left_stop; 345 uint32_t left_width; 346 uint32_t right_start; 347 uint32_t right_stop; 348 uint32_t right_width; 349 uint32_t line_start; 350 uint32_t line_stop; 351 uint32_t height; 352 uint32_t pixel_clk; 353 uint32_t batch_size; 354 uint32_t dsp_mode; 355 uint32_t hbi_cnt; 356 uint32_t cust_node; 357 uint32_t num_out_res; 358 uint32_t offline_mode; 359 uint32_t horizontal_bin; 360 uint32_t qcfa_bin; 361 uint32_t csid_res_1; 362 uint32_t csid_res_2; 363 uint32_t ife_res_1; 364 uint32_t ife_res_2; 365 struct cam_isp_out_port_info_v2 data[1]; 366 }; 367 368 /** 369 * struct cam_isp_resource - A resource bundle 370 * 371 * @resoruce_id: resource id for the resource bundle 372 * @length: length of the while resource blob 373 * @handle_type: type of the resource handle 374 * @reserved: reserved field for alignment 375 * @res_hdl: resource handle that points to the 376 * resource array; 377 * 378 */ 379 struct cam_isp_resource { 380 uint32_t resource_id; 381 uint32_t length; 382 uint32_t handle_type; 383 uint32_t reserved; 384 uint64_t res_hdl; 385 }; 386 387 /** 388 * struct cam_isp_port_hfr_config - HFR configuration for this port 389 * 390 * @resource_type: Resource type 391 * @subsample_pattern: Subsample pattern. Used in HFR mode. It 392 * should be consistent with batchSize and 393 * CAMIF programming. 394 * @subsample_period: Subsample period. Used in HFR mode. It 395 * should be consistent with batchSize and 396 * CAMIF programming. 397 * @framedrop_pattern: Framedrop pattern 398 * @framedrop_period: Framedrop period 399 * @reserved: Reserved for alignment 400 */ 401 struct cam_isp_port_hfr_config { 402 uint32_t resource_type; 403 uint32_t subsample_pattern; 404 uint32_t subsample_period; 405 uint32_t framedrop_pattern; 406 uint32_t framedrop_period; 407 uint32_t reserved; 408 } __attribute__((packed)); 409 410 /** 411 * struct cam_isp_resource_hfr_config - Resource HFR configuration 412 * 413 * @num_ports: Number of ports 414 * @reserved: Reserved for alignment 415 * @port_hfr_config: HFR configuration for each IO port 416 */ 417 struct cam_isp_resource_hfr_config { 418 uint32_t num_ports; 419 uint32_t reserved; 420 struct cam_isp_port_hfr_config port_hfr_config[1]; 421 } __attribute__((packed)); 422 423 /** 424 * struct cam_isp_dual_split_params - dual isp spilt parameters 425 * 426 * @split_point: Split point information x, where (0 < x < width) 427 * left ISP's input ends at x + righ padding and 428 * Right ISP's input starts at x - left padding 429 * @right_padding: Padding added past the split point for left 430 * ISP's input 431 * @left_padding: Padding added before split point for right 432 * ISP's input 433 * @reserved: Reserved filed for alignment 434 * 435 */ 436 struct cam_isp_dual_split_params { 437 uint32_t split_point; 438 uint32_t right_padding; 439 uint32_t left_padding; 440 uint32_t reserved; 441 }; 442 443 /** 444 * struct cam_isp_dual_stripe_config - stripe config per bus client 445 * 446 * @offset: Start horizontal offset relative to 447 * output buffer 448 * In UBWC mode, this value indicates the H_INIT 449 * value in pixel 450 * @width: Width of the stripe in bytes 451 * @tileconfig Ubwc meta tile config. Contain the partial 452 * tile info 453 * @port_id: port id of ISP output 454 * 455 */ 456 struct cam_isp_dual_stripe_config { 457 uint32_t offset; 458 uint32_t width; 459 uint32_t tileconfig; 460 uint32_t port_id; 461 }; 462 463 /** 464 * struct cam_isp_dual_config - dual isp configuration 465 * 466 * @num_ports Number of isp output ports 467 * @reserved Reserved field for alignment 468 * @split_params: Inpput split parameters 469 * @stripes: Stripe information 470 * 471 */ 472 struct cam_isp_dual_config { 473 uint32_t num_ports; 474 uint32_t reserved; 475 struct cam_isp_dual_split_params split_params; 476 struct cam_isp_dual_stripe_config stripes[1]; 477 } __attribute__((packed)); 478 479 /** 480 * struct cam_isp_clock_config - Clock configuration 481 * 482 * @usage_type: Usage type (Single/Dual) 483 * @num_rdi: Number of RDI votes 484 * @left_pix_hz: Pixel Clock for Left ISP 485 * @right_pix_hz: Pixel Clock for Right ISP, valid only if Dual 486 * @rdi_hz: RDI Clock. ISP clock will be max of RDI and 487 * PIX clocks. For a particular context which ISP 488 * HW the RDI is allocated to is not known to UMD. 489 * Hence pass the clock and let KMD decide. 490 */ 491 struct cam_isp_clock_config { 492 uint32_t usage_type; 493 uint32_t num_rdi; 494 uint64_t left_pix_hz; 495 uint64_t right_pix_hz; 496 uint64_t rdi_hz[1]; 497 } __attribute__((packed)); 498 499 /** 500 * struct cam_isp_csid_clock_config - CSID clock configuration 501 * 502 * @csid_clock CSID clock 503 */ 504 struct cam_isp_csid_clock_config { 505 uint64_t csid_clock; 506 } __attribute__((packed)); 507 508 /** 509 * struct cam_isp_csid_qcfa_config - CSID qcfa binning support configuration 510 * 511 * @csid_binning CSID binning 512 */ 513 struct cam_isp_csid_qcfa_config { 514 uint32_t csid_binning; 515 } __attribute__((packed)); 516 517 /** 518 * struct cam_isp_bw_vote - Bandwidth vote information 519 * 520 * @resource_id: Resource ID 521 * @reserved: Reserved field for alignment 522 * @cam_bw_bps: Bandwidth vote for CAMNOC 523 * @ext_bw_bps: Bandwidth vote for path-to-DDR after CAMNOC 524 */ 525 struct cam_isp_bw_vote { 526 uint32_t resource_id; 527 uint32_t reserved; 528 uint64_t cam_bw_bps; 529 uint64_t ext_bw_bps; 530 } __attribute__((packed)); 531 532 /** 533 * struct cam_isp_bw_config - Bandwidth configuration 534 * 535 * @usage_type: Usage type (Single/Dual) 536 * @num_rdi: Number of RDI votes 537 * @left_pix_vote: Bandwidth vote for left ISP 538 * @right_pix_vote: Bandwidth vote for right ISP 539 * @rdi_vote: RDI bandwidth requirements 540 */ 541 struct cam_isp_bw_config { 542 uint32_t usage_type; 543 uint32_t num_rdi; 544 struct cam_isp_bw_vote left_pix_vote; 545 struct cam_isp_bw_vote right_pix_vote; 546 struct cam_isp_bw_vote rdi_vote[1]; 547 } __attribute__((packed)); 548 549 /** 550 * struct cam_isp_bw_config_v2 - Bandwidth configuration 551 * 552 * @usage_type: Usage type (Single/Dual) 553 * @num_paths: Number of axi data paths 554 * @axi_path Per path vote info 555 */ 556 struct cam_isp_bw_config_v2 { 557 uint32_t usage_type; 558 uint32_t num_paths; 559 struct cam_axi_per_path_bw_vote axi_path[1]; 560 } __attribute__((packed)); 561 562 /** 563 * struct cam_fe_config - Fetch Engine configuration 564 * 565 * @version: fetch engine veriosn 566 * @min_vbi: require min vbi 567 * @fs_mode: indicates if fs mode enabled 568 * @fs_line_sync_en: frame level sync or line level 569 * sync for fetch engine 570 * @hbi_count: hbi count 571 * @fs_sync_enable: indicates if fetch engine working 572 * wokring in sync with write engine 573 * @go_cmd_sel: softwrae go_cmd or hw go_cmd 574 * @client_enable: enable read engine 575 * @source_addr: adrress of buffer to read from 576 * @width: buffer width 577 * @height: buffer height 578 * @stride: buffer stride (here equal to width) 579 * @format: format of image in buffer 580 * @unpacker_cfg: unpacker config type 581 * @latency_buf_size: latency buffer for read engine 582 */ 583 struct cam_fe_config { 584 uint64_t version; 585 uint32_t min_vbi; 586 uint32_t fs_mode; 587 uint32_t fs_line_sync_en; 588 uint32_t hbi_count; 589 uint32_t fs_sync_enable; 590 uint32_t go_cmd_sel; 591 uint32_t client_enable; 592 uint32_t source_addr; 593 uint32_t width; 594 uint32_t height; 595 uint32_t stride; 596 uint32_t format; 597 uint32_t unpacker_cfg; 598 uint32_t latency_buf_size; 599 } __attribute__((packed)); 600 601 602 /** 603 * struct cam_isp_sensor_path_dimension 604 * 605 * @width expected width 606 * @height expected height 607 * @measure_enabled flag to indicate if pixel measurement is to be enabled 608 */ 609 struct cam_isp_sensor_dimension { 610 uint32_t width; 611 uint32_t height; 612 uint32_t measure_enabled; 613 } __attribute__((packed)); 614 615 /** 616 * struct cam_isp_sensor_config - Sensor Dimension configuration 617 * 618 * @ppp_path: expected ppp path configuration 619 * @ipp_path: expected ipp path configuration 620 * @rdi_path: expected rdi path configuration 621 * @hbi: HBI value 622 * @vbi: VBI value 623 */ 624 struct cam_isp_sensor_config { 625 struct cam_isp_sensor_dimension ppp_path; 626 struct cam_isp_sensor_dimension ipp_path; 627 struct cam_isp_sensor_dimension rdi_path[CAM_IFE_CSID_RDI_MAX]; 628 uint32_t hbi; 629 uint32_t vbi; 630 } __attribute__((packed)); 631 632 /** 633 * struct cam_isp_core_config - ISP core registers configuration 634 * 635 * @version: Version info 636 * @vid_ds16_r2pd: Enables Y and C merging PD output for video DS16 637 * @vid_ds4_r2pd: Enables Y and C merging PD output for video DS4 638 * @disp_ds16_r2pd: Enables Y and C merging PD output for disp DS16 639 * @disp_ds4_r2pd: Enables Y and C merging PD output for disp DS4 640 * @dsp_streaming_tap_point: This selects source for DSP streaming interface 641 * @ihist_src_sel: Selects input for IHIST module 642 * @hdr_be_src_sel: Selects input for HDR BE module 643 * @hdr_bhist_src_sel: Selects input for HDR BHIST module 644 * @input_mux_sel_pdaf: Selects input for PDAF 645 * @input_mux_sel_pp: Selects input for Pixel Pipe 646 * @reserved: Reserved 647 */ 648 struct cam_isp_core_config { 649 uint32_t version; 650 uint32_t vid_ds16_r2pd; 651 uint32_t vid_ds4_r2pd; 652 uint32_t disp_ds16_r2pd; 653 uint32_t disp_ds4_r2pd; 654 uint32_t dsp_streaming_tap_point; 655 uint32_t ihist_src_sel; 656 uint32_t hdr_be_src_sel; 657 uint32_t hdr_bhist_src_sel; 658 uint32_t input_mux_sel_pdaf; 659 uint32_t input_mux_sel_pp; 660 uint32_t reserved; 661 } __attribute__((packed)); 662 663 /** 664 * struct cam_isp_acquire_hw_info - ISP acquire HW params 665 * 666 * @common_info_version : Version of common info struct used 667 * @common_info_size : Size of common info struct used 668 * @common_info_offset : Offset of common info from start of data 669 * @num_inputs : Number of inputs 670 * @input_info_version : Version of input info struct used 671 * @input_info_size : Size of input info struct used 672 * @input_info_offset : Offset of input info from start of data 673 * @data : Start of data region 674 */ 675 struct cam_isp_acquire_hw_info { 676 uint16_t common_info_version; 677 uint16_t common_info_size; 678 uint32_t common_info_offset; 679 uint32_t num_inputs; 680 uint32_t input_info_version; 681 uint32_t input_info_size; 682 uint32_t input_info_offset; 683 uint64_t data; 684 }; 685 686 /** 687 * struct cam_isp_vfe_wm_config - VFE write master config per port 688 * 689 * @port_type : Unique ID of output port 690 * @wm_mode : Write master mode 691 * 0x0 - Line based mode 692 * 0x1 - Frame based mode 693 * 0x2 - Index based mode, valid for BAF only 694 * @h_init : Horizontal starting coordinate in pixels. Must be a 695 * multiple of 3 for TP10 format 696 * @height : Height in pixels 697 * @width : Width in pixels 698 * @virtual_frame_en : Enabling virtual frame will prevent actual request from 699 * being sent to NOC 700 * @stride : Write master stride 701 * @offset : Write master offset 702 * @reserved_1 : Reserved field for Write master config 703 * @reserved_2 : Reserved field for Write master config 704 * @reserved_3 : Reserved field for Write master config 705 * @reserved_4 : Reserved field for Write master config 706 */ 707 struct cam_isp_vfe_wm_config { 708 uint32_t port_type; 709 uint32_t wm_mode; 710 uint32_t h_init; 711 uint32_t height; 712 uint32_t width; 713 uint32_t virtual_frame_en; 714 uint32_t stride; 715 uint32_t offset; 716 uint32_t reserved_1; 717 uint32_t reserved_2; 718 uint32_t reserved_3; 719 uint32_t reserved_4; 720 }; 721 722 /** 723 * struct cam_isp_vfe_out_config - VFE write master config 724 * 725 * @num_ports : Number of ports 726 * @reserved : Reserved field 727 * @wm_config : VFE out config 728 */ 729 struct cam_isp_vfe_out_config { 730 uint32_t num_ports; 731 uint32_t reserved; 732 struct cam_isp_vfe_wm_config wm_config[1]; 733 }; 734 735 /** 736 * struct cam_isp_csid_epd_config - Support for EPD Packet config 737 * 738 * @is_epd_sensor : flag to check if epd supported 739 */ 740 struct cam_isp_csid_epd_config { 741 uint32_t is_epd_supported; 742 }; 743 744 #define CAM_ISP_ACQUIRE_COMMON_VER0 0x1000 745 746 #define CAM_ISP_ACQUIRE_COMMON_SIZE_VER0 0x0 747 748 #define CAM_ISP_ACQUIRE_INPUT_VER0 0x2000 749 750 #define CAM_ISP_ACQUIRE_INPUT_SIZE_VER0 sizeof(struct cam_isp_in_port_info) 751 752 #define CAM_ISP_ACQUIRE_OUT_VER0 0x3000 753 754 #define CAM_ISP_ACQUIRE_OUT_SIZE_VER0 sizeof(struct cam_isp_out_port_info) 755 756 #endif /* __UAPI_CAM_ISP_H__ */ 757