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1 #ifndef __UAPI_LINUX_MSM_CAMSENSOR_SDK_H
2 #define __UAPI_LINUX_MSM_CAMSENSOR_SDK_H
3 
4 #include <linux/videodev2.h>
5 
6 #define KVERSION 0x1
7 
8 #define MAX_POWER_CONFIG      12
9 #define GPIO_OUT_LOW          (0 << 1)
10 #define GPIO_OUT_HIGH         (1 << 1)
11 #define CSI_EMBED_DATA        0x12
12 #define CSI_RESERVED_DATA_0   0x13
13 #define CSI_YUV422_8          0x1E
14 #define CSI_RAW8              0x2A
15 #define CSI_RAW10             0x2B
16 #define CSI_RAW12             0x2C
17 #define CSI_DECODE_6BIT         0
18 #define CSI_DECODE_8BIT         1
19 #define CSI_DECODE_10BIT        2
20 #define CSI_DECODE_12BIT        3
21 #define CSI_DECODE_DPCM_10_6_10 4
22 #define CSI_DECODE_DPCM_10_8_10 5
23 #define MAX_CID                 16
24 #define I2C_SEQ_REG_DATA_MAX    1024
25 #define I2C_REG_DATA_MAX       (8*1024)
26 
27 #define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') /* META */
28 #define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
29 	/* 14  BGBG.. GRGR.. */
30 #define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
31 	/* 14  GBGB.. RGRG.. */
32 #define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
33 	/* 14  GRGR.. BGBG.. */
34 #define MSM_V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4')
35 	/* 14  RGRG.. GBGB.. */
36 
37 #define MAX_ACTUATOR_REG_TBL_SIZE 8
38 #define MAX_ACTUATOR_REGION       5
39 #define NUM_ACTUATOR_DIR          2
40 #define MAX_ACTUATOR_SCENARIO     8
41 #define MAX_ACT_MOD_NAME_SIZE     32
42 #define MAX_ACT_NAME_SIZE         32
43 #define MAX_ACTUATOR_INIT_SET     120
44 #define MAX_I2C_REG_SET           12
45 
46 #define MAX_LED_TRIGGERS          3
47 
48 #define MSM_EEPROM_MEMORY_MAP_MAX_SIZE  80
49 #define MSM_EEPROM_MAX_MEM_MAP_CNT      8
50 
51 #define MSM_SENSOR_BYPASS_VIDEO_NODE    1
52 
53 enum msm_sensor_camera_id_t {
54 	CAMERA_0,
55 	CAMERA_1,
56 	CAMERA_2,
57 	CAMERA_3,
58 	MAX_CAMERAS,
59 };
60 
61 enum i2c_freq_mode_t {
62 	I2C_STANDARD_MODE,
63 	I2C_FAST_MODE,
64 	I2C_CUSTOM_MODE,
65 	I2C_FAST_PLUS_MODE,
66 	I2C_MAX_MODES,
67 };
68 
69 enum camb_position_t {
70 	BACK_CAMERA_B,
71 	FRONT_CAMERA_B,
72 	AUX_CAMERA_B = 0x100,
73 	INVALID_CAMERA_B,
74 };
75 
76 enum msm_sensor_power_seq_type_t {
77 	SENSOR_CLK,
78 	SENSOR_GPIO,
79 	SENSOR_VREG,
80 	SENSOR_I2C_MUX,
81 	SENSOR_I2C,
82 };
83 
84 enum msm_camera_i2c_reg_addr_type {
85 	MSM_CAMERA_I2C_BYTE_ADDR = 1,
86 	MSM_CAMERA_I2C_WORD_ADDR,
87 	MSM_CAMERA_I2C_3B_ADDR,
88 	MSM_CAMERA_I2C_DWORD_ADDR,
89 	MSM_CAMERA_I2C_ADDR_TYPE_MAX,
90 };
91 #define MSM_CAMERA_I2C_DWORD_ADDR MSM_CAMERA_I2C_DWORD_ADDR
92 
93 enum msm_camera_i2c_data_type {
94 	MSM_CAMERA_I2C_BYTE_DATA = 1,
95 	MSM_CAMERA_I2C_WORD_DATA,
96 	MSM_CAMERA_I2C_DWORD_DATA,
97 	MSM_CAMERA_I2C_SET_BYTE_MASK,
98 	MSM_CAMERA_I2C_UNSET_BYTE_MASK,
99 	MSM_CAMERA_I2C_SET_WORD_MASK,
100 	MSM_CAMERA_I2C_UNSET_WORD_MASK,
101 	MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
102 	MSM_CAMERA_I2C_DATA_TYPE_MAX,
103 };
104 
105 enum msm_sensor_power_seq_gpio_t {
106 	SENSOR_GPIO_RESET,
107 	SENSOR_GPIO_STANDBY,
108 	SENSOR_GPIO_AF_PWDM,
109 	SENSOR_GPIO_VIO,
110 	SENSOR_GPIO_VANA,
111 	SENSOR_GPIO_VDIG,
112 	SENSOR_GPIO_VAF,
113 	SENSOR_GPIO_FL_EN,
114 	SENSOR_GPIO_FL_NOW,
115 	SENSOR_GPIO_FL_RESET,
116 	SENSOR_GPIO_CUSTOM1,
117 	SENSOR_GPIO_CUSTOM2,
118 	SENSOR_GPIO_CUSTOM3,
119 	SENSOR_GPIO_MAX,
120 };
121 #define SENSOR_GPIO_CUSTOM3 SENSOR_GPIO_CUSTOM3
122 
123 enum msm_ir_cut_filter_gpio_t {
124 	IR_CUT_FILTER_GPIO_P = 0,
125 	IR_CUT_FILTER_GPIO_M,
126 	IR_CUT_FILTER_GPIO_MAX,
127 };
128 #define IR_CUT_FILTER_GPIO_P IR_CUT_FILTER_GPIO_P
129 #define IR_CUT_FILTER_GPIO_M IR_CUT_FILTER_GPIO_M
130 #define R_CUT_FILTER_GPIO_MAX IR_CUT_FILTER_GPIO_MAX
131 
132 enum msm_camera_vreg_name_t {
133 	CAM_VDIG,
134 	CAM_VIO,
135 	CAM_VANA,
136 	CAM_VAF,
137 	CAM_V_CUSTOM1,
138 	CAM_V_CUSTOM2,
139 	CAM_VREG_MAX,
140 };
141 
142 enum msm_sensor_clk_type_t {
143 	SENSOR_CAM_MCLK,
144 	SENSOR_CAM_CLK,
145 	SENSOR_CAM_CLK_MAX,
146 };
147 
148 enum camerab_mode_t {
149 	CAMERA_MODE_2D_B = (1<<0),
150 	CAMERA_MODE_3D_B = (1<<1),
151 	CAMERA_MODE_INVALID = (1<<2),
152 };
153 
154 enum msm_actuator_data_type {
155 	MSM_ACTUATOR_BYTE_DATA = 1,
156 	MSM_ACTUATOR_WORD_DATA,
157 };
158 
159 enum msm_actuator_addr_type {
160 	MSM_ACTUATOR_BYTE_ADDR = 1,
161 	MSM_ACTUATOR_WORD_ADDR,
162 };
163 
164 enum msm_actuator_write_type {
165 	MSM_ACTUATOR_WRITE_HW_DAMP,
166 	MSM_ACTUATOR_WRITE_DAC,
167 	MSM_ACTUATOR_WRITE,
168 	MSM_ACTUATOR_WRITE_DIR_REG,
169 	MSM_ACTUATOR_POLL,
170 	MSM_ACTUATOR_READ_WRITE,
171 };
172 
173 enum msm_actuator_i2c_operation {
174 	MSM_ACT_WRITE = 0,
175 	MSM_ACT_POLL,
176 };
177 
178 enum actuator_type {
179 	ACTUATOR_VCM,
180 	ACTUATOR_PIEZO,
181 	ACTUATOR_HVCM,
182 	ACTUATOR_BIVCM,
183 };
184 
185 enum msm_flash_driver_type {
186 	FLASH_DRIVER_PMIC,
187 	FLASH_DRIVER_I2C,
188 	FLASH_DRIVER_GPIO,
189 	FLASH_DRIVER_DEFAULT
190 };
191 
192 enum msm_flash_cfg_type_t {
193 	CFG_FLASH_INIT,
194 	CFG_FLASH_RELEASE,
195 	CFG_FLASH_OFF,
196 	CFG_FLASH_LOW,
197 	CFG_FLASH_HIGH,
198 };
199 
200 enum msm_ir_led_cfg_type_t {
201 	CFG_IR_LED_INIT = 0,
202 	CFG_IR_LED_RELEASE,
203 	CFG_IR_LED_OFF,
204 	CFG_IR_LED_ON,
205 };
206 #define CFG_IR_LED_INIT CFG_IR_LED_INIT
207 #define CFG_IR_LED_RELEASE CFG_IR_LED_RELEASE
208 #define CFG_IR_LED_OFF CFG_IR_LED_OFF
209 #define CFG_IR_LED_ON CFG_IR_LED_ON
210 
211 enum msm_laser_led_cfg_type_t {
212 	CFG_LASER_LED_INIT,
213 	CFG_LASER_LED_CONTROL,
214 };
215 #define CFG_LASER_LED_INIT CFG_LASER_LED_INIT
216 #define CFG_LASER_LED_CONTROL CFG_LASER_LED_CONTROL
217 
218 enum msm_ir_cut_cfg_type_t {
219 	CFG_IR_CUT_INIT = 0,
220 	CFG_IR_CUT_RELEASE,
221 	CFG_IR_CUT_OFF,
222 	CFG_IR_CUT_ON,
223 };
224 #define CFG_IR_CUT_INIT CFG_IR_CUT_INIT
225 #define CFG_IR_CUT_RELEASE CFG_IR_CUT_RELEASE
226 #define CFG_IR_CUT_OFF CFG_IR_CUT_OFF
227 #define CFG_IR_CUT_ON CFG_IR_CUT_ON
228 
229 enum msm_sensor_output_format_t {
230 	MSM_SENSOR_BAYER,
231 	MSM_SENSOR_YCBCR,
232 	MSM_SENSOR_META,
233 };
234 
235 struct msm_sensor_power_setting {
236 	enum msm_sensor_power_seq_type_t seq_type;
237 	unsigned short seq_val;
238 	long config_val;
239 	unsigned short delay;
240 	void *data[10];
241 };
242 
243 struct msm_sensor_power_setting_array {
244 	struct msm_sensor_power_setting  power_setting_a[MAX_POWER_CONFIG];
245 	struct msm_sensor_power_setting  *power_setting;
246 	unsigned short size;
247 	struct msm_sensor_power_setting  power_down_setting_a[MAX_POWER_CONFIG];
248 	struct msm_sensor_power_setting  *power_down_setting;
249 	unsigned short size_down;
250 };
251 
252 enum msm_camera_i2c_operation {
253 	MSM_CAM_WRITE = 0,
254 	MSM_CAM_POLL,
255 	MSM_CAM_READ,
256 };
257 
258 struct msm_sensor_i2c_sync_params {
259 	unsigned int cid;
260 	int csid;
261 	unsigned short line;
262 	unsigned short delay;
263 };
264 
265 struct msm_camera_reg_settings_t {
266 	uint16_t reg_addr;
267 	enum msm_camera_i2c_reg_addr_type addr_type;
268 	uint16_t reg_data;
269 	enum msm_camera_i2c_data_type data_type;
270 	enum msm_camera_i2c_operation i2c_operation;
271 	uint16_t delay;
272 };
273 
274 struct msm_eeprom_mem_map_t {
275 	int slave_addr;
276 	struct msm_camera_reg_settings_t
277 		mem_settings[MSM_EEPROM_MEMORY_MAP_MAX_SIZE];
278 	int memory_map_size;
279 };
280 
281 struct msm_eeprom_memory_map_array {
282 	struct msm_eeprom_mem_map_t memory_map[MSM_EEPROM_MAX_MEM_MAP_CNT];
283 	uint32_t msm_size_of_max_mappings;
284 };
285 
286 struct msm_sensor_init_params {
287 	/* mask of modes supported: 2D, 3D */
288 	int                 modes_supported;
289 	/* sensor position: front, back */
290 	enum camb_position_t position;
291 	/* sensor mount angle */
292 	unsigned int            sensor_mount_angle;
293 };
294 
295 struct msm_sensor_id_info_t {
296 	unsigned short sensor_id_reg_addr;
297 	unsigned short sensor_id;
298 	unsigned short sensor_id_mask;
299 };
300 
301 struct msm_camera_sensor_slave_info {
302 	char sensor_name[32];
303 	char eeprom_name[32];
304 	char actuator_name[32];
305 	char ois_name[32];
306 	char flash_name[32];
307 	enum msm_sensor_camera_id_t camera_id;
308 	unsigned short slave_addr;
309 	enum i2c_freq_mode_t i2c_freq_mode;
310 	enum msm_camera_i2c_reg_addr_type addr_type;
311 	struct msm_sensor_id_info_t sensor_id_info;
312 	struct msm_sensor_power_setting_array power_setting_array;
313 	unsigned char  is_init_params_valid;
314 	struct msm_sensor_init_params sensor_init_params;
315 	enum msm_sensor_output_format_t output_format;
316 	uint8_t bypass_video_node_creation;
317 };
318 
319 struct msm_camera_i2c_reg_array {
320 	unsigned short reg_addr;
321 	unsigned short reg_data;
322 	unsigned int delay;
323 };
324 
325 struct msm_camera_i2c_reg_setting {
326 	struct msm_camera_i2c_reg_array *reg_setting;
327 	unsigned short size;
328 	enum msm_camera_i2c_reg_addr_type addr_type;
329 	enum msm_camera_i2c_data_type data_type;
330 	unsigned short delay;
331 };
332 
333 struct msm_camera_csid_vc_cfg {
334 	unsigned char cid;
335 	unsigned char dt;
336 	unsigned char decode_format;
337 };
338 
339 struct msm_camera_csid_lut_params {
340 	unsigned char num_cid;
341 	struct msm_camera_csid_vc_cfg vc_cfg_a[MAX_CID];
342 	struct msm_camera_csid_vc_cfg *vc_cfg[MAX_CID];
343 };
344 
345 struct msm_camera_csid_params {
346 	unsigned char lane_cnt;
347 	unsigned short lane_assign;
348 	unsigned char phy_sel;
349 	unsigned int csi_clk;
350 	struct msm_camera_csid_lut_params lut_params;
351 	unsigned char csi_3p_sel;
352 };
353 
354 struct msm_camera_csid_testmode_parms {
355 	unsigned int num_bytes_per_line;
356 	unsigned int num_lines;
357 	unsigned int h_blanking_count;
358 	unsigned int v_blanking_count;
359 	unsigned int payload_mode;
360 };
361 
362 struct msm_camera_csiphy_params {
363 	unsigned char lane_cnt;
364 	unsigned char settle_cnt;
365 	unsigned short lane_mask;
366 	unsigned char combo_mode;
367 	unsigned char csid_core;
368 	unsigned int csiphy_clk;
369 	unsigned char csi_3phase;
370 	uint64_t data_rate;
371 };
372 
373 struct msm_camera_i2c_seq_reg_array {
374 	unsigned short reg_addr;
375 	unsigned char reg_data[I2C_SEQ_REG_DATA_MAX];
376 	unsigned short reg_data_size;
377 };
378 
379 struct msm_camera_i2c_seq_reg_setting {
380 	struct msm_camera_i2c_seq_reg_array *reg_setting;
381 	unsigned short size;
382 	enum msm_camera_i2c_reg_addr_type addr_type;
383 	unsigned short delay;
384 };
385 
386 struct msm_actuator_reg_params_t {
387 	enum msm_actuator_write_type reg_write_type;
388 	unsigned int hw_mask;
389 	unsigned short reg_addr;
390 	unsigned short hw_shift;
391 	unsigned short data_shift;
392 	unsigned short data_type;
393 	unsigned short addr_type;
394 	unsigned short reg_data;
395 	unsigned short delay;
396 };
397 
398 
399 struct damping_params_t {
400 	unsigned int damping_step;
401 	unsigned int damping_delay;
402 	unsigned int hw_params;
403 };
404 
405 struct region_params_t {
406 	/* [0] = ForwardDirection Macro boundary
407 	 *  [1] = ReverseDirection Inf boundary
408 	 */
409 	unsigned short step_bound[2];
410 	unsigned short code_per_step;
411 	/* qvalue for converting float type numbers to integer format */
412 	unsigned int qvalue;
413 };
414 
415 struct reg_settings_t {
416 	unsigned short reg_addr;
417 	enum msm_camera_i2c_reg_addr_type addr_type;
418 	unsigned short reg_data;
419 	enum msm_camera_i2c_data_type data_type;
420 	enum msm_actuator_i2c_operation i2c_operation;
421 	unsigned int delay;
422 };
423 
424 struct msm_camera_i2c_reg_setting_array {
425 	struct msm_camera_i2c_reg_array reg_setting_a[MAX_I2C_REG_SET];
426 	unsigned short size;
427 	enum msm_camera_i2c_reg_addr_type addr_type;
428 	enum msm_camera_i2c_data_type data_type;
429 	unsigned short delay;
430 };
431 
432 #endif
433