1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. 4 */ 5 6 /* 7 * This header file defines the types and structures that were defined in 8 * ipa. It contains the constant values defined, enums, structures, 9 * messages, and service message IDs (in that order) Structures that were 10 * defined in the IDL as messages contain mandatory elements, optional 11 * elements, a combination of mandatory and optional elements (mandatory 12 * always come before optionals in the structure), or nothing (null message) 13 14 * An optional element in a message is preceded by a uint8_t value that must be 15 * set to true if the element is going to be included. When decoding a received 16 * message, the uint8_t values will be set to true or false by the decode 17 * routine, and should be checked before accessing the values that they 18 * correspond to. 19 20 * Variable sized arrays are defined as static sized arrays with an unsigned 21 * integer (32 bit) preceding it that must be set to the number of elements 22 * in the array that are valid. For Example: 23 24 * uint32_t test_opaque_len; 25 * uint8_t test_opaque[16]; 26 27 * If only 4 elements are added to test_opaque[] then test_opaque_len must be 28 * set to 4 before sending the message. When decoding, the _len value is set 29 * by the decode routine and should be checked so that the correct number of 30 * elements in the array will be accessed. 31 */ 32 #ifndef IPA_QMI_SERVICE_V01_H 33 #define IPA_QMI_SERVICE_V01_H 34 35 #include <linux/types.h> 36 37 #define QMI_IPA_REMOTE_MHI_CHANNELS_NUM_MAX_V01 6 38 #define QMI_IPA_MAX_FILTERS_EX_V01 128 39 #define QMI_IPA_MAX_FILTERS_EX2_V01 256 40 #define QMI_IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS_V01 2 41 #define QMI_IPA_MAX_FILTERS_V01 64 42 #define QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01 2 43 #define QMI_IPA_ENDP_DESC_NUM_MAX_V01 31 44 #define QMI_IPA_MAX_APN_V01 8 45 /* Currently max we can use is only 1. But for scalability purpose 46 * we are having max value as 8. 47 */ 48 #define QMI_IPA_MAX_CLIENT_DST_PIPES_V01 8 49 #define QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01 2 50 #define QMI_IPA_MAX_UL_FIREWALL_RULES_V01 64 51 #define QMI_IPA_REMOTE_MHI_MEMORY_MAPPING_NUM_MAX_V01 6 52 #define QMI_IPA_IPFLTR_NUM_MEQ_32_EQNS_V01 2 53 #define QMI_IPA_MAX_PIPES_V01 20 54 #define QMI_IPA_MAX_PER_CLIENTS_V01 64 55 56 /* 57 * Indicates presence of newly added member to support HW stats. 58 */ 59 #define IPA_QMI_SUPPORTS_STATS 60 #define IPA_QMI_SUPPORT_MHI_DEFAULT 61 62 #define IPA_INT_MAX ((int)(~0U>>1)) 63 #define IPA_INT_MIN (-IPA_INT_MAX - 1) 64 65 /* IPA definition as msm_qmi_interface.h */ 66 67 enum ipa_qmi_result_type_v01 { 68 /* To force a 32 bit signed enum. Do not change or use*/ 69 IPA_QMI_RESULT_TYPE_MIN_ENUM_VAL_V01 = IPA_INT_MIN, 70 IPA_QMI_RESULT_SUCCESS_V01 = 0, 71 IPA_QMI_RESULT_FAILURE_V01 = 1, 72 IPA_QMI_RESULT_TYPE_MAX_ENUM_VAL_V01 = IPA_INT_MAX, 73 }; 74 75 enum ipa_qmi_error_type_v01 { 76 /* To force a 32 bit signed enum. Do not change or use*/ 77 IPA_QMI_ERROR_TYPE_MIN_ENUM_VAL_V01 = IPA_INT_MIN, 78 IPA_QMI_ERR_NONE_V01 = 0x0000, 79 IPA_QMI_ERR_MALFORMED_MSG_V01 = 0x0001, 80 IPA_QMI_ERR_NO_MEMORY_V01 = 0x0002, 81 IPA_QMI_ERR_INTERNAL_V01 = 0x0003, 82 IPA_QMI_ERR_CLIENT_IDS_EXHAUSTED_V01 = 0x0005, 83 IPA_QMI_ERR_INVALID_ID_V01 = 0x0029, 84 IPA_QMI_ERR_ENCODING_V01 = 0x003A, 85 IPA_QMI_ERR_INCOMPATIBLE_STATE_V01 = 0x005A, 86 IPA_QMI_ERR_NOT_SUPPORTED_V01 = 0x005E, 87 IPA_QMI_ERROR_TYPE_MAX_ENUM_VAL_V01 = IPA_INT_MAX, 88 }; 89 90 struct ipa_qmi_response_type_v01 { 91 uint16_t result; 92 uint16_t error; 93 }; 94 95 enum ipa_platform_type_enum_v01 { 96 IPA_PLATFORM_TYPE_ENUM_MIN_ENUM_VAL_V01 = 97 -2147483647, /* To force a 32 bit signed enum. Do not change or use */ 98 QMI_IPA_PLATFORM_TYPE_INVALID_V01 = 0, 99 /* Invalid platform identifier */ 100 QMI_IPA_PLATFORM_TYPE_TN_V01 = 1, 101 /* Platform identifier - Data card device */ 102 QMI_IPA_PLATFORM_TYPE_LE_V01 = 2, 103 /* Platform identifier - Data router device */ 104 QMI_IPA_PLATFORM_TYPE_MSM_ANDROID_V01 = 3, 105 /* Platform identifier - MSM device with Android HLOS */ 106 QMI_IPA_PLATFORM_TYPE_MSM_WINDOWS_V01 = 4, 107 /* Platform identifier - MSM device with Windows HLOS */ 108 QMI_IPA_PLATFORM_TYPE_MSM_QNX_V01 = 5, 109 /* Platform identifier - MDM device with LE HLOS, MHI data router */ 110 QMI_IPA_PLATFORM_TYPE_LE_MHI_V01 = 6, 111 /* Platform identifier - MSM device with QNX HLOS */ 112 IPA_PLATFORM_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 113 /* To force a 32 bit signed enum. Do not change or use */ 114 }; 115 116 #define QMI_IPA_PLATFORM_TYPE_LE_MHI_V01 \ 117 QMI_IPA_PLATFORM_TYPE_LE_MHI_V01 118 119 struct ipa_hdr_tbl_info_type_v01 { 120 uint32_t modem_offset_start; 121 /* Offset from the start of IPA Shared memory from which 122 * modem driver may insert header table entries. 123 */ 124 uint32_t modem_offset_end; 125 /* Offset from the start of IPA shared mem beyond which modem 126 * driver shall not insert header table entries. The space 127 * available for the modem driver shall include the 128 * modem_offset_start and modem_offset_end. 129 */ 130 }; /* Type */ 131 132 struct ipa_route_tbl_info_type_v01 { 133 uint32_t route_tbl_start_addr; 134 /* Identifies the start of the routing table. Denotes the offset 135 * from the start of the IPA Shared Mem 136 */ 137 138 uint32_t num_indices; 139 /* Number of indices (starting from 0) that is being allocated to 140 * the modem. The number indicated here is also included in the 141 * allocation. The value of num_indices shall not exceed 31 142 * (5 bits used to specify the routing table index), unless there 143 * is a change in the hardware. 144 */ 145 }; /* Type */ 146 147 struct ipa_modem_mem_info_type_v01 { 148 149 uint32_t block_start_addr; 150 /* Identifies the start of the memory block allocated for the 151 * modem. Denotes the offset from the start of the IPA Shared Mem 152 */ 153 154 uint32_t size; 155 /* Size of the block allocated for the modem driver */ 156 }; /* Type */ 157 158 struct ipa_hdr_proc_ctx_tbl_info_type_v01 { 159 160 uint32_t modem_offset_start; 161 /* Offset from the start of IPA shared memory from which the modem 162 * driver may insert header processing context table entries. 163 */ 164 165 uint32_t modem_offset_end; 166 /* Offset from the start of IPA shared memory beyond which the modem 167 * driver may not insert header proc table entries. The space 168 * available for the modem driver includes modem_offset_start and 169 * modem_offset_end. 170 */ 171 }; /* Type */ 172 173 struct ipa_zip_tbl_info_type_v01 { 174 175 uint32_t modem_offset_start; 176 /* Offset from the start of IPA shared memory from which the modem 177 * driver may insert compression/decompression command entries. 178 */ 179 180 uint32_t modem_offset_end; 181 /* Offset from the start of IPA shared memory beyond which the modem 182 * driver may not insert compression/decompression command entries. 183 * The space available for the modem driver includes 184 * modem_offset_start and modem_offset_end. 185 */ 186 }; /* Type */ 187 188 /** 189 * Request Message; Requests the modem IPA driver 190 * to perform initialization 191 */ 192 struct ipa_init_modem_driver_req_msg_v01 { 193 194 /* Optional */ 195 /* Platform info */ 196 uint8_t platform_type_valid; 197 /* Must be set to true if platform_type is being passed */ 198 enum ipa_platform_type_enum_v01 platform_type; 199 /* Provides information about the platform (ex. TN/MN/LE/MSM,etc) */ 200 201 /* Optional */ 202 /* Header table info */ 203 uint8_t hdr_tbl_info_valid; 204 /* Must be set to true if hdr_tbl_info is being passed */ 205 struct ipa_hdr_tbl_info_type_v01 hdr_tbl_info; 206 /* Provides information about the header table */ 207 208 /* Optional */ 209 /* IPV4 Routing table info */ 210 uint8_t v4_route_tbl_info_valid; 211 /* Must be set to true if v4_route_tbl_info is being passed */ 212 struct ipa_route_tbl_info_type_v01 v4_route_tbl_info; 213 /* Provides information about the IPV4 routing table */ 214 215 /* Optional */ 216 /* IPV6 Routing table info */ 217 uint8_t v6_route_tbl_info_valid; 218 /* Must be set to true if v6_route_tbl_info is being passed */ 219 struct ipa_route_tbl_info_type_v01 v6_route_tbl_info; 220 /* Provides information about the IPV6 routing table */ 221 222 /* Optional */ 223 /* IPV4 Filter table start address */ 224 uint8_t v4_filter_tbl_start_addr_valid; 225 /* Must be set to true if v4_filter_tbl_start_addr is being passed */ 226 uint32_t v4_filter_tbl_start_addr; 227 /* Provides information about the starting address of IPV4 filter 228 * table in IPAv2 or non-hashable IPv4 filter table in IPAv3. 229 * Denotes the offset from the start of the IPA Shared Mem 230 */ 231 232 /* Optional */ 233 /* IPV6 Filter table start address */ 234 uint8_t v6_filter_tbl_start_addr_valid; 235 /* Must be set to true if v6_filter_tbl_start_addr is being passed */ 236 uint32_t v6_filter_tbl_start_addr; 237 /* Provides information about the starting address of IPV6 filter 238 * table in IPAv2 or non-hashable IPv6 filter table in IPAv3. 239 * Denotes the offset from the start of the IPA Shared Mem 240 */ 241 242 /* Optional */ 243 /* Modem memory block */ 244 uint8_t modem_mem_info_valid; 245 /* Must be set to true if modem_mem_info is being passed */ 246 struct ipa_modem_mem_info_type_v01 modem_mem_info; 247 /* Provides information about the start address and the size of 248 * the memory block that is being allocated to the modem driver. 249 * Denotes the physical address 250 */ 251 252 /* Optional */ 253 /* Destination end point for control commands from modem */ 254 uint8_t ctrl_comm_dest_end_pt_valid; 255 /* Must be set to true if ctrl_comm_dest_end_pt is being passed */ 256 uint32_t ctrl_comm_dest_end_pt; 257 /* Provides information about the destination end point on the 258 * application processor to which the modem driver can send 259 * control commands. The value of this parameter cannot exceed 260 * 19 since IPA only supports 20 end points. 261 */ 262 263 /* Optional */ 264 /* Modem Bootup Information */ 265 uint8_t is_ssr_bootup_valid; 266 /* Must be set to true if is_ssr_bootup is being passed */ 267 uint8_t is_ssr_bootup; 268 /* Specifies whether the modem is booting up after a modem only 269 * sub-system restart or not. This will let the modem driver 270 * know that it doesn't have to reinitialize some of the HW 271 * blocks because IPA has not been reset since the previous 272 * initialization. 273 */ 274 275 /* Optional */ 276 /* Header Processing Context Table Information */ 277 uint8_t hdr_proc_ctx_tbl_info_valid; 278 /* Must be set to true if hdr_proc_ctx_tbl_info is being passed */ 279 struct ipa_hdr_proc_ctx_tbl_info_type_v01 hdr_proc_ctx_tbl_info; 280 /* Provides information about the header processing context table. 281 */ 282 283 /* Optional */ 284 /* Compression Decompression Table Information */ 285 uint8_t zip_tbl_info_valid; 286 /* Must be set to true if zip_tbl_info is being passed */ 287 struct ipa_zip_tbl_info_type_v01 zip_tbl_info; 288 /* Provides information about the zip table. 289 */ 290 291 /* Optional */ 292 /* IPv4 Hashable Routing Table Information */ 293 /** Must be set to true if v4_hash_route_tbl_info is being passed */ 294 uint8_t v4_hash_route_tbl_info_valid; 295 struct ipa_route_tbl_info_type_v01 v4_hash_route_tbl_info; 296 297 /* Optional */ 298 /* IPv6 Hashable Routing Table Information */ 299 /** Must be set to true if v6_hash_route_tbl_info is being passed */ 300 uint8_t v6_hash_route_tbl_info_valid; 301 struct ipa_route_tbl_info_type_v01 v6_hash_route_tbl_info; 302 303 /* 304 * Optional 305 * IPv4 Hashable Filter Table Start Address 306 * Must be set to true if v4_hash_filter_tbl_start_addr 307 * is being passed 308 */ 309 uint8_t v4_hash_filter_tbl_start_addr_valid; 310 uint32_t v4_hash_filter_tbl_start_addr; 311 /* Identifies the starting address of the IPv4 hashable filter 312 * table in IPAv3 onwards. Denotes the offset from the start of 313 * the IPA shared memory. 314 */ 315 316 /* Optional 317 * IPv6 Hashable Filter Table Start Address 318 * Must be set to true if v6_hash_filter_tbl_start_addr 319 * is being passed 320 */ 321 uint8_t v6_hash_filter_tbl_start_addr_valid; 322 uint32_t v6_hash_filter_tbl_start_addr; 323 /* Identifies the starting address of the IPv6 hashable filter 324 * table in IPAv3 onwards. Denotes the offset from the start of 325 * the IPA shared memory. 326 */ 327 328 /* Optional 329 * Modem HW Stats Quota Base address 330 * Must be set to true if hw_stats_quota_base_addr 331 * is being passed 332 */ 333 uint8_t hw_stats_quota_base_addr_valid; 334 uint32_t hw_stats_quota_base_addr; 335 336 /* Optional 337 * Modem HW Stats Quota Size 338 * Must be set to true if hw_stats_quota_size 339 * is being passed 340 */ 341 uint8_t hw_stats_quota_size_valid; 342 uint32_t hw_stats_quota_size; 343 344 /* Optional 345 * Modem HW Drop Stats Table Start Address 346 * Must be set to true if hw_drop_stats_base_addr 347 * is being passed 348 */ 349 uint8_t hw_drop_stats_base_addr_valid; 350 uint32_t hw_drop_stats_base_addr; 351 352 /* Optional 353 * Modem HW Drop Stats Table size 354 * Must be set to true if hw_drop_stats_table_size 355 * is being passed 356 */ 357 uint8_t hw_drop_stats_table_size_valid; 358 uint32_t hw_drop_stats_table_size; 359 }; /* Message */ 360 361 /* Response Message; Requests the modem IPA driver about initialization */ 362 struct ipa_init_modem_driver_resp_msg_v01 { 363 /* Mandatory */ 364 /* Result Code */ 365 struct ipa_qmi_response_type_v01 resp; 366 /* Standard response type.*/ 367 368 /* Optional */ 369 /* Destination end point for control commands from master driver */ 370 uint8_t ctrl_comm_dest_end_pt_valid; 371 /* Must be set to true if ctrl_comm_dest_ep is being passed */ 372 uint32_t ctrl_comm_dest_end_pt; 373 /* Provides information about the destination end point on the 374 * modem processor to which the master driver can send control 375 * commands. The value of this parameter cannot exceed 19 since 376 * IPA only supports 20 end points. This field is looked at only 377 * if the result in TLV RESULT_CODE is QMI_RESULT_SUCCESS 378 */ 379 380 /* Optional */ 381 /* Default end point */ 382 uint8_t default_end_pt_valid; 383 /* Must be set to true if default_end_pt is being passed */ 384 uint32_t default_end_pt; 385 /* Provides information about the default end point. The master 386 * driver may or may not set the register in the hardware with 387 * this value. The value of this parameter cannot exceed 19 388 * since IPA only supports 20 end points. This field is looked 389 * at only if the result in TLV RESULT_CODE is QMI_RESULT_SUCCESS 390 */ 391 392 /* Optional */ 393 /* Modem Driver Initialization Pending */ 394 uint8_t modem_driver_init_pending_valid; 395 /* Must be set to true if modem_driver_init_pending is being passed */ 396 uint8_t modem_driver_init_pending; 397 /* 398 * Identifies if second level message handshake is needed 399 * between drivers to indicate when IPA HWP loading is completed. 400 * If this is set by modem driver, AP driver will need to wait 401 * for a INIT_MODEM_DRIVER_CMPLT message before communicating with 402 * IPA HWP. 403 */ 404 }; /* Message */ 405 406 /* 407 * Request Message; Request from Modem IPA driver to indicate 408 * modem driver init completion 409 */ 410 struct ipa_init_modem_driver_cmplt_req_msg_v01 { 411 /* Mandatory */ 412 /* Modem Driver init complete status; */ 413 uint8_t status; 414 /* 415 * Specifies whether the modem driver initialization is complete 416 * including the micro controller image loading. 417 */ 418 }; /* Message */ 419 420 /* 421 * Response Message; Request from Modem IPA driver to indicate 422 * modem driver init completion 423 */ 424 struct ipa_init_modem_driver_cmplt_resp_msg_v01 { 425 /* Mandatory */ 426 /* Result Code */ 427 struct ipa_qmi_response_type_v01 resp; 428 /**< Standard response type.*/ 429 }; /* Message */ 430 431 /* Request Message; This is the message that is exchanged between the 432 * control point and the service in order to register for indications. 433 */ 434 struct ipa_indication_reg_req_msg_v01 { 435 /* Optional */ 436 /* Master driver initialization completion */ 437 uint8_t master_driver_init_complete_valid; 438 /* Must be set to true if master_driver_init_complete is being passed */ 439 uint8_t master_driver_init_complete; 440 /* If set to TRUE, this field indicates that the client is 441 * interested in getting indications about the completion 442 * of the initialization sequence of the master driver. 443 * Setting this field in the request message makes sense 444 * only when the QMI_IPA_INDICATION_REGISTER_REQ is being 445 * originated from the modem driver 446 */ 447 448 /* Optional */ 449 /* Data Usage Quota Reached */ 450 uint8_t data_usage_quota_reached_valid; 451 /* Must be set to true if data_usage_quota_reached is being passed */ 452 uint8_t data_usage_quota_reached; 453 /* If set to TRUE, this field indicates that the client wants to 454 * receive indications about reaching the data usage quota that 455 * previously set via QMI_IPA_SET_DATA_USAGE_QUOTA. Setting this field 456 * in the request message makes sense only when the 457 * QMI_IPA_INDICATION_REGISTER_REQ is being originated from the Master 458 * driver 459 */ 460 461 /* Optional */ 462 /* IPA MHI Ready Indication */ 463 uint8_t ipa_mhi_ready_ind_valid; 464 /* Must be set to true if ipa_mhi_ready_ind is being passed */ 465 uint8_t ipa_mhi_ready_ind; 466 /* 467 * If set to TRUE, this field indicates that the client wants to 468 * receive indications about MHI ready for Channel allocations. 469 */ 470 471 /* Optional */ 472 /* Endpoint Desc Info Indication */ 473 uint8_t endpoint_desc_ind_valid; 474 /* Must be set to true if endpoint_desc_ind is being passed */ 475 uint8_t endpoint_desc_ind; 476 /* 477 * If set to TRUE, this field indicates that the client wants to 478 * receive indications for Endpoint descriptor information via 479 * QMI_IPA_ENDP_DESC_INDICATION. Setting this field in the request 480 * message makes sense only when the QMI_IPA_INDICATION_REGISTER_REQ 481 * is being originated from the master driver. 482 */ 483 484 /* Optional */ 485 /* BW CHANGE Indication */ 486 uint8_t bw_change_ind_valid; 487 /* Must be set to true if bw_change_ind is being passed */ 488 uint8_t bw_change_ind; 489 /* 490 * If set to TRUE, this field indicates that the client wants to 491 * receive indications for BW change information via 492 * QMI_IPA_BW_CHANGE_INDICATION. Setting this field in the request 493 * message makes sense only when the QMI_IPA_INDICATION_REGISTER_REQ 494 * is being originated from the master driver. 495 */ 496 }; /* Message */ 497 498 499 /* Response Message; This is the message that is exchanged between the 500 * control point and the service in order to register for indications. 501 */ 502 struct ipa_indication_reg_resp_msg_v01 { 503 /* Mandatory */ 504 /* Result Code */ 505 struct ipa_qmi_response_type_v01 resp; 506 /**< Standard response type.*/ 507 }; /* Message */ 508 509 510 /* Indication Message; Indication sent to the Modem IPA driver from 511 * master IPA driver about initialization being complete. 512 */ 513 struct ipa_master_driver_init_complt_ind_msg_v01 { 514 /* Mandatory */ 515 /* Master driver initialization completion status */ 516 struct ipa_qmi_response_type_v01 master_driver_init_status; 517 /* Indicates the status of initialization. If everything went 518 * as expected, this field is set to SUCCESS. ERROR is set 519 * otherwise. Extended error info may be used to convey 520 * additional information about the error 521 */ 522 }; /* Message */ 523 524 struct ipa_ipfltr_range_eq_16_type_v01 { 525 uint8_t offset; 526 /* Specifies the offset from the IHL (Internet Header length) */ 527 528 uint16_t range_low; 529 /* Specifies the lower bound of the range */ 530 531 uint16_t range_high; 532 /* Specifies the upper bound of the range */ 533 }; /* Type */ 534 535 struct ipa_ipfltr_mask_eq_32_type_v01 { 536 uint8_t offset; 537 /* Specifies the offset either from IHL or from the start of 538 * the IP packet. This depends on the equation that this structure 539 * is used in. 540 */ 541 542 uint32_t mask; 543 /* Specifies the mask that has to be used in the comparison. 544 * The field is ANDed with the mask and compared against the value. 545 */ 546 547 uint32_t value; 548 /* Specifies the 32 bit value that used in the comparison. */ 549 }; /* Type */ 550 551 struct ipa_ipfltr_eq_16_type_v01 { 552 uint8_t offset; 553 /* Specifies the offset into the packet */ 554 555 uint16_t value; 556 /* Specifies the 16 bit value that should be used in the comparison. */ 557 }; /* Type */ 558 559 struct ipa_ipfltr_eq_32_type_v01 { 560 uint8_t offset; 561 /* Specifies the offset into the packet */ 562 563 uint32_t value; 564 /* Specifies the 32 bit value that should be used in the comparison. */ 565 }; /* Type */ 566 567 struct ipa_ipfltr_mask_eq_128_type_v01 { 568 uint8_t offset; 569 /* Specifies the offset into the packet */ 570 571 uint8_t mask[16]; 572 /* Specifies the mask that has to be used in the comparison. 573 * The field is ANDed with the mask and compared against the value. 574 */ 575 576 uint8_t value[16]; 577 /* Specifies the 128 bit value that should be used in the comparison. */ 578 }; /* Type */ 579 580 581 struct ipa_filter_rule_type_v01 { 582 uint16_t rule_eq_bitmap; 583 /* 16-bit Bitmask to indicate how many eqs are valid in this rule */ 584 585 uint8_t tos_eq_present; 586 /* 587 * tos_eq_present field has two meanings: 588 * IPA ver < 4.5: 589 * specifies if a type of service check rule is present 590 * (as the field name reveals). 591 * IPA ver >= 4.5: 592 * specifies if a tcp pure ack check rule is present 593 */ 594 595 uint8_t tos_eq; 596 /* The value to check against the type of service (ipv4) field */ 597 598 uint8_t protocol_eq_present; 599 /* Specifies if a protocol check rule is present */ 600 601 uint8_t protocol_eq; 602 /* The value to check against the protocol field */ 603 604 uint8_t num_ihl_offset_range_16; 605 /* The number of 16 bit range check rules at the location 606 * determined by IP header length plus a given offset offset 607 * in this rule. See the definition of the ipa_filter_range_eq_16 608 * for better understanding. The value of this field cannot exceed 609 * IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS which is set as 2 610 */ 611 612 struct ipa_ipfltr_range_eq_16_type_v01 613 ihl_offset_range_16[QMI_IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS_V01]; 614 /* Array of the registered IP header length offset 16 bit range 615 * check rules. 616 */ 617 618 uint8_t num_offset_meq_32; 619 /* The number of 32 bit masked comparison rules present 620 * in this rule 621 */ 622 623 struct ipa_ipfltr_mask_eq_32_type_v01 624 offset_meq_32[QMI_IPA_IPFLTR_NUM_MEQ_32_EQNS_V01]; 625 /* An array of all the possible 32bit masked comparison rules 626 * in this rule 627 */ 628 629 uint8_t tc_eq_present; 630 /* Specifies if the traffic class rule is present in this rule */ 631 632 uint8_t tc_eq; 633 /* The value against which the IPV4 traffic class field has to 634 * be checked 635 */ 636 637 uint8_t flow_eq_present; 638 /* Specifies if the "flow equals" rule is present in this rule */ 639 640 uint32_t flow_eq; 641 /* The value against which the IPV6 flow field has to be checked */ 642 643 uint8_t ihl_offset_eq_16_present; 644 /* Specifies if there is a 16 bit comparison required at the 645 * location in the packet determined by "Intenet Header length 646 * + specified offset" 647 */ 648 649 struct ipa_ipfltr_eq_16_type_v01 ihl_offset_eq_16; 650 /* The 16 bit comparison equation */ 651 652 uint8_t ihl_offset_eq_32_present; 653 /* Specifies if there is a 32 bit comparison required at the 654 * location in the packet determined by "Intenet Header length 655 * + specified offset" 656 */ 657 658 struct ipa_ipfltr_eq_32_type_v01 ihl_offset_eq_32; 659 /* The 32 bit comparison equation */ 660 661 uint8_t num_ihl_offset_meq_32; 662 /* The number of 32 bit masked comparison equations in this 663 * rule. The location of the packet to be compared is 664 * determined by the IP Header length + the give offset 665 */ 666 667 struct ipa_ipfltr_mask_eq_32_type_v01 668 ihl_offset_meq_32[QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01]; 669 /* Array of 32 bit masked comparison equations. 670 */ 671 672 uint8_t num_offset_meq_128; 673 /* The number of 128 bit comparison equations in this rule */ 674 675 struct ipa_ipfltr_mask_eq_128_type_v01 676 offset_meq_128[QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01]; 677 /* Array of 128 bit comparison equations. The location in the 678 * packet is determined by the specified offset 679 */ 680 681 uint8_t metadata_meq32_present; 682 /* Boolean indicating if the 32 bit masked comparison equation 683 * is present or not. Comparison is done against the metadata 684 * in IPA. Metadata can either be extracted from the packet 685 * header or from the "metadata" register. 686 */ 687 688 struct ipa_ipfltr_mask_eq_32_type_v01 689 metadata_meq32; 690 /* The metadata 32 bit masked comparison equation */ 691 692 uint8_t ipv4_frag_eq_present; 693 /* Specifies if the IPv4 Fragment equation is present in this rule */ 694 }; /* Type */ 695 696 697 struct ipa_filter_rule_req2_type_v01 { 698 uint16_t rule_eq_bitmap; 699 /* 16-bit Bitmask to indicate how many eqs are valid in this rule */ 700 701 uint8_t pure_ack_eq_present; 702 /* 703 * specifies if a tcp pure ack check rule is present 704 */ 705 706 uint8_t pure_ack_eq; 707 /* The value to check against the type of service (ipv4) field */ 708 709 uint8_t protocol_eq_present; 710 /* Specifies if a protocol check rule is present */ 711 712 uint8_t protocol_eq; 713 /* The value to check against the protocol field */ 714 715 uint8_t num_ihl_offset_range_16; 716 /* The number of 16 bit range check rules at the location 717 * determined by IP header length plus a given offset offset 718 * in this rule. See the definition of the ipa_filter_range_eq_16 719 * for better understanding. The value of this field cannot exceed 720 * IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS which is set as 2 721 */ 722 723 struct ipa_ipfltr_range_eq_16_type_v01 724 ihl_offset_range_16[QMI_IPA_IPFLTR_NUM_IHL_RANGE_16_EQNS_V01]; 725 /* Array of the registered IP header length offset 16 bit range 726 * check rules. 727 */ 728 729 uint8_t num_offset_meq_32; 730 /* The number of 32 bit masked comparison rules present 731 * in this rule 732 */ 733 734 struct ipa_ipfltr_mask_eq_32_type_v01 735 offset_meq_32[QMI_IPA_IPFLTR_NUM_MEQ_32_EQNS_V01]; 736 /* An array of all the possible 32bit masked comparison rules 737 * in this rule 738 */ 739 740 uint8_t tc_eq_present; 741 /* Specifies if the traffic class rule is present in this rule */ 742 743 uint8_t tc_eq; 744 /* The value against which the IPV4 traffic class field has to 745 * be checked 746 */ 747 748 uint8_t flow_eq_present; 749 /* Specifies if the "flow equals" rule is present in this rule */ 750 751 uint32_t flow_eq; 752 /* The value against which the IPV6 flow field has to be checked */ 753 754 uint8_t ihl_offset_eq_16_present; 755 /* Specifies if there is a 16 bit comparison required at the 756 * location in the packet determined by "Intenet Header length 757 * + specified offset" 758 */ 759 760 struct ipa_ipfltr_eq_16_type_v01 ihl_offset_eq_16; 761 /* The 16 bit comparison equation */ 762 763 uint8_t ihl_offset_eq_32_present; 764 /* Specifies if there is a 32 bit comparison required at the 765 * location in the packet determined by "Intenet Header length 766 * + specified offset" 767 */ 768 769 struct ipa_ipfltr_eq_32_type_v01 ihl_offset_eq_32; 770 /* The 32 bit comparison equation */ 771 772 uint8_t num_ihl_offset_meq_32; 773 /* The number of 32 bit masked comparison equations in this 774 * rule. The location of the packet to be compared is 775 * determined by the IP Header length + the give offset 776 */ 777 778 struct ipa_ipfltr_mask_eq_32_type_v01 779 ihl_offset_meq_32[QMI_IPA_IPFLTR_NUM_IHL_MEQ_32_EQNS_V01]; 780 /* Array of 32 bit masked comparison equations. 781 */ 782 783 uint8_t num_offset_meq_128; 784 /* The number of 128 bit comparison equations in this rule */ 785 786 struct ipa_ipfltr_mask_eq_128_type_v01 787 offset_meq_128[QMI_IPA_IPFLTR_NUM_MEQ_128_EQNS_V01]; 788 /* Array of 128 bit comparison equations. The location in the 789 * packet is determined by the specified offset 790 */ 791 792 uint8_t metadata_meq32_present; 793 /* Boolean indicating if the 32 bit masked comparison equation 794 * is present or not. Comparison is done against the metadata 795 * in IPA. Metadata can either be extracted from the packet 796 * header or from the "metadata" register. 797 */ 798 799 struct ipa_ipfltr_mask_eq_32_type_v01 800 metadata_meq32; 801 /* The metadata 32 bit masked comparison equation */ 802 803 uint8_t ipv4_frag_eq_present; 804 /* Specifies if the IPv4 Fragment equation is present in this rule */ 805 }; /* Type */ 806 807 enum ipa_ip_type_enum_v01 { 808 IPA_IP_TYPE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 809 /* To force a 32 bit signed enum. Do not change or use*/ 810 QMI_IPA_IP_TYPE_INVALID_V01 = 0, 811 /* Invalid IP type identifier */ 812 QMI_IPA_IP_TYPE_V4_V01 = 1, 813 /* IP V4 type */ 814 QMI_IPA_IP_TYPE_V6_V01 = 2, 815 /* IP V6 type */ 816 QMI_IPA_IP_TYPE_V4V6_V01 = 3, 817 /* Applies to both IP types */ 818 IPA_IP_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 819 /* To force a 32 bit signed enum. Do not change or use*/ 820 }; 821 822 823 enum ipa_filter_action_enum_v01 { 824 IPA_FILTER_ACTION_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 825 /* To force a 32 bit signed enum. Do not change or use */ 826 QMI_IPA_FILTER_ACTION_INVALID_V01 = 0, 827 /* Invalid action on filter hit */ 828 QMI_IPA_FILTER_ACTION_SRC_NAT_V01 = 1, 829 /* Pass packet to NAT block for Source NAT */ 830 QMI_IPA_FILTER_ACTION_DST_NAT_V01 = 2, 831 /* Pass packet to NAT block for Destination NAT */ 832 QMI_IPA_FILTER_ACTION_ROUTING_V01 = 3, 833 /* Pass packet to Routing block */ 834 QMI_IPA_FILTER_ACTION_EXCEPTION_V01 = 4, 835 /* Treat packet as exception and send to exception pipe */ 836 IPA_FILTER_ACTION_ENUM_MAX_ENUM_VAL_V01 = 2147483647 837 /* To force a 32 bit signed enum. Do not change or use*/ 838 }; 839 840 struct ipa_filter_spec_type_v01 { 841 uint32_t filter_spec_identifier; 842 /* This field is used to identify a filter spec in the list 843 * of filter specs being sent from the client. This field 844 * is applicable only in the filter install request and response. 845 */ 846 847 enum ipa_ip_type_enum_v01 ip_type; 848 /* This field identifies the IP type for which this rule is 849 * applicable. The driver needs to identify the filter table 850 * (V6 or V4) and this field is essential for that 851 */ 852 853 struct ipa_filter_rule_type_v01 filter_rule; 854 /* This field specifies the rules in the filter spec. These rules 855 * are the ones that are matched against fields in the packet. 856 */ 857 858 enum ipa_filter_action_enum_v01 filter_action; 859 /* This field specifies the action to be taken when a filter match 860 * occurs. The remote side should install this information into the 861 * hardware along with the filter equations. 862 */ 863 864 uint8_t is_routing_table_index_valid; 865 /* Specifies whether the routing table index is present or not. 866 * If the action is "QMI_IPA_FILTER_ACTION_EXCEPTION", this 867 * parameter need not be provided. 868 */ 869 870 uint32_t route_table_index; 871 /* This is the index in the routing table that should be used 872 * to route the packets if the filter rule is hit 873 */ 874 875 uint8_t is_mux_id_valid; 876 /* Specifies whether the mux_id is valid */ 877 878 uint32_t mux_id; 879 /* This field identifies the QMAP MUX ID. As a part of QMAP 880 * protocol, several data calls may be multiplexed over the 881 * same physical transport channel. This identifier is used to 882 * identify one such data call. The maximum value for this 883 * identifier is 255. 884 */ 885 }; /* Type */ 886 887 struct ipa_filter_spec_ex_type_v01 { 888 enum ipa_ip_type_enum_v01 ip_type; 889 /* This field identifies the IP type for which this rule is 890 * applicable. The driver needs to identify the filter table 891 * (V6 or V4) and this field is essential for that 892 */ 893 894 struct ipa_filter_rule_type_v01 filter_rule; 895 /* This field specifies the rules in the filter spec. These rules 896 * are the ones that are matched against fields in the packet. 897 */ 898 899 enum ipa_filter_action_enum_v01 filter_action; 900 /* This field specifies the action to be taken when a filter match 901 * occurs. The remote side should install this information into the 902 * hardware along with the filter equations. 903 */ 904 905 uint8_t is_routing_table_index_valid; 906 /* Specifies whether the routing table index is present or not. 907 * If the action is "QMI_IPA_FILTER_ACTION_EXCEPTION", this 908 * parameter need not be provided. 909 */ 910 911 uint32_t route_table_index; 912 /* This is the index in the routing table that should be used 913 * to route the packets if the filter rule is hit 914 */ 915 916 uint8_t is_mux_id_valid; 917 /* Specifies whether the mux_id is valid */ 918 919 uint32_t mux_id; 920 /* This field identifies the QMAP MUX ID. As a part of QMAP 921 * protocol, several data calls may be multiplexed over the 922 * same physical transport channel. This identifier is used to 923 * identify one such data call. The maximum value for this 924 * identifier is 255. 925 */ 926 927 uint32_t rule_id; 928 /* Rule Id of the given filter. The Rule Id is populated in the rule 929 * header when installing the rule in IPA. 930 */ 931 932 uint8_t is_rule_hashable; 933 /** Specifies whether the given rule is hashable. 934 */ 935 }; /* Type */ 936 937 struct ipa_filter_spec_ex2_type_v01 { 938 enum ipa_ip_type_enum_v01 ip_type; 939 /* This field identifies the IP type for which this rule is 940 * applicable. The driver needs to identify the filter table 941 * (V6 or V4) and this field is essential for that 942 */ 943 944 struct ipa_filter_rule_req2_type_v01 filter_rule; 945 /* This field specifies the rules in the filter spec. These rules 946 * are the ones that are matched against fields in the packet. 947 */ 948 949 enum ipa_filter_action_enum_v01 filter_action; 950 /* This field specifies the action to be taken when a filter match 951 * occurs. The remote side should install this information into the 952 * hardware along with the filter equations. 953 */ 954 955 uint8_t is_routing_table_index_valid; 956 /* Specifies whether the routing table index is present or not. 957 * If the action is "QMI_IPA_FILTER_ACTION_EXCEPTION", this 958 * parameter need not be provided. 959 */ 960 961 uint32_t route_table_index; 962 /* This is the index in the routing table that should be used 963 * to route the packets if the filter rule is hit 964 */ 965 966 uint8_t is_mux_id_valid; 967 /* Specifies whether the mux_id is valid */ 968 969 uint32_t mux_id; 970 /* This field identifies the QMAP MUX ID. As a part of QMAP 971 * protocol, several data calls may be multiplexed over the 972 * same physical transport channel. This identifier is used to 973 * identify one such data call. The maximum value for this 974 * identifier is 255. 975 */ 976 977 uint32_t rule_id; 978 /* Rule Id of the given filter. The Rule Id is populated in the rule 979 * header when installing the rule in IPA. 980 */ 981 982 uint8_t is_rule_hashable; 983 /** Specifies whether the given rule is hashable. 984 */ 985 }; /* Type */ 986 987 /* Request Message; This is the message that is exchanged between the 988 * control point and the service in order to request the installation 989 * of filtering rules in the hardware block by the remote side. 990 */ 991 struct ipa_install_fltr_rule_req_msg_v01 { 992 /* Optional 993 * IP type that this rule applies to 994 * Filter specification to be installed in the hardware 995 */ 996 uint8_t filter_spec_list_valid; 997 /* Must be set to true if filter_spec_list is being passed */ 998 uint32_t filter_spec_list_len; 999 /* Must be set to # of elements in filter_spec_list */ 1000 struct ipa_filter_spec_type_v01 1001 filter_spec_list[QMI_IPA_MAX_FILTERS_V01]; 1002 /* This structure defines the list of filters that have 1003 * to be installed in the hardware. The driver installing 1004 * these rules shall do so in the same order as specified 1005 * in this list. 1006 */ 1007 1008 /* Optional */ 1009 /* Pipe index to intall rule */ 1010 uint8_t source_pipe_index_valid; 1011 /* Must be set to true if source_pipe_index is being passed */ 1012 uint32_t source_pipe_index; 1013 /* This is the source pipe on which the filter rule is to be 1014 * installed. The requestor may always not know the pipe 1015 * indices. If not specified, the receiver shall install 1016 * this rule on all the pipes that it controls through 1017 * which data may be fed into IPA. 1018 */ 1019 1020 /* Optional */ 1021 /* Total number of IPv4 filters in the filter spec list */ 1022 uint8_t num_ipv4_filters_valid; 1023 /* Must be set to true if num_ipv4_filters is being passed */ 1024 uint32_t num_ipv4_filters; 1025 /* Number of IPv4 rules included in filter spec list */ 1026 1027 /* Optional */ 1028 /* Total number of IPv6 filters in the filter spec list */ 1029 uint8_t num_ipv6_filters_valid; 1030 /* Must be set to true if num_ipv6_filters is being passed */ 1031 uint32_t num_ipv6_filters; 1032 /* Number of IPv6 rules included in filter spec list */ 1033 1034 /* Optional */ 1035 /* List of XLAT filter indices in the filter spec list */ 1036 uint8_t xlat_filter_indices_list_valid; 1037 /* Must be set to true if xlat_filter_indices_list 1038 * is being passed 1039 */ 1040 uint32_t xlat_filter_indices_list_len; 1041 /* Must be set to # of elements in xlat_filter_indices_list */ 1042 uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_V01]; 1043 /* List of XLAT filter indices. Filter rules at specified indices 1044 * will need to be modified by the receiver if the PDN is XLAT 1045 * before installing them on the associated IPA consumer pipe. 1046 */ 1047 1048 /* Optional */ 1049 /* Extended Filter Specification */ 1050 uint8_t filter_spec_ex_list_valid; 1051 /* Must be set to true if filter_spec_ex_list is being passed */ 1052 uint32_t filter_spec_ex_list_len; 1053 /* Must be set to # of elements in filter_spec_ex_list */ 1054 struct ipa_filter_spec_ex_type_v01 1055 filter_spec_ex_list[QMI_IPA_MAX_FILTERS_V01]; 1056 /* 1057 * List of filter specifications of filters that must be installed in 1058 * the IPAv3.x hardware. 1059 * The driver installing these rules must do so in the same 1060 * order as specified in this list. 1061 */ 1062 1063 /* Optional */ 1064 /* Extended Type 2 Filter Specification */ 1065 uint8_t filter_spec_ex2_list_valid; 1066 /* Must be set to true if filter_spec_ex2_list is being passed */ 1067 uint32_t filter_spec_ex2_list_len; 1068 /* Must be set to # of elements in filter_spec_ex2_list */ 1069 struct ipa_filter_spec_ex2_type_v01 1070 filter_spec_ex2_list[QMI_IPA_MAX_FILTERS_V01]; 1071 1072 /* Optional */ 1073 /* List of modem UL Filters in the Spec List which need be to 1074 * replicated with AP UL firewall filters 1075 */ 1076 uint8_t ul_firewall_indices_list_valid; 1077 /* Must be set to # of elements in ul_firewall_indices_list */ 1078 uint32_t ul_firewall_indices_list_len; 1079 uint32_t ul_firewall_indices_list[QMI_IPA_MAX_FILTERS_V01]; 1080 /* List of UL firewall filter indices. 1081 * Filter rules at specified indices must be replicated across 1082 * the firewall filters by the receiver and installed on the 1083 * associated IPA consumer pipe. 1084 */ 1085 }; /* Message */ 1086 1087 struct ipa_filter_rule_identifier_to_handle_map_v01 { 1088 uint32_t filter_spec_identifier; 1089 /* This field is used to identify a filter spec in the list of 1090 * filter specs being sent from the client. This field is 1091 * applicable only in the filter install request and response. 1092 */ 1093 uint32_t filter_handle; 1094 /* This field is used to identify a rule in any subsequent message. 1095 * This is a value that is provided by the server to the control 1096 * point 1097 */ 1098 }; /* Type */ 1099 1100 /* Response Message; This is the message that is exchanged between the 1101 * control point and the service in order to request the 1102 * installation of filtering rules in the hardware block by 1103 * the remote side. 1104 */ 1105 struct ipa_install_fltr_rule_resp_msg_v01 { 1106 /* Mandatory */ 1107 /* Result Code */ 1108 struct ipa_qmi_response_type_v01 resp; 1109 /* Standard response type. 1110 * Standard response type. Contains the following data members: 1111 * - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 1112 * - qmi_error_type -- Error code. Possible error code values are 1113 * described in the error codes section of each message definition. 1114 */ 1115 1116 /* Optional */ 1117 /* Filter Handle List */ 1118 uint8_t filter_handle_list_valid; 1119 /* Must be set to true if filter_handle_list is being passed */ 1120 uint32_t filter_handle_list_len; 1121 /* Must be set to # of elements in filter_handle_list */ 1122 struct ipa_filter_rule_identifier_to_handle_map_v01 1123 filter_handle_list[QMI_IPA_MAX_FILTERS_V01]; 1124 /* 1125 * List of handles returned to the control point. Each handle is 1126 * mapped to the rule identifier that was specified in the 1127 * request message. Any further reference to the rule is done 1128 * using the filter handle. 1129 */ 1130 1131 /* Optional */ 1132 /* Rule id List */ 1133 uint8_t rule_id_valid; 1134 /* Must be set to true if rule_id is being passed */ 1135 uint32_t rule_id_len; 1136 /* Must be set to # of elements in rule_id */ 1137 uint32_t rule_id[QMI_IPA_MAX_FILTERS_V01]; 1138 /* 1139 * List of rule ids returned to the control point. 1140 * Any further reference to the rule is done using the 1141 * filter rule id specified in this list. 1142 */ 1143 }; /* Message */ 1144 1145 struct ipa_filter_handle_to_index_map_v01 { 1146 uint32_t filter_handle; 1147 /* This is a handle that was given to the remote client that 1148 * requested the rule addition. 1149 */ 1150 uint32_t filter_index; 1151 /* This index denotes the location in a filter table, where the 1152 * filter rule has been installed. The maximum value of this 1153 * field is 64. 1154 */ 1155 }; /* Type */ 1156 1157 /* Request Message; This is the message that is exchanged between the 1158 * control point and the service in order to notify the remote driver 1159 * of the installation of the filter rule supplied earlier by the 1160 * remote driver. 1161 */ 1162 struct ipa_fltr_installed_notif_req_msg_v01 { 1163 /* Mandatory */ 1164 /* Pipe index */ 1165 uint32_t source_pipe_index; 1166 /* This is the source pipe on which the filter rule has been 1167 * installed or was attempted to be installed 1168 */ 1169 1170 /* Mandatory */ 1171 /* Installation Status */ 1172 enum ipa_qmi_result_type_v01 install_status; 1173 /* This is the status of installation. If this indicates 1174 * SUCCESS, other optional fields carry additional 1175 * information 1176 */ 1177 1178 /* Mandatory */ 1179 /* List of Filter Indices */ 1180 uint32_t filter_index_list_len; 1181 /* Must be set to # of elements in filter_index_list */ 1182 struct ipa_filter_handle_to_index_map_v01 1183 filter_index_list[QMI_IPA_MAX_FILTERS_V01]; 1184 /* 1185 * Provides the list of filter indices and the corresponding 1186 * filter handle. If the installation_status indicates a 1187 * failure, the filter indices must be set to a reserve 1188 * index (255). 1189 */ 1190 1191 /* Optional */ 1192 /* Embedded pipe index */ 1193 uint8_t embedded_pipe_index_valid; 1194 /* Must be set to true if embedded_pipe_index is being passed */ 1195 uint32_t embedded_pipe_index; 1196 /* This index denotes the embedded pipe number on which a call to 1197 * the same PDN has been made. If this field is set, it denotes 1198 * that this is a use case where PDN sharing is happening. The 1199 * embedded pipe is used to send data from the embedded client 1200 * in the device 1201 */ 1202 1203 /* Optional */ 1204 /* Retain Header Configuration */ 1205 uint8_t retain_header_valid; 1206 /* Must be set to true if retain_header is being passed */ 1207 uint8_t retain_header; 1208 /* This field indicates if the driver installing the rule has 1209 * turned on the "retain header" bit. If this is true, the 1210 * header that is removed by IPA is reinserted after the 1211 * packet processing is completed. 1212 */ 1213 1214 /* Optional */ 1215 /* Embedded call Mux Id */ 1216 uint8_t embedded_call_mux_id_valid; 1217 /**< Must be set to true if embedded_call_mux_id is being passed */ 1218 uint32_t embedded_call_mux_id; 1219 /* This identifies one of the many calls that have been originated 1220 * on the embedded pipe. This is how we identify the PDN gateway 1221 * to which traffic from the source pipe has to flow. 1222 */ 1223 1224 /* Optional */ 1225 /* Total number of IPv4 filters in the filter index list */ 1226 uint8_t num_ipv4_filters_valid; 1227 /* Must be set to true if num_ipv4_filters is being passed */ 1228 uint32_t num_ipv4_filters; 1229 /* Number of IPv4 rules included in filter index list */ 1230 1231 /* Optional */ 1232 /* Total number of IPv6 filters in the filter index list */ 1233 uint8_t num_ipv6_filters_valid; 1234 /* Must be set to true if num_ipv6_filters is being passed */ 1235 uint32_t num_ipv6_filters; 1236 /* Number of IPv6 rules included in filter index list */ 1237 1238 /* Optional */ 1239 /* Start index on IPv4 filters installed on source pipe */ 1240 uint8_t start_ipv4_filter_idx_valid; 1241 /* Must be set to true if start_ipv4_filter_idx is being passed */ 1242 uint32_t start_ipv4_filter_idx; 1243 /* Start index of IPv4 rules in filter index list */ 1244 1245 /* Optional */ 1246 /* Start index on IPv6 filters installed on source pipe */ 1247 uint8_t start_ipv6_filter_idx_valid; 1248 /* Must be set to true if start_ipv6_filter_idx is being passed */ 1249 uint32_t start_ipv6_filter_idx; 1250 /* Start index of IPv6 rules in filter index list */ 1251 1252 /* Optional */ 1253 /* List of Rule Ids */ 1254 uint8_t rule_id_valid; 1255 /* Must be set to true if rule_id is being passed */ 1256 uint32_t rule_id_len; 1257 /* Must be set to # of elements in rule_id */ 1258 uint32_t rule_id[QMI_IPA_MAX_FILTERS_V01]; 1259 /* 1260 * Provides the list of Rule Ids of rules added in IPA on the given 1261 * source pipe index. If the install_status TLV indicates a 1262 * failure, the Rule Ids in this list must be set to a reserved 1263 * index (255). 1264 */ 1265 1266 /* Optional */ 1267 /* List of destination pipe IDs. */ 1268 uint8_t dst_pipe_id_valid; 1269 /* Must be set to true if dst_pipe_id is being passed. */ 1270 uint32_t dst_pipe_id_len; 1271 /* Must be set to # of elements in dst_pipe_id. */ 1272 uint32_t dst_pipe_id[QMI_IPA_MAX_CLIENT_DST_PIPES_V01]; 1273 /* Provides the list of destination pipe IDs for a source pipe. */ 1274 1275 /* Optional */ 1276 /* List of Rule IDs extended */ 1277 uint8_t rule_id_ex_valid; 1278 /* Must be set to true if rule_id_ex is being passed. */ 1279 uint32_t rule_id_ex_len; 1280 /* Must be set to # of elements in rule_id_ex */ 1281 uint32_t rule_id_ex[QMI_IPA_MAX_FILTERS_EX2_V01]; 1282 /* Provides the list of Rule IDs of rules added in IPA on the 1283 * given source pipe index. If the install_status TLV indicates 1284 * a failure, the Rule IDs in this list must be set to a 1285 * reserved index (255). 1286 */ 1287 }; /* Message */ 1288 1289 /* Response Message; This is the message that is exchanged between the 1290 * control point and the service in order to notify the remote driver 1291 * of the installation of the filter rule supplied earlier by the 1292 * remote driver. 1293 */ 1294 struct ipa_fltr_installed_notif_resp_msg_v01 { 1295 /* Mandatory */ 1296 /* Result Code */ 1297 struct ipa_qmi_response_type_v01 resp; 1298 /* Standard response type */ 1299 }; /* Message */ 1300 1301 /* Request Message; Notifies the remote driver of the need to clear the data 1302 * path to prevent the IPA from being blocked at the head of the processing 1303 * pipeline 1304 */ 1305 struct ipa_enable_force_clear_datapath_req_msg_v01 { 1306 /* Mandatory */ 1307 /* Pipe Mask */ 1308 uint32_t source_pipe_bitmask; 1309 /* Set of consumer (source) pipes that must be clear of 1310 * active data transfers. 1311 */ 1312 1313 /* Mandatory */ 1314 /* Request ID */ 1315 uint32_t request_id; 1316 /* Identifies the ID of the request that is sent to the server 1317 * The same request ID is used in the message to remove the force_clear 1318 * request. The server is expected to keep track of the request ID and 1319 * the source_pipe_bitmask so that it can revert as needed 1320 */ 1321 1322 /* Optional */ 1323 /* Source Throttle State */ 1324 uint8_t throttle_source_valid; 1325 /* Must be set to true if throttle_source is being passed */ 1326 uint8_t throttle_source; 1327 /* Specifies whether the server is to throttle the data from 1328 * these consumer (source) pipes after clearing the exisiting 1329 * data present in the IPA that were pulled from these pipes 1330 * The server is expected to put all the source pipes in the 1331 * source_pipe_bitmask in the same state 1332 */ 1333 }; /* Message */ 1334 1335 /* Response Message; Notifies the remote driver of the need to clear the 1336 * data path to prevent the IPA from being blocked at the head of the 1337 * processing pipeline 1338 */ 1339 struct ipa_enable_force_clear_datapath_resp_msg_v01 { 1340 /* Mandatory */ 1341 /* Result Code */ 1342 struct ipa_qmi_response_type_v01 resp; 1343 /* Standard response type */ 1344 }; /* Message */ 1345 1346 /* Request Message; Notifies the remote driver that the forceful clearing 1347 * of the data path can be lifted 1348 */ 1349 struct ipa_disable_force_clear_datapath_req_msg_v01 { 1350 /* Mandatory */ 1351 /* Request ID */ 1352 uint32_t request_id; 1353 /* Identifies the request that was sent to the server to 1354 * forcibly clear the data path. This request simply undoes 1355 * the operation done in that request 1356 */ 1357 }; /* Message */ 1358 1359 /* Response Message; Notifies the remote driver that the forceful clearing 1360 * of the data path can be lifted 1361 */ 1362 struct ipa_disable_force_clear_datapath_resp_msg_v01 { 1363 /* Mandatory */ 1364 /* Result Code */ 1365 struct ipa_qmi_response_type_v01 resp; 1366 /* Standard response type */ 1367 }; /* Message */ 1368 1369 enum ipa_peripheral_speed_enum_v01 { 1370 IPA_PERIPHERAL_SPEED_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1371 /* To force a 32 bit signed enum. Do not change or use */ 1372 QMI_IPA_PER_USB_FS_V01 = 1, 1373 /* Full-speed USB connection */ 1374 QMI_IPA_PER_USB_HS_V01 = 2, 1375 /* High-speed USB connection */ 1376 QMI_IPA_PER_USB_SS_V01 = 3, 1377 /* Super-speed USB connection */ 1378 QMI_IPA_PER_WLAN_V01 = 4, 1379 /* WLAN connection */ 1380 IPA_PERIPHERAL_SPEED_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1381 /* To force a 32 bit signed enum. Do not change or use*/ 1382 }; 1383 1384 enum ipa_pipe_mode_enum_v01 { 1385 IPA_PIPE_MODE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1386 /* To force a 32 bit signed enum. Do not change or use */ 1387 QMI_IPA_PIPE_MODE_HW_V01 = 1, 1388 /* Pipe is connected with a hardware block */ 1389 QMI_IPA_PIPE_MODE_SW_V01 = 2, 1390 /* Pipe is controlled by the software */ 1391 IPA_PIPE_MODE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1392 /* To force a 32 bit signed enum. Do not change or use */ 1393 }; 1394 1395 enum ipa_peripheral_type_enum_v01 { 1396 IPA_PERIPHERAL_TYPE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1397 /* To force a 32 bit signed enum. Do not change or use */ 1398 QMI_IPA_PERIPHERAL_USB_V01 = 1, 1399 /* Specifies a USB peripheral */ 1400 QMI_IPA_PERIPHERAL_HSIC_V01 = 2, 1401 /* Specifies an HSIC peripheral */ 1402 QMI_IPA_PERIPHERAL_PCIE_V01 = 3, 1403 /* Specifies a PCIe peripheral */ 1404 IPA_PERIPHERAL_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1405 /* To force a 32 bit signed enum. Do not change or use */ 1406 }; 1407 1408 struct ipa_config_req_msg_v01 { 1409 /* Optional */ 1410 /* Peripheral Type */ 1411 uint8_t peripheral_type_valid; 1412 /* Must be set to true if peripheral_type is being passed */ 1413 enum ipa_peripheral_type_enum_v01 peripheral_type; 1414 /* Informs the remote driver about the perhipheral for 1415 * which this configuration information is relevant. Values: 1416 * - QMI_IPA_PERIPHERAL_USB (1) -- Specifies a USB peripheral 1417 * - QMI_IPA_PERIPHERAL_HSIC(2) -- Specifies an HSIC peripheral 1418 * - QMI_IPA_PERIPHERAL_PCIE(3) -- Specifies a PCIe peripheral 1419 */ 1420 1421 /* Optional */ 1422 /* HW Deaggregation Support */ 1423 uint8_t hw_deaggr_supported_valid; 1424 /* Must be set to true if hw_deaggr_supported is being passed */ 1425 uint8_t hw_deaggr_supported; 1426 /* Informs the remote driver whether the local IPA driver 1427 * allows de-aggregation to be performed in the hardware 1428 */ 1429 1430 /* Optional */ 1431 /* Maximum Aggregation Frame Size */ 1432 uint8_t max_aggr_frame_size_valid; 1433 /* Must be set to true if max_aggr_frame_size is being passed */ 1434 uint32_t max_aggr_frame_size; 1435 /* Specifies the maximum size of the aggregated frame that 1436 * the remote driver can expect from this execution environment 1437 * - Valid range: 128 bytes to 32768 bytes 1438 */ 1439 1440 /* Optional */ 1441 /* IPA Ingress Pipe Mode */ 1442 uint8_t ipa_ingress_pipe_mode_valid; 1443 /* Must be set to true if ipa_ingress_pipe_mode is being passed */ 1444 1445 enum ipa_pipe_mode_enum_v01 ipa_ingress_pipe_mode; 1446 /* Indicates to the remote driver if the ingress pipe into the 1447 * IPA is in direct connection with another hardware block or 1448 * if the producer of data to this ingress pipe is a software 1449 * module. Values: 1450 * -QMI_IPA_PIPE_MODE_HW(1) --Pipe is connected with hardware block 1451 * -QMI_IPA_PIPE_MODE_SW(2) --Pipe is controlled by the software 1452 */ 1453 1454 /* Optional */ 1455 /* Peripheral Speed Info */ 1456 uint8_t peripheral_speed_info_valid; 1457 /* Must be set to true if peripheral_speed_info is being passed */ 1458 1459 enum ipa_peripheral_speed_enum_v01 peripheral_speed_info; 1460 /* Indicates the speed that the peripheral connected to the IPA supports 1461 * Values: 1462 * - QMI_IPA_PER_USB_FS (1) -- Full-speed USB connection 1463 * - QMI_IPA_PER_USB_HS (2) -- High-speed USB connection 1464 * - QMI_IPA_PER_USB_SS (3) -- Super-speed USB connection 1465 * - QMI_IPA_PER_WLAN (4) -- WLAN connection 1466 */ 1467 1468 /* Optional */ 1469 /* Downlink Accumulation Time limit */ 1470 uint8_t dl_accumulation_time_limit_valid; 1471 /* Must be set to true if dl_accumulation_time_limit is being passed */ 1472 uint32_t dl_accumulation_time_limit; 1473 /* Informs the remote driver about the time for which data 1474 * is accumulated in the downlink direction before it is pushed into the 1475 * IPA (downlink is with respect to the WWAN air interface) 1476 * - Units: milliseconds 1477 * - Maximum value: 255 1478 */ 1479 1480 /* Optional */ 1481 /* Downlink Accumulation Packet limit */ 1482 uint8_t dl_accumulation_pkt_limit_valid; 1483 /* Must be set to true if dl_accumulation_pkt_limit is being passed */ 1484 uint32_t dl_accumulation_pkt_limit; 1485 /* Informs the remote driver about the number of packets 1486 * that are to be accumulated in the downlink direction before it is 1487 * pushed into the IPA - Maximum value: 1023 1488 */ 1489 1490 /* Optional */ 1491 /* Downlink Accumulation Byte Limit */ 1492 uint8_t dl_accumulation_byte_limit_valid; 1493 /* Must be set to true if dl_accumulation_byte_limit is being passed */ 1494 uint32_t dl_accumulation_byte_limit; 1495 /* Inform the remote driver about the number of bytes 1496 * that are to be accumulated in the downlink direction before it 1497 * is pushed into the IPA - Maximum value: TBD 1498 */ 1499 1500 /* Optional */ 1501 /* Uplink Accumulation Time Limit */ 1502 uint8_t ul_accumulation_time_limit_valid; 1503 /* Must be set to true if ul_accumulation_time_limit is being passed */ 1504 uint32_t ul_accumulation_time_limit; 1505 /* Inform thes remote driver about the time for which data 1506 * is to be accumulated in the uplink direction before it is pushed into 1507 * the IPA (downlink is with respect to the WWAN air interface). 1508 * - Units: milliseconds 1509 * - Maximum value: 255 1510 */ 1511 1512 /* Optional */ 1513 /* HW Control Flags */ 1514 uint8_t hw_control_flags_valid; 1515 /* Must be set to true if hw_control_flags is being passed */ 1516 uint32_t hw_control_flags; 1517 /* Informs the remote driver about the hardware control flags: 1518 * - Bit 0: IPA_HW_FLAG_HALT_SYSTEM_ON_NON_TERMINAL_FAILURE -- 1519 * Indicates to the hardware that it must not continue with 1520 * any subsequent operation even if the failure is not terminal 1521 * - Bit 1: IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_ERORR -- 1522 * Indicates to the hardware that it is not required to report 1523 * channel errors to the host. 1524 * - Bit 2: IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_WAKE_UP -- 1525 * Indicates to the hardware that it is not required to generate 1526 * wake-up events to the host. 1527 * - Bit 4: IPA_HW_FLAG_WORK_OVER_DDR -- 1528 * Indicates to the hardware that it is accessing addresses in 1529 * the DDR and not over PCIe 1530 * - Bit 5: IPA_HW_FLAG_INTERRUPT_MODE_CTRL_FLAG -- 1531 * Indicates whether the device must 1532 * raise an event to let the host know that it is going into an 1533 * interrupt mode (no longer polling for data/buffer availability) 1534 */ 1535 1536 /* Optional */ 1537 /* Uplink MSI Event Threshold */ 1538 uint8_t ul_msi_event_threshold_valid; 1539 /* Must be set to true if ul_msi_event_threshold is being passed */ 1540 uint32_t ul_msi_event_threshold; 1541 /* Informs the remote driver about the threshold that will 1542 * cause an interrupt (MSI) to be fired to the host. This ensures 1543 * that the remote driver does not accumulate an excesive number of 1544 * events before firing an interrupt. 1545 * This threshold is applicable for data moved in the UL direction. 1546 * - Maximum value: 65535 1547 */ 1548 1549 /* Optional */ 1550 /* Downlink MSI Event Threshold */ 1551 uint8_t dl_msi_event_threshold_valid; 1552 /* Must be set to true if dl_msi_event_threshold is being passed */ 1553 uint32_t dl_msi_event_threshold; 1554 /* Informs the remote driver about the threshold that will 1555 * cause an interrupt (MSI) to be fired to the host. This ensures 1556 * that the remote driver does not accumulate an excesive number of 1557 * events before firing an interrupt 1558 * This threshold is applicable for data that is moved in the 1559 * DL direction - Maximum value: 65535 1560 */ 1561 1562 /* Optional */ 1563 /* Uplink Fifo Size */ 1564 uint8_t ul_fifo_size_valid; 1565 /* Must be set to true if ul_fifo_size is being passed */ 1566 uint32_t ul_fifo_size; 1567 /* 1568 * Informs the remote driver about the total Uplink xDCI 1569 * buffer size that holds the complete aggregated frame 1570 * or BAM data fifo size of the peripheral channel/pipe(in Bytes). 1571 * This deprecates the max_aggr_frame_size field. This TLV 1572 * deprecates max_aggr_frame_size TLV from version 1.9 onwards 1573 * and the max_aggr_frame_size TLV will be ignored in the presence 1574 * of this TLV. 1575 */ 1576 1577 /* Optional */ 1578 /* Downlink Fifo Size */ 1579 uint8_t dl_fifo_size_valid; 1580 /* Must be set to true if dl_fifo_size is being passed */ 1581 uint32_t dl_fifo_size; 1582 /* 1583 * Informs the remote driver about the total Downlink xDCI buffering 1584 * capacity or BAM data fifo size of the peripheral channel/pipe. 1585 * (In Bytes). dl_fifo_size = n * dl_buf_size. This deprecates the 1586 * max_aggr_frame_size field. If this value is set 1587 * max_aggr_frame_size is ignored. 1588 */ 1589 1590 /* Optional */ 1591 /* Downlink Buffer Size */ 1592 uint8_t dl_buf_size_valid; 1593 /* Must be set to true if dl_buf_size is being passed */ 1594 uint32_t dl_buf_size; 1595 /* Informs the remote driver about the single xDCI buffer size. 1596 * This is applicable only in GSI mode(in Bytes).\n 1597 */ 1598 }; /* Message */ 1599 1600 /* Response Message; Notifies the remote driver of the configuration 1601 * information 1602 */ 1603 struct ipa_config_resp_msg_v01 { 1604 /* Mandatory */ 1605 /* Result Code */ 1606 struct ipa_qmi_response_type_v01 resp; 1607 /**< Standard response type.*/ 1608 }; /* Message */ 1609 1610 enum ipa_stats_type_enum_v01 { 1611 IPA_STATS_TYPE_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 1612 /* To force a 32 bit signed enum. Do not change or use */ 1613 QMI_IPA_STATS_TYPE_INVALID_V01 = 0, 1614 /* Invalid stats type identifier */ 1615 QMI_IPA_STATS_TYPE_PIPE_V01 = 1, 1616 /* Pipe stats type */ 1617 QMI_IPA_STATS_TYPE_FILTER_RULES_V01 = 2, 1618 /* Filter rule stats type */ 1619 IPA_STATS_TYPE_ENUM_MAX_ENUM_VAL_V01 = 2147483647 1620 /* To force a 32 bit signed enum. Do not change or use */ 1621 }; 1622 1623 struct ipa_pipe_stats_info_type_v01 { 1624 uint32_t pipe_index; 1625 /* Pipe index for statistics to be retrieved. */ 1626 1627 uint64_t num_ipv4_packets; 1628 /* Accumulated number of IPv4 packets over this pipe. */ 1629 1630 uint64_t num_ipv4_bytes; 1631 /* Accumulated number of IPv4 bytes over this pipe. */ 1632 1633 uint64_t num_ipv6_packets; 1634 /* Accumulated number of IPv6 packets over this pipe. */ 1635 1636 uint64_t num_ipv6_bytes; 1637 /* Accumulated number of IPv6 bytes over this pipe. */ 1638 }; 1639 1640 struct ipa_stats_type_filter_rule_v01 { 1641 uint32_t filter_rule_index; 1642 /* Filter rule index for statistics to be retrieved. */ 1643 1644 uint64_t num_packets; 1645 /* Accumulated number of packets over this filter rule. */ 1646 }; 1647 1648 /* Request Message; Retrieve the data statistics collected on modem 1649 * IPA driver. 1650 */ 1651 struct ipa_get_data_stats_req_msg_v01 { 1652 /* Mandatory */ 1653 /* Stats Type */ 1654 enum ipa_stats_type_enum_v01 ipa_stats_type; 1655 /* Indicates the type of statistics to be retrieved. */ 1656 1657 /* Optional */ 1658 /* Reset Statistics */ 1659 uint8_t reset_stats_valid; 1660 /* Must be set to true if reset_stats is being passed */ 1661 uint8_t reset_stats; 1662 /* Option to reset the specific type of data statistics 1663 * currently collected. 1664 */ 1665 }; /* Message */ 1666 1667 /* Response Message; Retrieve the data statistics collected 1668 * on modem IPA driver. 1669 */ 1670 struct ipa_get_data_stats_resp_msg_v01 { 1671 /* Mandatory */ 1672 /* Result Code */ 1673 struct ipa_qmi_response_type_v01 resp; 1674 /* Standard response type. */ 1675 1676 /* Optional */ 1677 /* Stats Type */ 1678 uint8_t ipa_stats_type_valid; 1679 /* Must be set to true if ipa_stats_type is passed */ 1680 enum ipa_stats_type_enum_v01 ipa_stats_type; 1681 /* Indicates the type of statistics that are retrieved. */ 1682 1683 /* Optional */ 1684 /* Uplink Source Pipe Statistics List */ 1685 uint8_t ul_src_pipe_stats_list_valid; 1686 /* Must be set to true if ul_src_pipe_stats_list is being passed */ 1687 uint32_t ul_src_pipe_stats_list_len; 1688 /* Must be set to # of elements in ul_src_pipe_stats_list */ 1689 struct ipa_pipe_stats_info_type_v01 1690 ul_src_pipe_stats_list[QMI_IPA_MAX_PIPES_V01]; 1691 /* List of all Uplink pipe statistics that are retrieved. */ 1692 1693 /* Optional */ 1694 /* Downlink Destination Pipe Statistics List */ 1695 uint8_t dl_dst_pipe_stats_list_valid; 1696 /* Must be set to true if dl_dst_pipe_stats_list is being passed */ 1697 uint32_t dl_dst_pipe_stats_list_len; 1698 /* Must be set to # of elements in dl_dst_pipe_stats_list */ 1699 struct ipa_pipe_stats_info_type_v01 1700 dl_dst_pipe_stats_list[QMI_IPA_MAX_PIPES_V01]; 1701 /* List of all Downlink pipe statistics that are retrieved. */ 1702 1703 /* Optional */ 1704 /* Downlink Filter Rule Stats List */ 1705 uint8_t dl_filter_rule_stats_list_valid; 1706 /* Must be set to true if dl_filter_rule_stats_list is being passed */ 1707 uint32_t dl_filter_rule_stats_list_len; 1708 /* Must be set to # of elements in dl_filter_rule_stats_list */ 1709 struct ipa_stats_type_filter_rule_v01 1710 dl_filter_rule_stats_list[QMI_IPA_MAX_FILTERS_V01]; 1711 /* List of all Downlink filter rule statistics retrieved. */ 1712 }; /* Message */ 1713 1714 struct ipa_apn_data_stats_info_type_v01 { 1715 uint32_t mux_id; 1716 /* Indicates the MUX ID associated with the APN for which the data 1717 * usage statistics is queried 1718 */ 1719 1720 uint64_t num_ul_packets; 1721 /* Accumulated number of uplink packets corresponding to 1722 * this Mux ID 1723 */ 1724 1725 uint64_t num_ul_bytes; 1726 /* Accumulated number of uplink bytes corresponding to 1727 * this Mux ID 1728 */ 1729 1730 uint64_t num_dl_packets; 1731 /* Accumulated number of downlink packets corresponding 1732 * to this Mux ID 1733 */ 1734 1735 uint64_t num_dl_bytes; 1736 /* Accumulated number of downlink bytes corresponding to 1737 * this Mux ID 1738 */ 1739 }; /* Type */ 1740 1741 /* Request Message; Retrieve the APN data statistics collected from modem */ 1742 struct ipa_get_apn_data_stats_req_msg_v01 { 1743 /* Optional */ 1744 /* Mux ID List */ 1745 uint8_t mux_id_list_valid; 1746 /* Must be set to true if mux_id_list is being passed */ 1747 uint32_t mux_id_list_len; 1748 /* Must be set to # of elements in mux_id_list */ 1749 uint32_t mux_id_list[QMI_IPA_MAX_APN_V01]; 1750 /* The list of MUX IDs associated with APNs for which the data usage 1751 * statistics is being retrieved 1752 */ 1753 }; /* Message */ 1754 1755 /* Response Message; Retrieve the APN data statistics collected from modem */ 1756 struct ipa_get_apn_data_stats_resp_msg_v01 { 1757 /* Mandatory */ 1758 /* Result Code */ 1759 struct ipa_qmi_response_type_v01 resp; 1760 /* Standard response type.*/ 1761 1762 /* Optional */ 1763 /* APN Data Statistics List */ 1764 uint8_t apn_data_stats_list_valid; 1765 /* Must be set to true if apn_data_stats_list is being passed */ 1766 uint32_t apn_data_stats_list_len; 1767 /* Must be set to # of elements in apn_data_stats_list */ 1768 struct ipa_apn_data_stats_info_type_v01 1769 apn_data_stats_list[QMI_IPA_MAX_APN_V01]; 1770 /* List of APN data retrieved as per request on mux_id. 1771 * For now, only one APN monitoring is supported on modem driver. 1772 * Making this as list for expandability to support more APNs in future. 1773 */ 1774 }; /* Message */ 1775 1776 struct ipa_data_usage_quota_info_type_v01 { 1777 uint32_t mux_id; 1778 /* Indicates the MUX ID associated with the APN for which the data usage 1779 * quota needs to be set 1780 */ 1781 1782 uint64_t num_Mbytes; 1783 /* Number of Mega-bytes of quota value to be set on this APN associated 1784 * with this Mux ID. 1785 */ 1786 }; /* Type */ 1787 1788 /* Request Message; Master driver sets a data usage quota value on 1789 * modem driver 1790 */ 1791 struct ipa_set_data_usage_quota_req_msg_v01 { 1792 /* Optional */ 1793 /* APN Quota List */ 1794 uint8_t apn_quota_list_valid; 1795 /* Must be set to true if apn_quota_list is being passed */ 1796 uint32_t apn_quota_list_len; 1797 /* Must be set to # of elements in apn_quota_list */ 1798 struct ipa_data_usage_quota_info_type_v01 1799 apn_quota_list[QMI_IPA_MAX_APN_V01]; 1800 /* The list of APNs on which a data usage quota to be set on modem 1801 * driver. For now, only one APN monitoring is supported on modem 1802 * driver. Making this as list for expandability to support more 1803 * APNs in future. 1804 */ 1805 }; /* Message */ 1806 1807 /* Response Message; Master driver sets a data usage on modem driver. */ 1808 struct ipa_set_data_usage_quota_resp_msg_v01 { 1809 /* Mandatory */ 1810 /* Result Code */ 1811 struct ipa_qmi_response_type_v01 resp; 1812 /* Standard response type.*/ 1813 }; /* Message */ 1814 1815 /* Indication Message; Modem driver sends this indication to master 1816 * driver when the data usage quota is reached 1817 */ 1818 struct ipa_data_usage_quota_reached_ind_msg_v01 { 1819 /* Mandatory */ 1820 /* APN Quota List */ 1821 struct ipa_data_usage_quota_info_type_v01 apn; 1822 /* This message indicates which APN has the previously set quota 1823 * reached. For now, only one APN monitoring is supported on modem 1824 * driver. 1825 */ 1826 }; /* Message */ 1827 1828 /* Request Message; Master driver request modem driver to terminate 1829 * the current data usage quota monitoring session. 1830 */ 1831 struct ipa_stop_data_usage_quota_req_msg_v01 { 1832 /* This element is a placeholder to prevent the declaration of 1833 * an empty struct. DO NOT USE THIS FIELD UNDER ANY CIRCUMSTANCE 1834 */ 1835 char __placeholder; 1836 }; /* Message */ 1837 1838 /* Response Message; Master driver request modem driver to terminate 1839 * the current quota monitoring session. 1840 */ 1841 struct ipa_stop_data_usage_quota_resp_msg_v01 { 1842 /* Mandatory */ 1843 /* Result Code */ 1844 struct ipa_qmi_response_type_v01 resp; 1845 /**< Standard response type.*/ 1846 }; /* Message */ 1847 1848 /* Request Message; Request from Modem IPA driver to set DPL peripheral pipe */ 1849 struct ipa_install_fltr_rule_req_ex_msg_v01 { 1850 1851 /* Optional */ 1852 /* Extended Filter Specification */ 1853 uint8_t filter_spec_ex_list_valid; 1854 uint32_t filter_spec_ex_list_len; 1855 struct ipa_filter_spec_ex_type_v01 1856 filter_spec_ex_list[QMI_IPA_MAX_FILTERS_EX_V01]; 1857 /* List of filter specifications of filters that must be installed in 1858 * the IPAv3.x hardware. 1859 * The driver installing these rules must do so in the same order as 1860 * specified in this list. 1861 */ 1862 1863 /* Optional */ 1864 /* Pipe Index to Install Rule */ 1865 uint8_t source_pipe_index_valid; 1866 uint32_t source_pipe_index; 1867 /* Pipe index to install the filter rule. 1868 * The requester may not always know the pipe indices. If not specified, 1869 * the receiver must install this rule on all pipes that it controls, 1870 * through which data may be fed into the IPA. 1871 */ 1872 1873 /* Optional */ 1874 /* Total Number of IPv4 Filters in the Filter Spec List */ 1875 uint8_t num_ipv4_filters_valid; 1876 uint32_t num_ipv4_filters; 1877 /* Number of IPv4 rules included in the filter specification list. */ 1878 1879 /* Optional */ 1880 /* Total Number of IPv6 Filters in the Filter Spec List */ 1881 uint8_t num_ipv6_filters_valid; 1882 uint32_t num_ipv6_filters; 1883 /* Number of IPv6 rules included in the filter specification list. */ 1884 1885 /* Optional */ 1886 /* List of XLAT Filter Indices in the Filter Spec List */ 1887 uint8_t xlat_filter_indices_list_valid; 1888 uint32_t xlat_filter_indices_list_len; 1889 uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_EX_V01]; 1890 /* List of XLAT filter indices. 1891 * Filter rules at specified indices must be modified by the 1892 * receiver if the PDN is XLAT before installing them on the associated 1893 * IPA consumer pipe. 1894 */ 1895 1896 /* Optional */ 1897 /* Extended Type 2 Filter Specification */ 1898 uint8_t filter_spec_ex2_list_valid; 1899 /* Must be set to true if filter_spec_ex2_list is being passed */ 1900 uint32_t filter_spec_ex2_list_len; 1901 /* Must be set to # of elements in filter_spec_ex2_list */ 1902 struct ipa_filter_spec_ex2_type_v01 1903 filter_spec_ex2_list[QMI_IPA_MAX_FILTERS_V01]; 1904 /* Optional */ 1905 /* List of modem UL Filters in the Spec List which need be to 1906 * replicated with AP UL firewall filters 1907 */ 1908 uint8_t ul_firewall_indices_list_valid; 1909 /* Must be set to # of elements in ul_firewall_indices_list */ 1910 uint32_t ul_firewall_indices_list_len; 1911 uint32_t ul_firewall_indices_list[QMI_IPA_MAX_FILTERS_V01]; 1912 /* List of UL firewall filter indices. 1913 * Filter rules at specified indices must be replicated across 1914 * the firewall filters by the receiver and installed on the 1915 * associated IPA consumer pipe. 1916 */ 1917 }; /* Message */ 1918 1919 /* Response Message; Requests installation of filtering rules in the hardware 1920 * block on the remote side. 1921 */ 1922 struct ipa_install_fltr_rule_resp_ex_msg_v01 { 1923 /* Mandatory */ 1924 /* Result Code */ 1925 struct ipa_qmi_response_type_v01 resp; 1926 /* Standard response type. 1927 * Standard response type. Contains the following data members: 1928 * - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 1929 * - qmi_error_type -- Error code. Possible error code values are 1930 * described in the error codes 1931 * section of each message 1932 * definition. 1933 */ 1934 1935 /* Optional */ 1936 /* Rule ID List */ 1937 uint8_t rule_id_valid; 1938 uint32_t rule_id_len; 1939 uint32_t rule_id[QMI_IPA_MAX_FILTERS_EX_V01]; 1940 /* List of rule IDs returned to the control point. 1941 * Any further reference to the rule is done using the filter rule ID 1942 * specified in this list. 1943 */ 1944 }; /* Message */ 1945 1946 /* 1947 * Request Message; Requests the modem IPA driver to enable or 1948 * disable collection of per client statistics. 1949 */ 1950 struct ipa_enable_per_client_stats_req_msg_v01 { 1951 1952 /* Mandatory */ 1953 /* Collect statistics per client; */ 1954 uint8_t enable_per_client_stats; 1955 /* 1956 * Indicates whether to start or stop collecting 1957 * per client statistics. 1958 */ 1959 }; /* Message */ 1960 1961 /* 1962 * Response Message; Requests the modem IPA driver to enable or disable 1963 * collection of per client statistics. 1964 */ 1965 struct ipa_enable_per_client_stats_resp_msg_v01 { 1966 1967 /* Mandatory */ 1968 /* Result Code */ 1969 struct ipa_qmi_response_type_v01 resp; 1970 /* Standard response type. */ 1971 }; /* Message */ 1972 1973 struct ipa_per_client_stats_info_type_v01 { 1974 1975 uint32_t client_id; 1976 /* 1977 * Id of the client on APPS processor side for which Modem processor 1978 * needs to send uplink/downlink statistics. 1979 */ 1980 1981 uint32_t src_pipe_id; 1982 /* 1983 * IPA consumer pipe on which client on APPS side sent uplink 1984 * data to modem. 1985 */ 1986 1987 uint64_t num_ul_ipv4_bytes; 1988 /* 1989 * Accumulated number of uplink IPv4 bytes for a client. 1990 */ 1991 1992 uint64_t num_ul_ipv6_bytes; 1993 /* 1994 * Accumulated number of uplink IPv6 bytes for a client. 1995 */ 1996 1997 uint64_t num_dl_ipv4_bytes; 1998 /* 1999 * Accumulated number of downlink IPv4 bytes for a client. 2000 */ 2001 2002 uint64_t num_dl_ipv6_bytes; 2003 /* 2004 * Accumulated number of downlink IPv6 byes for a client. 2005 */ 2006 2007 2008 uint32_t num_ul_ipv4_pkts; 2009 /* 2010 * Accumulated number of uplink IPv4 packets for a client. 2011 */ 2012 2013 uint32_t num_ul_ipv6_pkts; 2014 /* 2015 * Accumulated number of uplink IPv6 packets for a client. 2016 */ 2017 2018 uint32_t num_dl_ipv4_pkts; 2019 /* 2020 * Accumulated number of downlink IPv4 packets for a client. 2021 */ 2022 2023 uint32_t num_dl_ipv6_pkts; 2024 /* 2025 * Accumulated number of downlink IPv6 packets for a client. 2026 */ 2027 }; /* Type */ 2028 2029 /* 2030 * Request Message; Requests the modem IPA driver to provide statistics 2031 * for a givenclient. 2032 */ 2033 struct ipa_get_stats_per_client_req_msg_v01 { 2034 2035 /* Mandatory */ 2036 /* Client id */ 2037 uint32_t client_id; 2038 /* 2039 * Id of the client on APPS processor side for which Modem processor 2040 * needs to send uplink/downlink statistics. if client id is specified 2041 * as 0xffffffff, then Q6 will send the stats for all the clients of 2042 * the specified source pipe. 2043 */ 2044 2045 /* Mandatory */ 2046 /* Source pipe id */ 2047 uint32_t src_pipe_id; 2048 /* 2049 * IPA consumer pipe on which client on APPS side sent uplink 2050 * data to modem. In future, this implementation can be extended 2051 * to provide 0xffffffff as the source pipe id, where Q6 will send 2052 * the stats of all the clients across all different tethered-pipes. 2053 */ 2054 2055 /* Optional */ 2056 /* Reset client statistics. */ 2057 uint8_t reset_stats_valid; 2058 /* Must be set to true if reset_stats is being passed. */ 2059 uint8_t reset_stats; 2060 /* 2061 * Option to reset the statistics currently collected by modem for this 2062 * particular client. 2063 */ 2064 }; /* Message */ 2065 2066 /* 2067 * Response Message; Requests the modem IPA driver to provide statistics 2068 * for a given client. 2069 */ 2070 struct ipa_get_stats_per_client_resp_msg_v01 { 2071 2072 /* Mandatory */ 2073 /* Result Code */ 2074 struct ipa_qmi_response_type_v01 resp; 2075 /* Standard response type. */ 2076 2077 /* Optional */ 2078 /* Per clients Statistics List */ 2079 uint8_t per_client_stats_list_valid; 2080 /* Must be set to true if per_client_stats_list is being passed. */ 2081 uint32_t per_client_stats_list_len; 2082 /* Must be set to # of elements in per_client_stats_list. */ 2083 struct ipa_per_client_stats_info_type_v01 2084 per_client_stats_list[QMI_IPA_MAX_PER_CLIENTS_V01]; 2085 /* 2086 * List of all per client statistics that are retrieved. 2087 */ 2088 }; /* Message */ 2089 2090 struct ipa_ul_firewall_rule_type_v01 { 2091 2092 enum ipa_ip_type_enum_v01 ip_type; 2093 /* 2094 * IP type for which this rule is applicable. 2095 * The driver must identify the filter table (v6 or v4), and this 2096 * field is essential for that. Values: 2097 * - QMI_IPA_IP_TYPE_INVALID (0) -- Invalid IP type identifier 2098 * - QMI_IPA_IP_TYPE_V4 (1) -- IPv4 type 2099 * - QMI_IPA_IP_TYPE_V6 (2) -- IPv6 type 2100 */ 2101 2102 struct ipa_filter_rule_type_v01 filter_rule; 2103 /* 2104 * Rules in the filter specification. These rules are the 2105 * ones that are matched against fields in the packet. 2106 * Currently we only send IPv6 whitelist rules to Q6. 2107 */ 2108 }; /* Type */ 2109 2110 /* 2111 * Request Message; Requestes remote IPA driver to install uplink 2112 * firewall rules. 2113 */ 2114 struct ipa_configure_ul_firewall_rules_req_msg_v01 { 2115 2116 /* Optional */ 2117 /* Uplink Firewall Specification */ 2118 uint32_t firewall_rules_list_len; 2119 /* Must be set to # of elements in firewall_rules_list. */ 2120 struct ipa_ul_firewall_rule_type_v01 2121 firewall_rules_list[QMI_IPA_MAX_UL_FIREWALL_RULES_V01]; 2122 /* 2123 * List of uplink firewall specifications of filters that must be 2124 * installed. 2125 */ 2126 2127 uint32_t mux_id; 2128 /* 2129 * QMAP Mux ID. As a part of the QMAP protocol, 2130 * several data calls may be multiplexed over the same physical 2131 * transport channel. This identifier is used to identify one 2132 * such data call. The maximum value for this identifier is 255. 2133 */ 2134 2135 /* Optional */ 2136 uint8_t disable_valid; 2137 /* Must be set to true if enable is being passed. */ 2138 uint8_t disable; 2139 /* 2140 * Indicates whether uplink firewall needs to be enabled or disabled. 2141 */ 2142 2143 /* Optional */ 2144 uint8_t are_blacklist_filters_valid; 2145 /* Must be set to true if are_blacklist_filters is being passed. */ 2146 uint8_t are_blacklist_filters; 2147 /* 2148 * Indicates whether the filters received as part of this message are 2149 * blacklist filters. i.e. drop uplink packets matching these rules. 2150 */ 2151 }; /* Message */ 2152 2153 /* 2154 * Response Message; Requestes remote IPA driver to install 2155 * uplink firewall rules. 2156 */ 2157 struct ipa_configure_ul_firewall_rules_resp_msg_v01 { 2158 2159 /* Mandatory */ 2160 /* Result Code */ 2161 struct ipa_qmi_response_type_v01 resp; 2162 /* 2163 * Standard response type. 2164 * Standard response type. Contains the following data members: 2165 * qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 2166 * qmi_error_type -- Error code. Possible error code values are 2167 * described in the error codes section of each message definition. 2168 */ 2169 }; /* Message */ 2170 2171 enum ipa_ul_firewall_status_enum_v01 { 2172 IPA_UL_FIREWALL_STATUS_ENUM_MIN_ENUM_VAL_V01 = -2147483647, 2173 /* To force a 32 bit signed enum. Do not change or use*/ 2174 QMI_IPA_UL_FIREWALL_STATUS_SUCCESS_V01 = 0, 2175 /* Indicates that the uplink firewall rules 2176 * are configured successfully. 2177 */ 2178 QMI_IPA_UL_FIREWALL_STATUS_FAILURE_V01 = 1, 2179 /* Indicates that the uplink firewall rules 2180 * are not configured successfully. 2181 */ 2182 IPA_UL_FIREWALL_STATUS_ENUM_MAX_ENUM_VAL_V01 = 2147483647 2183 /* To force a 32 bit signed enum. Do not change or use*/ 2184 }; 2185 2186 struct ipa_ul_firewall_config_result_type_v01 { 2187 2188 enum ipa_ul_firewall_status_enum_v01 is_success; 2189 /* 2190 * Indicates whether the uplink firewall rules are configured 2191 * successfully. 2192 */ 2193 2194 uint32_t mux_id; 2195 /* 2196 * QMAP Mux ID. As a part of the QMAP protocol, 2197 * several data calls may be multiplexed over the same physical 2198 * transport channel. This identifier is used to identify one 2199 * such data call. The maximum value for this identifier is 255. 2200 */ 2201 }; 2202 2203 /* 2204 * Indication Message; Requestes remote IPA driver to install 2205 * uplink firewall rules. 2206 */ 2207 struct ipa_configure_ul_firewall_rules_ind_msg_v01 { 2208 struct ipa_ul_firewall_config_result_type_v01 result; 2209 }; /* Message */ 2210 2211 2212 struct ipa_mhi_ch_init_info_type_v01 { 2213 uint8_t ch_id; 2214 /* Remote MHI channel ID */ 2215 2216 uint8_t er_id; 2217 /* Remote MHI Event ring ID */ 2218 2219 uint32_t ch_doorbell_addr; 2220 /* TR Channel Doorbell addr */ 2221 2222 uint32_t er_doorbell_addr; 2223 /* Event ring Doorbell addr */ 2224 2225 uint32_t direction_type; 2226 /* Direction type */ 2227 }; 2228 2229 struct ipa_mhi_smmu_info_type_v01 { 2230 uint64_t iova_ctl_base_addr; 2231 /* IOVA mapped Control Region base address */ 2232 2233 uint64_t iova_ctl_size; 2234 /* IOVA Control region size */ 2235 2236 uint64_t iova_data_base_addr; 2237 /* IOVA mapped Data Region base address */ 2238 2239 uint64_t iova_data_size; 2240 /* IOVA Data Region size */ 2241 }; 2242 2243 struct ipa_mhi_ready_indication_msg_v01 { 2244 /* Mandatory */ 2245 uint32_t ch_info_arr_len; 2246 /* Must be set to # of elements in ch_info_arr. */ 2247 struct ipa_mhi_ch_init_info_type_v01 2248 ch_info_arr[QMI_IPA_REMOTE_MHI_CHANNELS_NUM_MAX_V01]; 2249 /* Channel Information array */ 2250 2251 /* Mandatory */ 2252 uint8_t smmu_info_valid; 2253 /* Must be set to true if smmu_info is being passed. */ 2254 struct ipa_mhi_smmu_info_type_v01 smmu_info; 2255 /* SMMU enabled indication */ 2256 }; 2257 #define IPA_MHI_READY_INDICATION_MSG_V01_MAX_MSG_LEN 123 2258 2259 struct ipa_mhi_mem_addr_info_type_v01 { 2260 uint64_t pa; 2261 /* Memory region start physical addr */ 2262 2263 uint64_t iova; 2264 /* Memory region start iova mapped addr */ 2265 2266 uint64_t size; 2267 /* Memory region size */ 2268 }; 2269 2270 enum ipa_mhi_brst_mode_enum_v01 { 2271 IPA_MHI_BRST_MODE_ENUM_MIN_VAL_V01 = IPA_INT_MIN, 2272 2273 QMI_IPA_BURST_MODE_DEFAULT_V01 = 0, 2274 /* 2275 * Default - burst mode enabled for hardware channels, 2276 * disabled for software channels 2277 */ 2278 2279 QMI_IPA_BURST_MODE_ENABLED_V01 = 1, 2280 /* Burst mode is enabled for this channel */ 2281 2282 QMI_IPA_BURST_MODE_DISABLED_V01 = 2, 2283 /* Burst mode is disabled for this channel */ 2284 2285 IPA_MHI_BRST_MODE_ENUM_MAX_VAL_V01 = IPA_INT_MAX, 2286 }; 2287 2288 struct ipa_mhi_tr_info_type_v01 { 2289 uint8_t ch_id; 2290 /* TR Channel ID */ 2291 2292 uint16_t poll_cfg; 2293 /* 2294 * Poll Configuration - Default or timer to poll the 2295 * MHI context in milliseconds 2296 */ 2297 2298 enum ipa_mhi_brst_mode_enum_v01 brst_mode_type; 2299 /* Burst mode configuration */ 2300 2301 uint64_t ring_iova; 2302 /* IOVA mapped ring base address */ 2303 2304 uint64_t ring_len; 2305 /* Ring Length in bytes */ 2306 2307 uint64_t rp; 2308 /* IOVA mapped Read pointer address */ 2309 2310 uint64_t wp; 2311 /* IOVA mapped write pointer address */ 2312 }; 2313 2314 struct ipa_mhi_er_info_type_v01 { 2315 uint8_t er_id; 2316 /* Event ring ID */ 2317 2318 uint32_t intmod_cycles; 2319 /* Interrupt moderation cycles */ 2320 2321 uint32_t intmod_count; 2322 /* Interrupt moderation count */ 2323 2324 uint32_t msi_addr; 2325 /* IOVA mapped MSI address for this ER */ 2326 2327 uint64_t ring_iova; 2328 /* IOVA mapped ring base address */ 2329 2330 uint64_t ring_len; 2331 /* Ring length in bytes */ 2332 2333 uint64_t rp; 2334 /* IOVA mapped Read pointer address */ 2335 2336 uint64_t wp; 2337 /* IOVA mapped Write pointer address */ 2338 }; 2339 2340 struct ipa_mhi_alloc_channel_req_msg_v01 { 2341 /* Mandatory */ 2342 uint32_t tr_info_arr_len; 2343 /* Must be set to # of elements in tr_info_arr. */ 2344 struct ipa_mhi_tr_info_type_v01 2345 tr_info_arr[QMI_IPA_REMOTE_MHI_CHANNELS_NUM_MAX_V01]; 2346 /* Array of TR context information for Remote MHI channels */ 2347 2348 /* Mandatory */ 2349 uint32_t er_info_arr_len; 2350 /* Must be set to # of elements in er_info_arr. */ 2351 struct ipa_mhi_er_info_type_v01 2352 er_info_arr[QMI_IPA_REMOTE_MHI_CHANNELS_NUM_MAX_V01]; 2353 /* Array of ER context information for Remote MHI channels */ 2354 2355 /* Mandatory */ 2356 uint32_t ctrl_addr_map_info_len; 2357 /* Must be set to # of elements in ctrl_addr_map_info. */ 2358 2359 struct ipa_mhi_mem_addr_info_type_v01 2360 ctrl_addr_map_info[QMI_IPA_REMOTE_MHI_MEMORY_MAPPING_NUM_MAX_V01]; 2361 /* 2362 * List of PA-IOVA address mappings for control regions 2363 * used by Modem 2364 */ 2365 2366 /* Mandatory */ 2367 uint32_t data_addr_map_info_len; 2368 /* Must be set to # of elements in data_addr_map_info. */ 2369 struct ipa_mhi_mem_addr_info_type_v01 2370 data_addr_map_info[QMI_IPA_REMOTE_MHI_MEMORY_MAPPING_NUM_MAX_V01]; 2371 /* List of PA-IOVA address mappings for data regions used by Modem */ 2372 }; 2373 #define IPA_MHI_ALLOC_CHANNEL_REQ_MSG_V01_MAX_MSG_LEN 808 2374 2375 struct ipa_mhi_ch_alloc_resp_type_v01 { 2376 uint8_t ch_id; 2377 /* Remote MHI channel ID */ 2378 2379 uint8_t is_success; 2380 /* Channel Allocation Status */ 2381 }; 2382 2383 struct ipa_mhi_alloc_channel_resp_msg_v01 { 2384 /* Mandatory */ 2385 struct ipa_qmi_response_type_v01 resp; 2386 /* Standard response type. Contains the following data members: 2387 * - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 2388 * - qmi_error_type -- Error code. Possible error code values 2389 * are described in the error codes section 2390 * of each message definition. 2391 */ 2392 2393 /* Optional */ 2394 uint8_t alloc_resp_arr_valid; 2395 /* Must be set to true if alloc_resp_arr is being passed. */ 2396 uint32_t alloc_resp_arr_len; 2397 /* Must be set to # of elements in alloc_resp_arr. */ 2398 struct ipa_mhi_ch_alloc_resp_type_v01 2399 alloc_resp_arr[QMI_IPA_REMOTE_MHI_CHANNELS_NUM_MAX_V01]; 2400 /* MHI channel allocation response array */ 2401 }; 2402 #define IPA_MHI_ALLOC_CHANNEL_RESP_MSG_V01_MAX_MSG_LEN 23 2403 2404 enum ipa_clock_rate_enum_v01 { 2405 IPA_CLOCK_RATE_ENUM_MIN_ENUM_VAL_V01 = IPA_INT_MIN, 2406 2407 QMI_IPA_CLOCK_RATE_INVALID_V01 = 0, 2408 2409 QMI_IPA_CLOCK_RATE_LOW_SVS_V01 = 1, 2410 2411 QMI_IPA_CLOCK_RATE_SVS_V01 = 2, 2412 2413 QMI_IPA_CLOCK_RATE_NOMINAL_V01 = 3, 2414 2415 QMI_IPA_CLOCK_RATE_TURBO_V01 = 4, 2416 2417 IPA_CLOCK_RATE_ENUM_MAX_ENUM_VAL_V01 = IPA_INT_MAX, 2418 }; 2419 2420 struct ipa_mhi_clk_vote_req_msg_v01 { 2421 /* Mandatory */ 2422 uint8_t mhi_vote; 2423 /* 2424 * MHI vote request 2425 * TRUE - ON 2426 * FALSE - OFF 2427 */ 2428 /* Optional */ 2429 /* Throughput Value */ 2430 uint8_t tput_value_valid; 2431 uint32_t tput_value; 2432 2433 /* Optional */ 2434 /* IPA Clock Rate */ 2435 uint8_t clk_rate_valid; 2436 enum ipa_clock_rate_enum_v01 clk_rate; 2437 }; 2438 #define IPA_MHI_CLK_VOTE_REQ_MSG_V01_MAX_MSG_LEN 18 2439 2440 struct ipa_mhi_clk_vote_resp_msg_v01 { 2441 /* Mandatory */ 2442 struct ipa_qmi_response_type_v01 resp; 2443 /* Standard response type. Contains the following data members: 2444 * - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 2445 * - qmi_error_type -- Error code. Possible error code values 2446 * are described in the error codes section 2447 * of each message definition. 2448 */ 2449 }; 2450 #define IPA_MHI_CLK_VOTE_RESP_MSG_V01_MAX_MSG_LEN 7 2451 2452 struct ipa_mhi_cleanup_req_msg_v01 { 2453 /* Optional */ 2454 uint8_t cleanup_valid; 2455 /* Must be set to true if cleanup is being passed. */ 2456 uint8_t cleanup; 2457 /* 2458 * a Flag to indicate the type of action 2459 * 1 - Cleanup Request 2460 */ 2461 }; 2462 #define IPA_MHI_CLEANUP_REQ_MSG_V01_MAX_MSG_LEN 4 2463 2464 struct ipa_mhi_cleanup_resp_msg_v01 { 2465 /* Mandatory */ 2466 struct ipa_qmi_response_type_v01 resp; 2467 /* Standard response type. Contains the following data members: 2468 * - qmi_result_type -- QMI_RESULT_SUCCESS or QMI_RESULT_FAILURE 2469 * - qmi_error_type -- Error code. Possible error code values 2470 * are described in the error codes section 2471 * of each message definition. 2472 */ 2473 }; 2474 #define IPA_MHI_CLEANUP_RESP_MSG_V01_MAX_MSG_LEN 7 2475 2476 enum ipa_ep_desc_type_enum_v01 { 2477 /* To force a 32 bit signed enum. Do not change or use*/ 2478 IPA_EP_DESC_TYPE_ENUM_MIN_VAL_V01 = IPA_INT_MIN, 2479 DATA_EP_DESC_TYPE_RESERVED_V01 = 0x00, 2480 DATA_EP_DESC_TYPE_EMB_CONS_V01 = 0x01, 2481 DATA_EP_DESC_TYPE_EMB_PROD_V01 = 0x02, 2482 DATA_EP_DESC_TYPE_RSC_PROD_V01 = 0x03, 2483 DATA_EP_DESC_TYPE_QDSS_PROD_V01 = 0x04, 2484 DATA_EP_DESC_TYPE_DPL_PROD_V01 = 0x05, 2485 DATA_EP_DESC_TYPE_TETH_CONS_V01 = 0x06, 2486 DATA_EP_DESC_TYPE_TETH_PROD_V01 = 0x07, 2487 DATA_EP_DESC_TYPE_TETH_RMNET_CONS_V01 = 0x08, 2488 DATA_EP_DESC_TYPE_TETH_RMNET_PROD_V01 = 0x09, 2489 IPA_EP_DESC_TYPE_ENUM_MAX_VAL_V01 = IPA_INT_MAX, 2490 }; 2491 2492 enum ipa_ic_type_enum_v01 { 2493 /* To force a 32 bit signed enum. Do not change or use*/ 2494 IPA_IC_TYPE_ENUM_MIN_VAL_V01 = IPA_INT_MIN, 2495 DATA_IC_TYPE_RESERVED_V01 = 0x00, 2496 DATA_IC_TYPE_MHI_V01 = 0x01, 2497 DATA_IC_TYPE_MHI_PRIME_V01 = 0x02, 2498 DATA_IC_TYPE_USB_V01 = 0x03, 2499 DATA_IC_TYPE_AP_V01 = 0x04, 2500 DATA_IC_TYPE_Q6_V01 = 0x05, 2501 DATA_IC_TYPE_UC_V01 = 0x06, 2502 IPA_IC_TYPE_ENUM_MAX_VAL_V01 = IPA_INT_MAX, 2503 }; 2504 2505 enum ipa_ep_status_type_v01 { 2506 /* To force a 32 bit signed enum. Do not change or use*/ 2507 IPA_EP_STATUS_TYPE_MIN_VAL_V01 = IPA_INT_MIN, 2508 DATA_EP_STATUS_RESERVED_V01 = 0x00, 2509 DATA_EP_STATUS_STATIC_V01 = 0x01, 2510 DATA_EP_STATUS_CONNECTED_V01 = 0x02, 2511 DATA_EP_STATUS_DISCONNECTED_V01 = 0x03, 2512 IPA_EP_STATUS_TYPE_MAX_VAL_V01 = IPA_INT_MAX, 2513 }; 2514 2515 struct ipa_ep_id_type_v01 { 2516 /* Interconnect type. See ipa_ic_desc_type_enum type */ 2517 enum ipa_ic_type_enum_v01 ic_type; 2518 /* Peripheral end point type */ 2519 enum ipa_ep_desc_type_enum_v01 ep_type; 2520 /* Peripheral interface number */ 2521 uint32_t ep_id; 2522 /* Status of endpoint */ 2523 enum ipa_ep_status_type_v01 ep_status; 2524 }; 2525 2526 struct ipa_endp_desc_indication_msg_v01 { 2527 /* Optional */ 2528 uint8_t ep_info_valid; 2529 /* Must be set to true if type_arr is being passed */ 2530 uint32_t ep_info_len; 2531 /* Must be set to # of elements in type_arr */ 2532 struct ipa_ep_id_type_v01 ep_info[QMI_IPA_ENDP_DESC_NUM_MAX_V01]; 2533 /* Optional */ 2534 uint8_t num_eps_valid; 2535 /* Must be set to true if num_of_eps is being passed */ 2536 /* Must be set to # of elements of num_of_eps */ 2537 uint32_t num_eps; 2538 }; /* Message */ 2539 #define IPA_ENDP_DESC_INDICATION_MSG_V01_MAX_MSG_LEN 507 2540 2541 enum ipa_aggr_enum_type_v01 { 2542 IPA_AGGR_ENUM_TYPE_MIN_VAL_V01 = IPA_INT_MIN, 2543 DATA_AGGR_TYPE_RESERVED_V01 = 0x00, 2544 DATA_AGGR_TYPE_QMAP_V01 = 0x01, 2545 DATA_AGGR_TYPE_QMAPv5_V01 = 0x02, 2546 DATA_AGGR_TYPE_INHERITED_V01 = 0x03, 2547 IPA_AGGR_ENUM_TYPE_MAX_VAL_V01 = IPA_INT_MAX, 2548 }; 2549 2550 struct ipa_mhi_prime_aggr_info_type_v01 { 2551 enum ipa_ic_type_enum_v01 ic_type; 2552 /* Peripheral end point type */ 2553 enum ipa_ep_desc_type_enum_v01 ep_type; 2554 /* Bytes count in KB */ 2555 uint32_t bytes_count; 2556 /* packet count */ 2557 uint32_t pkt_count; 2558 /* aggr_type */ 2559 enum ipa_aggr_enum_type_v01 aggr_type; 2560 }; /* Message */ 2561 #define IPA_MHI_PRIME_AGGR_INFO_REQ_MSG_V01_MAX_MSG_LEN 631 2562 2563 struct ipa_mhi_prime_aggr_info_req_msg_v01 { 2564 /* optional */ 2565 uint8_t aggr_info_valid; 2566 /* Aggregration info for MHI prime */ 2567 /* Must be set to true if aggr_info is being passed*/ 2568 uint32_t aggr_info_len; 2569 /* Must be set to # of elements in aggr_info */ 2570 struct ipa_mhi_prime_aggr_info_type_v01 2571 aggr_info[QMI_IPA_ENDP_DESC_NUM_MAX_V01]; 2572 /* optional */ 2573 /* Must be set to true if num_eps_valid is being passed*/ 2574 uint8_t num_eps_valid; 2575 /* Must be set to # of num_eps */ 2576 uint32_t num_eps; 2577 }; /* Message */ 2578 #define IPA_MHI_PRIME_AGGR_INFO_RESP_MSG_V01_MAX_MSG_LEN 7 2579 2580 struct ipa_mhi_prime_aggr_info_resp_msg_v01 { 2581 /* Result Code */ 2582 struct ipa_qmi_response_type_v01 resp; 2583 }; /* Message */ 2584 2585 struct ipa_add_offload_connection_req_msg_v01 { 2586 /* optional */ 2587 /* Must be set to true if num_ipv4_filters is being passed*/ 2588 uint8_t num_ipv4_filters_valid; 2589 /* Must be set to # of ipv4_filters*/ 2590 uint32_t num_ipv4_filters; 2591 /* optional */ 2592 /* Must be set to true if num_ipv6_filters is being passed*/ 2593 uint8_t num_ipv6_filters_valid; 2594 /* Must be set to # of ipv6_filters*/ 2595 uint32_t num_ipv6_filters; 2596 /* optional */ 2597 uint8_t xlat_filter_indices_list_valid; 2598 /* Must be set to true if xlat_filter_indices_list is being passed*/ 2599 uint32_t xlat_filter_indices_list_len; 2600 /* Must be set to # of xlat_filter_indices_list*/ 2601 uint32_t xlat_filter_indices_list[QMI_IPA_MAX_FILTERS_V01]; 2602 /* optional */ 2603 /* Must be set to true if filter_spec_ex_list is being passed*/ 2604 uint8_t filter_spec_ex2_list_valid; 2605 /* Must be set to # of filter_spec_ex_list*/ 2606 uint32_t filter_spec_ex2_list_len; 2607 struct ipa_filter_spec_ex2_type_v01 2608 filter_spec_ex2_list[QMI_IPA_MAX_FILTERS_V01]; 2609 /* Optional */ 2610 /* Mux ID for embedded call */ 2611 uint8_t embedded_call_mux_id_valid; 2612 /* Must be set to true if embedded_call_mux_id is being passed */ 2613 uint32_t embedded_call_mux_id; 2614 /* Mux ID for the new embedded call */ 2615 /* Optional */ 2616 /* Default MHI path */ 2617 uint8_t default_mhi_path_valid; 2618 /* Must be set to true if default_mhi_path is being passed */ 2619 uint8_t default_mhi_path; 2620 /* Default MHI path */ 2621 }; /* Message */ 2622 #define IPA_ADD_OFFLOAD_CONNECTION_REQ_MSG_V01_MAX_MSG_LEN 11361 2623 2624 struct ipa_add_offload_connection_resp_msg_v01 { 2625 /* Result Code */ 2626 struct ipa_qmi_response_type_v01 resp; 2627 /* optional */ 2628 /* Must be set to true if filter_handle_list is being passed*/ 2629 uint8_t filter_handle_list_valid; 2630 /* Must be set to # of filter_handle_list*/ 2631 uint32_t filter_handle_list_len; 2632 struct ipa_filter_rule_identifier_to_handle_map_v01 2633 filter_handle_list[QMI_IPA_MAX_FILTERS_V01]; 2634 }; /* Message */ 2635 #define IPA_ADD_OFFLOAD_CONNECTION_RESP_MSG_V01_MAX_MSG_LEN 523 2636 2637 struct ipa_remove_offload_connection_req_msg_v01 { 2638 /* optional */ 2639 /* Must be set to true if filter_handle_list is being passed*/ 2640 uint8_t filter_handle_list_valid; 2641 /* Must be set to # of filter_handle_list*/ 2642 uint32_t filter_handle_list_len; 2643 struct ipa_filter_rule_identifier_to_handle_map_v01 2644 filter_handle_list[QMI_IPA_MAX_FILTERS_V01]; 2645 /* Optional */ 2646 /* Clean All rules */ 2647 uint8_t clean_all_rules_valid; 2648 /* Must be set to true if clean_all_rules is being passed */ 2649 uint8_t clean_all_rules; 2650 /* Clean All rules */ 2651 }; /* Message */ 2652 #define IPA_REMOVE_OFFLOAD_CONNECTION_REQ_MSG_V01_MAX_MSG_LEN 520 2653 2654 struct ipa_remove_offload_connection_resp_msg_v01 { 2655 /* optional */ 2656 /* Must be set to true if filter_handle_list is being passed*/ 2657 uint8_t resp_valid; 2658 /* Result Code */ 2659 struct ipa_qmi_response_type_v01 resp; 2660 }; /* Message */ 2661 #define IPA_REMOVE_OFFLOAD_CONNECTION_RESP_MSG_V01_MAX_MSG_LEN 7 2662 2663 struct ipa_bw_change_ind_msg_v01 { 2664 /* optional */ 2665 /* Must be set to true if peak_bw_ul is being passed*/ 2666 uint8_t peak_bw_ul_valid; 2667 /* Kbps */ 2668 uint32_t peak_bw_ul; 2669 /* Must be set to true if peak_bw_dl is being passed*/ 2670 uint8_t peak_bw_dl_valid; 2671 /* Kbps */ 2672 uint32_t peak_bw_dl; 2673 }; /* Message */ 2674 #define IPA_BW_CHANGE_IND_MSG_V01_MAX_MSG_LEN 14 2675 2676 /*Service Message Definition*/ 2677 #define QMI_IPA_INDICATION_REGISTER_REQ_V01 0x0020 2678 #define QMI_IPA_INDICATION_REGISTER_RESP_V01 0x0020 2679 #define QMI_IPA_INIT_MODEM_DRIVER_REQ_V01 0x0021 2680 #define QMI_IPA_INIT_MODEM_DRIVER_RESP_V01 0x0021 2681 #define QMI_IPA_MASTER_DRIVER_INIT_COMPLETE_IND_V01 0x0022 2682 #define QMI_IPA_INSTALL_FILTER_RULE_REQ_V01 0x0023 2683 #define QMI_IPA_INSTALL_FILTER_RULE_RESP_V01 0x0023 2684 #define QMI_IPA_FILTER_INSTALLED_NOTIF_REQ_V01 0x0024 2685 #define QMI_IPA_FILTER_INSTALLED_NOTIF_RESP_V01 0x0024 2686 #define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_REQ_V01 0x0025 2687 #define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_RESP_V01 0x0025 2688 #define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_REQ_V01 0x0026 2689 #define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_RESP_V01 0x0026 2690 #define QMI_IPA_CONFIG_REQ_V01 0x0027 2691 #define QMI_IPA_CONFIG_RESP_V01 0x0027 2692 #define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_REQ_V01 0x0028 2693 #define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_RESP_V01 0x0028 2694 #define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_REQ_V01 0x0029 2695 #define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_RESP_V01 0x0029 2696 #define QMI_IPA_GET_DATA_STATS_REQ_V01 0x0030 2697 #define QMI_IPA_GET_DATA_STATS_RESP_V01 0x0030 2698 #define QMI_IPA_GET_APN_DATA_STATS_REQ_V01 0x0031 2699 #define QMI_IPA_GET_APN_DATA_STATS_RESP_V01 0x0031 2700 #define QMI_IPA_SET_DATA_USAGE_QUOTA_REQ_V01 0x0032 2701 #define QMI_IPA_SET_DATA_USAGE_QUOTA_RESP_V01 0x0032 2702 #define QMI_IPA_DATA_USAGE_QUOTA_REACHED_IND_V01 0x0033 2703 #define QMI_IPA_STOP_DATA_USAGE_QUOTA_REQ_V01 0x0034 2704 #define QMI_IPA_STOP_DATA_USAGE_QUOTA_RESP_V01 0x0034 2705 #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_V01 0x0035 2706 #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_V01 0x0035 2707 #define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_V01 0x0037 2708 #define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_V01 0x0037 2709 #define QMI_IPA_ENABLE_PER_CLIENT_STATS_REQ_V01 0x0038 2710 #define QMI_IPA_ENABLE_PER_CLIENT_STATS_RESP_V01 0x0038 2711 #define QMI_IPA_GET_STATS_PER_CLIENT_REQ_V01 0x0039 2712 #define QMI_IPA_GET_STATS_PER_CLIENT_RESP_V01 0x0039 2713 #define QMI_IPA_INSTALL_UL_FIREWALL_RULES_REQ_V01 0x003A 2714 #define QMI_IPA_INSTALL_UL_FIREWALL_RULES_RESP_V01 0x003A 2715 #define QMI_IPA_INSTALL_UL_FIREWALL_RULES_IND_V01 0x003A 2716 #define QMI_IPA_MHI_CLK_VOTE_REQ_V01 0x003B 2717 #define QMI_IPA_MHI_CLK_VOTE_RESP_V01 0x003B 2718 #define QMI_IPA_MHI_READY_IND_V01 0x003C 2719 #define QMI_IPA_MHI_ALLOC_CHANNEL_REQ_V01 0x003D 2720 #define QMI_IPA_MHI_ALLOC_CHANNEL_RESP_V01 0x003D 2721 #define QMI_IPA_MHI_CLEANUP_REQ_V01 0x003E 2722 #define QMI_IPA_MHI_CLEANUP_RESP_V01 0x003E 2723 #define QMI_IPA_ENDP_DESC_INDICATION_V01 0x003F 2724 #define QMI_IPA_MHI_PRIME_AGGR_INFO_REQ_V01 0x0040 2725 #define QMI_IPA_MHI_PRIME_AGGR_INFO_RESP_V01 0x0040 2726 #define QMI_IPA_ADD_OFFLOAD_CONNECTION_REQ_V01 0x0041 2727 #define QMI_IPA_ADD_OFFLOAD_CONNECTION_RESP_V01 0x0041 2728 #define QMI_IPA_REMOVE_OFFLOAD_CONNECTION_REQ_V01 0x0042 2729 #define QMI_IPA_REMOVE_OFFLOAD_CONNECTION_RESP_V01 0x0042 2730 #define QMI_IPA_BW_CHANGE_INDICATION_V01 0x0044 2731 2732 /* add for max length*/ 2733 #define QMI_IPA_INIT_MODEM_DRIVER_REQ_MAX_MSG_LEN_V01 162 2734 #define QMI_IPA_INIT_MODEM_DRIVER_RESP_MAX_MSG_LEN_V01 25 2735 #define QMI_IPA_INDICATION_REGISTER_REQ_MAX_MSG_LEN_V01 20 2736 #define QMI_IPA_INDICATION_REGISTER_RESP_MAX_MSG_LEN_V01 7 2737 #define QMI_IPA_INSTALL_FILTER_RULE_REQ_MAX_MSG_LEN_V01 33705 2738 #define QMI_IPA_INSTALL_FILTER_RULE_RESP_MAX_MSG_LEN_V01 783 2739 #define QMI_IPA_FILTER_INSTALLED_NOTIF_REQ_MAX_MSG_LEN_V01 1899 2740 #define QMI_IPA_FILTER_INSTALLED_NOTIF_RESP_MAX_MSG_LEN_V01 7 2741 #define QMI_IPA_MASTER_DRIVER_INIT_COMPLETE_IND_MAX_MSG_LEN_V01 7 2742 #define QMI_IPA_DATA_USAGE_QUOTA_REACHED_IND_MAX_MSG_LEN_V01 15 2743 2744 2745 #define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_REQ_MAX_MSG_LEN_V01 18 2746 #define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_REQ_MAX_MSG_LEN_V01 7 2747 #define QMI_IPA_ENABLE_FORCE_CLEAR_DATAPATH_RESP_MAX_MSG_LEN_V01 7 2748 #define QMI_IPA_DISABLE_FORCE_CLEAR_DATAPATH_RESP_MAX_MSG_LEN_V01 7 2749 2750 2751 #define QMI_IPA_CONFIG_REQ_MAX_MSG_LEN_V01 102 2752 #define QMI_IPA_CONFIG_RESP_MAX_MSG_LEN_V01 7 2753 #define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_REQ_MAX_MSG_LEN_V01 18 2754 #define QMI_IPA_DISABLE_LINK_LOW_PWR_STATE_RESP_MAX_MSG_LEN_V01 7 2755 #define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_REQ_MAX_MSG_LEN_V01 7 2756 #define QMI_IPA_ENABLE_LINK_LOW_PWR_STATE_RESP_MAX_MSG_LEN_V01 7 2757 #define QMI_IPA_GET_DATA_STATS_REQ_MAX_MSG_LEN_V01 11 2758 #define QMI_IPA_GET_DATA_STATS_RESP_MAX_MSG_LEN_V01 2234 2759 #define QMI_IPA_GET_APN_DATA_STATS_REQ_MAX_MSG_LEN_V01 36 2760 #define QMI_IPA_GET_APN_DATA_STATS_RESP_MAX_MSG_LEN_V01 299 2761 #define QMI_IPA_SET_DATA_USAGE_QUOTA_REQ_MAX_MSG_LEN_V01 100 2762 #define QMI_IPA_SET_DATA_USAGE_QUOTA_RESP_MAX_MSG_LEN_V01 7 2763 #define QMI_IPA_STOP_DATA_USAGE_QUOTA_REQ_MAX_MSG_LEN_V01 0 2764 #define QMI_IPA_STOP_DATA_USAGE_QUOTA_RESP_MAX_MSG_LEN_V01 7 2765 2766 #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_REQ_MAX_MSG_LEN_V01 4 2767 #define QMI_IPA_INIT_MODEM_DRIVER_CMPLT_RESP_MAX_MSG_LEN_V01 7 2768 2769 #define QMI_IPA_INSTALL_FILTER_RULE_EX_REQ_MAX_MSG_LEN_V01 34021 2770 #define QMI_IPA_INSTALL_FILTER_RULE_EX_RESP_MAX_MSG_LEN_V01 523 2771 2772 #define QMI_IPA_ENABLE_PER_CLIENT_STATS_REQ_MAX_MSG_LEN_V01 4 2773 #define QMI_IPA_ENABLE_PER_CLIENT_STATS_RESP_MAX_MSG_LEN_V01 7 2774 2775 #define QMI_IPA_GET_STATS_PER_CLIENT_REQ_MAX_MSG_LEN_V01 18 2776 #define QMI_IPA_GET_STATS_PER_CLIENT_RESP_MAX_MSG_LEN_V01 3595 2777 2778 #define QMI_IPA_INSTALL_UL_FIREWALL_RULES_REQ_MAX_MSG_LEN_V01 9875 2779 #define QMI_IPA_INSTALL_UL_FIREWALL_RULES_RESP_MAX_MSG_LEN_V01 7 2780 #define QMI_IPA_INSTALL_UL_FIREWALL_RULES_IND_MAX_MSG_LEN_V01 11 2781 /* Service Object Accessor */ 2782 2783 /* This is the largest MAX_MSG_LEN we have for all the messages 2784 * we expect to receive. This argument will be used in 2785 * qmi_handle_init to allocate a receive buffer for the socket 2786 * associated with our qmi_handle 2787 */ 2788 #define QMI_IPA_MAX_MSG_LEN 22685 2789 2790 #endif/* IPA_QMI_SERVICE_V01_H */ 2791