1/** @file 2* Multiple APIC Description Table (MADT) 3* 4* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. 5* Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR> 6* Copyright (c) 2015, Linaro Limited. All rights reserved.<BR> 7* 8* This program and the accompanying materials 9* are licensed and made available under the terms and conditions of the BSD License 10* which accompanies this distribution. The full text of the license may be found at 11* http://opensource.org/licenses/bsd-license.php 12* 13* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15* 16* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ 17* 18**/ 19 20#include "Pv660Platform.h" 21 22#include <Library/AcpiLib.h> 23#include <Library/ArmLib.h> 24#include <Library/PcdLib.h> 25#include <IndustryStandard/Acpi.h> 26#include <Library/AcpiNextLib.h> 27 28// Differs from Juno, we have another affinity level beyond cluster and core 29// 0x20000 is only for socket 0 30#define PLATFORM_GET_MPID(ClusterId, CoreId) (0x20000 | ((ClusterId) << 8) | (CoreId)) 31 32 33// 34// Multiple APIC Description Table 35// 36#pragma pack (1) 37 38typedef struct { 39 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; 40 EFI_ACPI_5_1_GIC_STRUCTURE GicInterfaces[16]; 41 EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; 42 EFI_ACPI_6_0_GIC_ITS_STRUCTURE GicITS[4]; 43} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE; 44 45#pragma pack () 46 47EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { 48 { 49 ARM_ACPI_HEADER ( 50 EFI_ACPI_1_0_APIC_SIGNATURE, 51 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE, 52 EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 53 ), 54 // 55 // MADT specific fields 56 // 57 0, // LocalApicAddress 58 0, // Flags 59 }, 60 { 61 // Format: EFI_ACPI_5_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase, 62 // GsivId, GicRBase, Mpidr) 63 // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of 64 // ACPI v5.1). 65 // The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses 66 // the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table. 67 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 68 0, 0, PLATFORM_GET_MPID(0, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 69 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x100000 /* GicRBase */), 70 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 71 1, 1, PLATFORM_GET_MPID(0, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 72 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x130000 /* GicRBase */), 73 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 74 2, 2, PLATFORM_GET_MPID(0, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 75 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x160000 /* GicRBase */), 76 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 77 3, 3, PLATFORM_GET_MPID(0, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 78 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x190000 /* GicRBase */), 79 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 80 4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 81 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */), 82 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 83 5, 5, PLATFORM_GET_MPID(1, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 84 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */), 85 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 86 6, 6, PLATFORM_GET_MPID(1, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 87 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x220000 /* GicRBase */), 88 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 89 7, 7, PLATFORM_GET_MPID(1, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 90 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x250000 /* GicRBase */), 91 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 92 8, 8, PLATFORM_GET_MPID(2, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 93 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x280000 /* GicRBase */), 94 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 95 9, 9, PLATFORM_GET_MPID(2, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 96 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */), 97 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 98 10, 10, PLATFORM_GET_MPID(2, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 99 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */), 100 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 101 11, 11, PLATFORM_GET_MPID(2, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 102 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x310000 /* GicRBase */), 103 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 104 12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 105 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x340000 /* GicRBase */), 106 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 107 13, 13, PLATFORM_GET_MPID(3, 1), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 108 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x370000 /* GicRBase */), 109 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 110 14, 14, PLATFORM_GET_MPID(3, 2), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 111 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */), 112 EFI_ACPI_5_1_GICC_STRUCTURE_INIT( 113 15, 15, PLATFORM_GET_MPID(3, 3), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase), 114 FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */), 115 }, 116 117 EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 0x4), 118 { 119 EFI_ACPI_6_0_GIC_ITS_INIT(0,0x8C000000), // pc 120 EFI_ACPI_6_0_GIC_ITS_INIT(1,0xC6000000), // dsa 121 EFI_ACPI_6_0_GIC_ITS_INIT(2,0xA3000000), // m3 122 EFI_ACPI_6_0_GIC_ITS_INIT(3,0xB7000000) // pcie 123 } 124}; 125 126// 127// Reference the table being generated to prevent the optimizer from removing the 128// data structure from the executable 129// 130VOID* CONST ReferenceAcpiTable = &Madt; 131