1 /******************************************************************************** 2 Copyright (C) 2016 Marvell International Ltd. 3 4 Marvell BSD License Option 5 6 If you received this File from Marvell, you may opt to use, redistribute and/or 7 modify this File under the following licensing terms. 8 Redistribution and use in source and binary forms, with or without modification, 9 are permitted provided that the following conditions are met: 10 11 * Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 * Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 * Neither the name of Marvell nor the names of its contributors may be 19 used to endorse or promote products derived from this software without 20 specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 23 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 26 ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 29 ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 31 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 33 *******************************************************************************/ 34 35 #ifndef __MDIO_DXE_H__ 36 #define __MDIO_DXE_H__ 37 38 #include <Uefi.h> 39 40 #define MVEBU_SMI_TIMEOUT 10000 41 42 /* SMI register fields */ 43 #define MVEBU_SMI_DATA_OFFS 0 /* Data */ 44 #define MVEBU_SMI_DATA_MASK (0xffff << MVEBU_SMI_DATA_OFFS) 45 #define MVEBU_SMI_DEV_ADDR_OFFS 16 /* PHY device address */ 46 #define MVEBU_SMI_REG_ADDR_OFFS 21 /* PHY device reg addr*/ 47 #define MVEBU_SMI_OPCODE_OFFS 26 /* Write/Read opcode */ 48 #define MVEBU_SMI_OPCODE_READ (1 << MVEBU_SMI_OPCODE_OFFS) 49 #define MVEBU_SMI_READ_VALID (1 << 27) /* Read Valid */ 50 #define MVEBU_SMI_BUSY (1 << 28) /* Busy */ 51 52 #define MVEBU_PHY_REG_MASK 0x1f 53 #define MVEBU_PHY_ADDR_MASK 0x1f 54 55 #define MdioRegWrite32(x, y) MmioWrite32((y), (x)) 56 57 #endif // __MDIO_DXE_H__ 58