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1 /** @file
2 *
3 *  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
4 *  Copyright (c) 2015, Linaro Limited. All rights reserved.
5 *
6 *  This program and the accompanying materials
7 *  are licensed and made available under the terms and conditions of the BSD License
8 *  which accompanies this distribution.  The full text of the license may be found at
9 *  http://opensource.org/licenses/bsd-license.php
10 *
11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 *
14 **/
15 
16 #include <Uefi.h>
17 #include <PiPei.h>
18 #include <Library/DebugLib.h>
19 #include <Library/PcdLib.h>
20 #include <Library/IoLib.h>
21 #include <Library/CacheMaintenanceLib.h>
22 #include <Library/ArmLib.h>
23 
24 #include <PlatformArch.h>
25 #include <Library/PlatformSysCtrlLib.h>
26 
27 #include <Library/OemMiscLib.h>
28 
29 #define TIMER_SUBCTRL_BASE                              PcdGet64(PcdPeriSubctrlAddress)
30 #define ALG_BASE                                        (0xA0000000)
31 #define PERI_SUB_CTRL_BASE                              (0x80000000)
32 #define SC_TM_CLKEN0_REG                                (0x2050)
33 #define SYS_APB_IF_BASE                                 (0x10000)
34 #define TSENSOR_REG                                     (0x5000)
35 #define SC_ITS_M3_INT_MUX_SEL_REG                       (0x21F0)
36 #define SC_HLLC_RESET_DREQ_REG                          (0xA8C)
37 #define SC_ITS_M3_INT_MUX_SEL_VALUE                     (0xF)
38 #define SC_HLLC_RESET_DREQ_VALUE                        (0x1f)
39 #define TSENSOR_CONFIG_VALUE                            (0x1)
40 
PlatformTimerStart(VOID)41 VOID PlatformTimerStart (VOID)
42 {
43     // Timer0 clock enable
44     MmioWrite32 (TIMER_SUBCTRL_BASE + SC_TM_CLKEN0_REG, 0x3);
45 }
46 
47 EFI_STATUS
48 EFIAPI
EarlyConfigEntry(IN EFI_PEI_FILE_HANDLE FileHandle,IN CONST EFI_PEI_SERVICES ** PeiServices)49 EarlyConfigEntry (
50   IN       EFI_PEI_FILE_HANDLE  FileHandle,
51   IN CONST EFI_PEI_SERVICES     **PeiServices
52   )
53 {
54     DEBUG((EFI_D_INFO,"SMMU CONFIG........."));
55     SmmuConfigForOS();
56     DEBUG((EFI_D_INFO,"Done\n"));
57 
58     DEBUG((EFI_D_INFO,"ITS CONFIG........."));
59     ITSCONFIG();
60     DEBUG((EFI_D_INFO,"Done\n"));
61 
62     DEBUG((EFI_D_INFO,"AP CONFIG........."));
63     MmioWrite64(FixedPcdGet64(PcdMailBoxAddress), 0x0);
64     (void)WriteBackInvalidateDataCacheRange((VOID *) FixedPcdGet64(PcdMailBoxAddress), 8);
65     ArmDataSynchronizationBarrier ();
66     ArmInstructionSynchronizationBarrier ();
67 
68     CoreSelectBoot();
69 
70     DEBUG((EFI_D_INFO,"Done\n"));
71 
72     DEBUG((EFI_D_INFO,"MN CONFIG........."));
73     MN_CONFIG ();
74     DEBUG((EFI_D_INFO,"Done\n"));
75 
76     DEBUG((EFI_D_INFO,"RTC CONFIG........."));
77 
78     MmioWrite32(ALG_BASE + SC_ITS_M3_INT_MUX_SEL_REG, SC_ITS_M3_INT_MUX_SEL_VALUE);
79 
80     DEBUG((EFI_D_INFO,"Done\n"));
81 
82     DEBUG((EFI_D_INFO,"Tsensor CONFIG........."));
83 
84     MmioWrite32(PERI_SUB_CTRL_BASE + SYS_APB_IF_BASE + TSENSOR_REG, TSENSOR_CONFIG_VALUE);
85     MmioWrite32(ALG_BASE + SC_HLLC_RESET_DREQ_REG, SC_HLLC_RESET_DREQ_VALUE);
86 
87     DEBUG((EFI_D_INFO,"Done\n"));
88 
89     DEBUG((EFI_D_INFO,"Timer CONFIG........."));
90     PlatformTimerStart ();
91     DEBUG((EFI_D_INFO,"Done\n"));
92 
93     return EFI_SUCCESS;
94 }
95