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1/*
2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <platform_def.h>
8
9OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
10OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
11ENTRY(bl2_entrypoint)
12
13MEMORY {
14    RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
15}
16
17
18SECTIONS
19{
20    . = BL2_BASE;
21    ASSERT(. == ALIGN(4096),
22           "BL2_BASE address is not aligned on a page boundary.")
23
24#if SEPARATE_CODE_AND_RODATA
25    .text . : {
26        __TEXT_START__ = .;
27        *bl2_entrypoint.o(.text*)
28        *(.text*)
29        *(.vectors)
30        . = NEXT(4096);
31        __TEXT_END__ = .;
32     } >RAM
33
34    .rodata . : {
35        __RODATA_START__ = .;
36        *(.rodata*)
37
38        /* Ensure 8-byte alignment for descriptors and ensure inclusion */
39        . = ALIGN(8);
40        __PARSER_LIB_DESCS_START__ = .;
41        KEEP(*(.img_parser_lib_descs))
42        __PARSER_LIB_DESCS_END__ = .;
43
44        . = NEXT(4096);
45        __RODATA_END__ = .;
46    } >RAM
47#else
48    ro . : {
49        __RO_START__ = .;
50        *bl2_entrypoint.o(.text*)
51        *(.text*)
52        *(.rodata*)
53
54        /* Ensure 8-byte alignment for descriptors and ensure inclusion */
55        . = ALIGN(8);
56        __PARSER_LIB_DESCS_START__ = .;
57        KEEP(*(.img_parser_lib_descs))
58        __PARSER_LIB_DESCS_END__ = .;
59
60        *(.vectors)
61        __RO_END_UNALIGNED__ = .;
62        /*
63         * Memory page(s) mapped to this section will be marked as
64         * read-only, executable.  No RW data from the next section must
65         * creep in.  Ensure the rest of the current memory page is unused.
66         */
67        . = NEXT(4096);
68        __RO_END__ = .;
69    } >RAM
70#endif
71
72    /*
73     * Define a linker symbol to mark start of the RW memory area for this
74     * image.
75     */
76    __RW_START__ = . ;
77
78    /*
79     * .data must be placed at a lower address than the stacks if the stack
80     * protector is enabled. Alternatively, the .data.stack_protector_canary
81     * section can be placed independently of the main .data section.
82     */
83    .data . : {
84        __DATA_START__ = .;
85        *(.data*)
86        __DATA_END__ = .;
87    } >RAM
88
89    stacks (NOLOAD) : {
90        __STACKS_START__ = .;
91        *(tzfw_normal_stacks)
92        __STACKS_END__ = .;
93    } >RAM
94
95    /*
96     * The .bss section gets initialised to 0 at runtime.
97     * Its base address should be 16-byte aligned for better performance of the
98     * zero-initialization code.
99     */
100    .bss : ALIGN(16) {
101        __BSS_START__ = .;
102        *(SORT_BY_ALIGNMENT(.bss*))
103        *(COMMON)
104        __BSS_END__ = .;
105    } >RAM
106
107    /*
108     * The xlat_table section is for full, aligned page tables (4K).
109     * Removing them from .bss avoids forcing 4K alignment on
110     * the .bss section and eliminates the unecessary zero init
111     */
112    xlat_table (NOLOAD) : {
113        *(xlat_table)
114    } >RAM
115
116#if USE_COHERENT_MEM
117    /*
118     * The base address of the coherent memory section must be page-aligned (4K)
119     * to guarantee that the coherent data are stored on their own pages and
120     * are not mixed with normal data.  This is required to set up the correct
121     * memory attributes for the coherent data page tables.
122     */
123    coherent_ram (NOLOAD) : ALIGN(4096) {
124        __COHERENT_RAM_START__ = .;
125        *(tzfw_coherent_mem)
126        __COHERENT_RAM_END_UNALIGNED__ = .;
127        /*
128         * Memory page(s) mapped to this section will be marked
129         * as device memory.  No other unexpected data must creep in.
130         * Ensure the rest of the current memory page is unused.
131         */
132        . = NEXT(4096);
133        __COHERENT_RAM_END__ = .;
134    } >RAM
135#endif
136
137    /*
138     * Define a linker symbol to mark end of the RW memory area for this
139     * image.
140     */
141    __RW_END__ = .;
142    __BL2_END__ = .;
143
144    __BSS_SIZE__ = SIZEOF(.bss);
145
146#if USE_COHERENT_MEM
147    __COHERENT_RAM_UNALIGNED_SIZE__ =
148        __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
149#endif
150
151    ASSERT(. <= BL2_LIMIT, "BL2 image has exceeded its limit.")
152}
153