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1 /*
2  * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <arm_def.h>
8 #include <assert.h>
9 #include <debug.h>
10 #include <platform_def.h>
11 #include <tzc_dmc500.h>
12 
13 /*******************************************************************************
14  * Initialize the DMC500-TrustZone Controller for ARM standard platforms.
15  * Configure both the interfaces on Region 0 with no access, Region 1 with
16  * secure access only, and the remaining DRAM regions access from the
17  * given Non-Secure masters.
18  *
19  * When booting an EL3 payload, this is simplified: we configure region 0 with
20  * secure access only and do not enable any other region.
21  ******************************************************************************/
arm_tzc_dmc500_setup(tzc_dmc500_driver_data_t * plat_driver_data)22 void arm_tzc_dmc500_setup(tzc_dmc500_driver_data_t *plat_driver_data)
23 {
24 	assert(plat_driver_data);
25 
26 	INFO("Configuring DMC-500 TZ Settings\n");
27 
28 	tzc_dmc500_driver_init(plat_driver_data);
29 
30 #ifndef EL3_PAYLOAD_BASE
31 	/* Region 0 set to no access by default */
32 	tzc_dmc500_configure_region0(TZC_REGION_S_NONE, 0);
33 
34 	/* Region 1 set to cover Secure part of DRAM */
35 	tzc_dmc500_configure_region(1, ARM_AP_TZC_DRAM1_BASE,
36 		ARM_EL3_TZC_DRAM1_END,
37 		TZC_REGION_S_RDWR,
38 		0);
39 
40 	/* Region 2 set to cover Non-Secure access to 1st DRAM address range.*/
41 	tzc_dmc500_configure_region(2,
42 		ARM_NS_DRAM1_BASE,
43 		ARM_NS_DRAM1_END,
44 		ARM_TZC_NS_DRAM_S_ACCESS,
45 		PLAT_ARM_TZC_NS_DEV_ACCESS);
46 
47 	/* Region 3 set to cover Non-Secure access to 2nd DRAM address range */
48 	tzc_dmc500_configure_region(3,
49 		ARM_DRAM2_BASE,
50 		ARM_DRAM2_END,
51 		ARM_TZC_NS_DRAM_S_ACCESS,
52 		PLAT_ARM_TZC_NS_DEV_ACCESS);
53 #else
54 	/* Allow secure access only to DRAM for EL3 payloads */
55 	tzc_dmc500_configure_region0(TZC_REGION_S_RDWR, 0);
56 #endif
57 	/*
58 	 * Raise an exception if a NS device tries to access secure memory
59 	 * TODO: Add interrupt handling support.
60 	 */
61 	tzc_dmc500_set_action(TZC_ACTION_RV_LOWERR);
62 
63 	/*
64 	 * Flush the configuration settings to have an affect. Validate
65 	 * flush by checking FILTER_EN is set on region 1 attributes
66 	 * register.
67 	 */
68 	tzc_dmc500_config_complete();
69 
70 	/*
71 	 * Wait for the flush to complete.
72 	 * TODO: Have a timeout for this loop
73 	 */
74 	while (tzc_dmc500_verify_complete())
75 		;
76 }
77