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1/*
2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <cci.h>
8#include <gic_v2.h>
9#include <platform_def.h>
10
11.section .rodata.gic_reg_name, "aS"
12gicc_regs:
13	.asciz "gicc_hppir", "gicc_ahppir", "gicc_ctlr", ""
14gicd_pend_reg:
15	.asciz "gicd_ispendr regs (Offsets 0x200 - 0x278)\n"	\
16		" Offset:\t\t\tvalue\n"
17newline:
18	.asciz "\n"
19spacer:
20	.asciz ":\t\t0x"
21
22	/* ---------------------------------------------
23	 * The below macro prints out relevant GIC
24	 * registers whenever an unhandled exception is
25	 * taken in BL3-1.
26	 * Clobbers: x0 - x10, x16, x17, sp
27	 * ---------------------------------------------
28	 */
29	.macro plat_crash_print_regs
30	mov_imm x16, BASE_GICD_BASE
31	mov_imm x17, BASE_GICC_BASE
32	/* Load the gicc reg list to x6 */
33	adr	x6, gicc_regs
34	/* Load the gicc regs to gp regs used by str_in_crash_buf_print */
35	ldr	w8, [x17, #GICC_HPPIR]
36	ldr	w9, [x17, #GICC_AHPPIR]
37	ldr	w10, [x17, #GICC_CTLR]
38	/* Store to the crash buf and print to console */
39	bl	str_in_crash_buf_print
40
41	/* Print the GICD_ISPENDR regs */
42	add	x7, x16, #GICD_ISPENDR
43	adr	x4, gicd_pend_reg
44	bl	asm_print_str
45gicd_ispendr_loop:
46	sub	x4, x7, x16
47	cmp	x4, #0x280
48	b.eq	exit_print_gic_regs
49	bl	asm_print_hex
50
51	adr	x4, spacer
52	bl	asm_print_str
53
54	ldr	x4, [x7], #8
55	bl	asm_print_hex
56
57	adr	x4, newline
58	bl	asm_print_str
59	b	gicd_ispendr_loop
60exit_print_gic_regs:
61	.endm
62
63.section .rodata.cci_reg_name, "aS"
64cci_iface_regs:
65	.asciz "cci_snoop_ctrl_cluster0", "cci_snoop_ctrl_cluster1" , ""
66
67	/* ------------------------------------------------
68	 * The below macro prints out relevant interconnect
69	 * registers whenever an unhandled exception is
70	 * taken in BL3-1.
71	 * Clobbers: x0 - x9, sp
72	 * ------------------------------------------------
73	 */
74	.macro plat_print_interconnect_regs
75	adr	x6, cci_iface_regs
76	/* Store in x7 the base address of the first interface */
77	mov_imm	x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET(	\
78			PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX))
79	ldr	w8, [x7, #SNOOP_CTRL_REG]
80	/* Store in x7 the base address of the second interface */
81	mov_imm	x7, (PLAT_MT_CCI_BASE + SLAVE_IFACE_OFFSET(	\
82			PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX))
83	ldr	w9, [x7, #SNOOP_CTRL_REG]
84	/* Store to the crash buf and print to console */
85	bl	str_in_crash_buf_print
86	.endm
87