1 /*
2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch.h>
8 #include <arch_helpers.h>
9 #include <assert.h>
10 #include <bl_common.h>
11 #include <console.h>
12 #include <platform_def.h>
13 #include "qemu_private.h"
14
15 /*******************************************************************************
16 * Declarations of linker defined symbols which will tell us where BL1 lives
17 * in Trusted RAM
18 ******************************************************************************/
19 extern uint64_t __BL1_RAM_START__;
20 extern uint64_t __BL1_RAM_END__;
21 #define BL1_RAM_BASE (uint64_t)(&__BL1_RAM_START__)
22 #define BL1_RAM_LIMIT (uint64_t)(&__BL1_RAM_END__)
23
24 /* Data structure which holds the extents of the trusted SRAM for BL1*/
25 static meminfo_t bl1_tzram_layout;
26
27
bl1_plat_sec_mem_layout(void)28 meminfo_t *bl1_plat_sec_mem_layout(void)
29 {
30 return &bl1_tzram_layout;
31 }
32
33 /*******************************************************************************
34 * Perform any BL1 specific platform actions.
35 ******************************************************************************/
bl1_early_platform_setup(void)36 void bl1_early_platform_setup(void)
37 {
38 /* Initialize the console to provide early debug support */
39 console_init(PLAT_QEMU_BOOT_UART_BASE, PLAT_QEMU_BOOT_UART_CLK_IN_HZ,
40 PLAT_QEMU_CONSOLE_BAUDRATE);
41
42 /* Allow BL1 to see the whole Trusted RAM */
43 bl1_tzram_layout.total_base = BL_RAM_BASE;
44 bl1_tzram_layout.total_size = BL_RAM_SIZE;
45
46 #if !LOAD_IMAGE_V2
47 /* Calculate how much RAM BL1 is using and how much remains free */
48 bl1_tzram_layout.free_base = BL_RAM_BASE;
49 bl1_tzram_layout.free_size = BL_RAM_SIZE;
50 reserve_mem(&bl1_tzram_layout.free_base, &bl1_tzram_layout.free_size,
51 BL1_RAM_BASE, BL1_RAM_LIMIT - BL1_RAM_BASE);
52 #endif /* !LOAD_IMAGE_V2 */
53 }
54
55 /******************************************************************************
56 * Perform the very early platform specific architecture setup. This only
57 * does basic initialization. Later architectural setup (bl1_arch_setup())
58 * does not do anything platform specific.
59 *****************************************************************************/
bl1_plat_arch_setup(void)60 void bl1_plat_arch_setup(void)
61 {
62 qemu_configure_mmu_el3(bl1_tzram_layout.total_base,
63 bl1_tzram_layout.total_size,
64 BL1_RO_BASE, BL1_RO_LIMIT,
65 BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END);
66 }
67
bl1_platform_setup(void)68 void bl1_platform_setup(void)
69 {
70 plat_qemu_io_setup();
71 }
72
73 #if !LOAD_IMAGE_V2
74 /*******************************************************************************
75 * Function that takes a memory layout into which BL2 has been loaded and
76 * populates a new memory layout for BL2 that ensures that BL1's data sections
77 * resident in secure RAM are not visible to BL2.
78 ******************************************************************************/
bl1_init_bl2_mem_layout(const meminfo_t * bl1_mem_layout,meminfo_t * bl2_mem_layout)79 void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout,
80 meminfo_t *bl2_mem_layout)
81 {
82 const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE;
83
84 assert(bl1_mem_layout != NULL);
85 assert(bl2_mem_layout != NULL);
86
87 /* Check that BL1's memory is lying outside of the free memory */
88 assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) ||
89 (BL1_RAM_BASE >= (bl1_mem_layout->free_base +
90 bl1_mem_layout->free_size)));
91
92 /* Remove BL1 RW data from the scope of memory visible to BL2 */
93 *bl2_mem_layout = *bl1_mem_layout;
94 reserve_mem(&bl2_mem_layout->total_base,
95 &bl2_mem_layout->total_size,
96 BL1_RAM_BASE,
97 bl1_size);
98
99 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t));
100 }
101
102 /*******************************************************************************
103 * Before calling this function BL2 is loaded in memory and its entrypoint
104 * is set by load_image. This is a placeholder for the platform to change
105 * the entrypoint of BL2 and set SPSR and security state.
106 * On ARM standard platforms we only set the security state of the entrypoint
107 ******************************************************************************/
bl1_plat_set_bl2_ep_info(image_info_t * bl2_image,entry_point_info_t * bl2_ep)108 void bl1_plat_set_bl2_ep_info(image_info_t *bl2_image,
109 entry_point_info_t *bl2_ep)
110 {
111 SET_SECURITY_STATE(bl2_ep->h.attr, SECURE);
112 bl2_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
113 }
114 #endif /* !LOAD_IMAGE_V2 */
115