• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /** @file
2 
3   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4   Copyright (c) 2011, ARM Limited. All rights reserved.
5 
6   This program and the accompanying materials
7   are licensed and made available under the terms and conditions of the BSD License
8   which accompanies this distribution.  The full text of the license may be found at
9   http://opensource.org/licenses/bsd-license.php
10 
11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 
14 **/
15 
16 #include "CpuDxe.h"
17 
18 #include <Guid/IdleLoopEvent.h>
19 
20 
21 /**
22   This function flushes the range of addresses from Start to Start+Length
23   from the processor's data cache. If Start is not aligned to a cache line
24   boundary, then the bytes before Start to the preceding cache line boundary
25   are also flushed. If Start+Length is not aligned to a cache line boundary,
26   then the bytes past Start+Length to the end of the next cache line boundary
27   are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
28   supported. If the data cache is fully coherent with all DMA operations, then
29   this function can just return EFI_SUCCESS. If the processor does not support
30   flushing a range of the data cache, then the entire data cache can be flushed.
31 
32   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
33   @param  Start            The beginning physical address to flush from the processor's data
34                            cache.
35   @param  Length           The number of bytes to flush from the processor's data cache. This
36                            function may flush more bytes than Length specifies depending upon
37                            the granularity of the flush operation that the processor supports.
38   @param  FlushType        Specifies the type of flush operation to perform.
39 
40   @retval EFI_SUCCESS           The address range from Start to Start+Length was flushed from
41                                 the processor's data cache.
42   @retval EFI_UNSUPPORTED       The processor does not support the cache flush type specified
43                                 by FlushType.
44   @retval EFI_DEVICE_ERROR      The address range from Start to Start+Length could not be flushed
45                                 from the processor's data cache.
46 
47 **/
48 EFI_STATUS
49 EFIAPI
CpuFlushCpuDataCache(IN EFI_CPU_ARCH_PROTOCOL * This,IN EFI_PHYSICAL_ADDRESS Start,IN UINT64 Length,IN EFI_CPU_FLUSH_TYPE FlushType)50 CpuFlushCpuDataCache (
51   IN EFI_CPU_ARCH_PROTOCOL           *This,
52   IN EFI_PHYSICAL_ADDRESS            Start,
53   IN UINT64                          Length,
54   IN EFI_CPU_FLUSH_TYPE              FlushType
55   )
56 {
57 
58   switch (FlushType) {
59     case EfiCpuFlushTypeWriteBack:
60       WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
61       break;
62     case EfiCpuFlushTypeInvalidate:
63       InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
64       break;
65     case EfiCpuFlushTypeWriteBackInvalidate:
66       WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length);
67       break;
68     default:
69       return EFI_INVALID_PARAMETER;
70   }
71 
72   return EFI_SUCCESS;
73 }
74 
75 
76 /**
77   This function enables interrupt processing by the processor.
78 
79   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
80 
81   @retval EFI_SUCCESS           Interrupts are enabled on the processor.
82   @retval EFI_DEVICE_ERROR      Interrupts could not be enabled on the processor.
83 
84 **/
85 EFI_STATUS
86 EFIAPI
CpuEnableInterrupt(IN EFI_CPU_ARCH_PROTOCOL * This)87 CpuEnableInterrupt (
88   IN EFI_CPU_ARCH_PROTOCOL          *This
89   )
90 {
91   ArmEnableInterrupts ();
92 
93   return EFI_SUCCESS;
94 }
95 
96 
97 /**
98   This function disables interrupt processing by the processor.
99 
100   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
101 
102   @retval EFI_SUCCESS           Interrupts are disabled on the processor.
103   @retval EFI_DEVICE_ERROR      Interrupts could not be disabled on the processor.
104 
105 **/
106 EFI_STATUS
107 EFIAPI
CpuDisableInterrupt(IN EFI_CPU_ARCH_PROTOCOL * This)108 CpuDisableInterrupt (
109   IN EFI_CPU_ARCH_PROTOCOL          *This
110   )
111 {
112   ArmDisableInterrupts ();
113 
114   return EFI_SUCCESS;
115 }
116 
117 
118 /**
119   This function retrieves the processor's current interrupt state a returns it in
120   State. If interrupts are currently enabled, then TRUE is returned. If interrupts
121   are currently disabled, then FALSE is returned.
122 
123   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
124   @param  State            A pointer to the processor's current interrupt state. Set to TRUE if
125                            interrupts are enabled and FALSE if interrupts are disabled.
126 
127   @retval EFI_SUCCESS           The processor's current interrupt state was returned in State.
128   @retval EFI_INVALID_PARAMETER State is NULL.
129 
130 **/
131 EFI_STATUS
132 EFIAPI
CpuGetInterruptState(IN EFI_CPU_ARCH_PROTOCOL * This,OUT BOOLEAN * State)133 CpuGetInterruptState (
134   IN  EFI_CPU_ARCH_PROTOCOL         *This,
135   OUT BOOLEAN                       *State
136   )
137 {
138   if (State == NULL) {
139     return EFI_INVALID_PARAMETER;
140   }
141 
142   *State = ArmGetInterruptState();
143   return EFI_SUCCESS;
144 }
145 
146 
147 /**
148   This function generates an INIT on the processor. If this function succeeds, then the
149   processor will be reset, and control will not be returned to the caller. If InitType is
150   not supported by this processor, or the processor cannot programmatically generate an
151   INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
152   occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
153 
154   @param  This             The EFI_CPU_ARCH_PROTOCOL instance.
155   @param  InitType         The type of processor INIT to perform.
156 
157   @retval EFI_SUCCESS           The processor INIT was performed. This return code should never be seen.
158   @retval EFI_UNSUPPORTED       The processor INIT operation specified by InitType is not supported
159                                 by this processor.
160   @retval EFI_DEVICE_ERROR      The processor INIT failed.
161 
162 **/
163 EFI_STATUS
164 EFIAPI
CpuInit(IN EFI_CPU_ARCH_PROTOCOL * This,IN EFI_CPU_INIT_TYPE InitType)165 CpuInit (
166   IN EFI_CPU_ARCH_PROTOCOL           *This,
167   IN EFI_CPU_INIT_TYPE               InitType
168   )
169 {
170   return EFI_UNSUPPORTED;
171 }
172 
173 EFI_STATUS
174 EFIAPI
CpuRegisterInterruptHandler(IN EFI_CPU_ARCH_PROTOCOL * This,IN EFI_EXCEPTION_TYPE InterruptType,IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler)175 CpuRegisterInterruptHandler (
176   IN EFI_CPU_ARCH_PROTOCOL          *This,
177   IN EFI_EXCEPTION_TYPE             InterruptType,
178   IN EFI_CPU_INTERRUPT_HANDLER      InterruptHandler
179   )
180 {
181   return RegisterInterruptHandler (InterruptType, InterruptHandler);
182 }
183 
184 EFI_STATUS
185 EFIAPI
CpuGetTimerValue(IN EFI_CPU_ARCH_PROTOCOL * This,IN UINT32 TimerIndex,OUT UINT64 * TimerValue,OUT UINT64 * TimerPeriod OPTIONAL)186 CpuGetTimerValue (
187   IN  EFI_CPU_ARCH_PROTOCOL          *This,
188   IN  UINT32                         TimerIndex,
189   OUT UINT64                         *TimerValue,
190   OUT UINT64                         *TimerPeriod   OPTIONAL
191   )
192 {
193   return EFI_UNSUPPORTED;
194 }
195 
196 /**
197   Callback function for idle events.
198 
199   @param  Event                 Event whose notification function is being invoked.
200   @param  Context               The pointer to the notification function's context,
201                                 which is implementation-dependent.
202 
203 **/
204 VOID
205 EFIAPI
IdleLoopEventCallback(IN EFI_EVENT Event,IN VOID * Context)206 IdleLoopEventCallback (
207   IN EFI_EVENT                Event,
208   IN VOID                     *Context
209   )
210 {
211   CpuSleep ();
212 }
213 
214 //
215 // Globals used to initialize the protocol
216 //
217 EFI_HANDLE            mCpuHandle = NULL;
218 EFI_CPU_ARCH_PROTOCOL mCpu = {
219   CpuFlushCpuDataCache,
220   CpuEnableInterrupt,
221   CpuDisableInterrupt,
222   CpuGetInterruptState,
223   CpuInit,
224   CpuRegisterInterruptHandler,
225   CpuGetTimerValue,
226   CpuSetMemoryAttributes,
227   0,          // NumberOfTimers
228   2048,       // DmaBufferAlignment
229 };
230 
231 STATIC
232 VOID
InitializeDma(IN OUT EFI_CPU_ARCH_PROTOCOL * CpuArchProtocol)233 InitializeDma (
234   IN OUT  EFI_CPU_ARCH_PROTOCOL   *CpuArchProtocol
235   )
236 {
237   CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule ();
238 }
239 
240 EFI_STATUS
CpuDxeInitialize(IN EFI_HANDLE ImageHandle,IN EFI_SYSTEM_TABLE * SystemTable)241 CpuDxeInitialize (
242   IN EFI_HANDLE         ImageHandle,
243   IN EFI_SYSTEM_TABLE   *SystemTable
244   )
245 {
246   EFI_STATUS  Status;
247   EFI_EVENT    IdleLoopEvent;
248 
249   InitializeExceptions (&mCpu);
250 
251   InitializeDma (&mCpu);
252 
253   Status = gBS->InstallMultipleProtocolInterfaces (
254                 &mCpuHandle,
255                 &gEfiCpuArchProtocolGuid,           &mCpu,
256                 &gVirtualUncachedPagesProtocolGuid, &gVirtualUncachedPages,
257                 NULL
258                 );
259 
260   //
261   // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes ()
262   // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go
263   // after the protocol is installed
264   //
265   SyncCacheConfig (&mCpu);
266 
267   // If the platform is a MPCore system then install the Configuration Table describing the
268   // secondary core states
269   if (ArmIsMpCore()) {
270     PublishArmProcessorTable();
271   }
272 
273   //
274   // Setup a callback for idle events
275   //
276   Status = gBS->CreateEventEx (
277                   EVT_NOTIFY_SIGNAL,
278                   TPL_NOTIFY,
279                   IdleLoopEventCallback,
280                   NULL,
281                   &gIdleLoopEventGuid,
282                   &IdleLoopEvent
283                   );
284   ASSERT_EFI_ERROR (Status);
285 
286   return Status;
287 }
288