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1 /** @file
2   Platform BDS customizations include file.
3 
4   Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>
5   This program and the accompanying materials
6   are licensed and made available under the terms and conditions of the BSD License
7   which accompanies this distribution.  The full text of the license may be found at
8   http://opensource.org/licenses/bsd-license.php
9 
10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 
13 Module Name:
14 
15   BdsPlatform.h
16 
17 Abstract:
18 
19   Head file for BDS Platform specific code
20 
21 **/
22 
23 #ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
24 #define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
25 
26 
27 #include <PiDxe.h>
28 
29 #include <IndustryStandard/Pci.h>
30 #include <IndustryStandard/Acpi.h>
31 #include <IndustryStandard/SmBios.h>
32 #include <IndustryStandard/PeImage.h>
33 
34 #include <Library/DebugLib.h>
35 #include <Library/BaseMemoryLib.h>
36 #include <Library/UefiBootServicesTableLib.h>
37 #include <Library/UefiRuntimeServicesTableLib.h>
38 #include <Library/MemoryAllocationLib.h>
39 #include <Library/BaseLib.h>
40 #include <Library/PcdLib.h>
41 #include <Library/PciLib.h>
42 #include <Library/UefiBootManagerLib.h>
43 #include <Library/BootLogoLib.h>
44 #include <Library/HobLib.h>
45 #include <Library/UefiLib.h>
46 #include <Library/DxeServicesTableLib.h>
47 #include <Library/DevicePathLib.h>
48 #include <Library/IoLib.h>
49 #include <Library/NvVarsFileLib.h>
50 #include <Library/QemuFwCfgLib.h>
51 #include <Library/QemuBootOrderLib.h>
52 
53 #include <Protocol/Decompress.h>
54 #include <Protocol/PciIo.h>
55 #include <Protocol/FirmwareVolume2.h>
56 #include <Protocol/SimpleFileSystem.h>
57 #include <Protocol/PciRootBridgeIo.h>
58 #include <Protocol/S3SaveState.h>
59 #include <Protocol/DxeSmmReadyToLock.h>
60 #include <Protocol/LoadedImage.h>
61 
62 #include <Guid/Acpi.h>
63 #include <Guid/SmBios.h>
64 #include <Guid/Mps.h>
65 #include <Guid/HobList.h>
66 #include <Guid/GlobalVariable.h>
67 #include <Guid/EventGroup.h>
68 
69 #include <OvmfPlatforms.h>
70 
71 extern EFI_DEVICE_PATH_PROTOCOL   *gPlatformConnectSequence[];
72 extern ACPI_HID_DEVICE_PATH       gPnpPs2KeyboardDeviceNode;
73 extern ACPI_HID_DEVICE_PATH       gPnp16550ComPortDeviceNode;
74 extern UART_DEVICE_PATH           gUartDeviceNode;
75 extern VENDOR_DEVICE_PATH         gTerminalTypeDeviceNode;
76 
77 #define PCI_DEVICE_PATH_NODE(Func, Dev) \
78   { \
79     { \
80       HARDWARE_DEVICE_PATH, \
81       HW_PCI_DP, \
82       { \
83         (UINT8) (sizeof (PCI_DEVICE_PATH)), \
84         (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \
85       } \
86     }, \
87     (Func), \
88     (Dev) \
89   }
90 
91 #define PNPID_DEVICE_PATH_NODE(PnpId) \
92   { \
93     { \
94       ACPI_DEVICE_PATH, \
95       ACPI_DP, \
96       { \
97         (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \
98         (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \
99       }, \
100     }, \
101     EISA_PNP_ID((PnpId)), \
102     0 \
103   }
104 
105 #define gPciIsaBridge \
106   PCI_DEVICE_PATH_NODE(0, 0x1f)
107 
108 #define gP2PBridge \
109   PCI_DEVICE_PATH_NODE(0, 0x1e)
110 
111 #define gPnpPs2Keyboard \
112   PNPID_DEVICE_PATH_NODE(0x0303)
113 
114 #define gPnp16550ComPort \
115   PNPID_DEVICE_PATH_NODE(0x0501)
116 
117 #define gUart \
118   { \
119     { \
120       MESSAGING_DEVICE_PATH, \
121       MSG_UART_DP, \
122       { \
123         (UINT8) (sizeof (UART_DEVICE_PATH)), \
124         (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \
125       } \
126     }, \
127     0, \
128     115200, \
129     8, \
130     1, \
131     1 \
132   }
133 
134 #define gPcAnsiTerminal \
135   { \
136     { \
137       MESSAGING_DEVICE_PATH, \
138       MSG_VENDOR_DP, \
139       { \
140         (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
141         (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
142       } \
143     }, \
144     DEVICE_PATH_MESSAGING_PC_ANSI \
145   }
146 
147 #define PCI_CLASS_SCC          0x07
148 #define PCI_SUBCLASS_SERIAL    0x00
149 #define PCI_IF_16550           0x02
150 #define IS_PCI_16550SERIAL(_p)           IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
151 #define IS_PCI_ISA_PDECODE(_p)        IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
152 
153 typedef struct {
154   EFI_DEVICE_PATH_PROTOCOL  *DevicePath;
155   UINTN                     ConnectType;
156 } PLATFORM_CONSOLE_CONNECT_ENTRY;
157 
158 #define CONSOLE_OUT BIT0
159 #define CONSOLE_IN  BIT1
160 #define STD_ERROR   BIT2
161 extern PLATFORM_CONSOLE_CONNECT_ENTRY  gPlatformConsole[];
162 
163 //
164 // Platform BDS Functions
165 //
166 
167 VOID
168 PlatformInitializeConsole (
169   IN PLATFORM_CONSOLE_CONNECT_ENTRY   *PlatformConsole
170   );
171 
172 /**
173   Loads and boots UEFI Linux via the FwCfg interface.
174 
175   @retval    EFI_NOT_FOUND - The Linux kernel was not found
176 
177 **/
178 EFI_STATUS
179 TryRunningQemuKernel (
180   VOID
181   );
182 
183 #endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
184