1 /** @file 2 CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol. 3 4 Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR> 5 This program and the accompanying materials 6 are licensed and made available under the terms and conditions of the BSD License 7 which accompanies this distribution. The full text of the license may be found at 8 http://opensource.org/licenses/bsd-license.php 9 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 13 **/ 14 15 #ifndef _CPU_DXE_H_ 16 #define _CPU_DXE_H_ 17 18 #include <PiDxe.h> 19 20 #include <Protocol/Cpu.h> 21 #include <Protocol/MpService.h> 22 23 #include <Ppi/SecPlatformInformation.h> 24 #include <Ppi/SecPlatformInformation2.h> 25 26 #include <Library/UefiDriverEntryPoint.h> 27 #include <Library/UefiBootServicesTableLib.h> 28 #include <Library/DxeServicesTableLib.h> 29 #include <Library/BaseLib.h> 30 #include <Library/CpuLib.h> 31 #include <Library/BaseMemoryLib.h> 32 #include <Library/MemoryAllocationLib.h> 33 #include <Library/DebugLib.h> 34 #include <Library/MtrrLib.h> 35 #include <Library/LocalApicLib.h> 36 #include <Library/UefiCpuLib.h> 37 #include <Library/UefiLib.h> 38 #include <Library/CpuExceptionHandlerLib.h> 39 #include <Library/HobLib.h> 40 #include <Library/ReportStatusCodeLib.h> 41 #include <Library/MpInitLib.h> 42 43 #include <Guid/IdleLoopEvent.h> 44 #include <Guid/VectorHandoffTable.h> 45 46 #define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \ 47 EFI_MEMORY_WC | \ 48 EFI_MEMORY_WT | \ 49 EFI_MEMORY_WB | \ 50 EFI_MEMORY_UCE \ 51 ) 52 53 54 /** 55 Flush CPU data cache. If the instruction cache is fully coherent 56 with all DMA operations then function can just return EFI_SUCCESS. 57 58 @param This Protocol instance structure 59 @param Start Physical address to start flushing from. 60 @param Length Number of bytes to flush. Round up to chipset 61 granularity. 62 @param FlushType Specifies the type of flush operation to perform. 63 64 @retval EFI_SUCCESS If cache was flushed 65 @retval EFI_UNSUPPORTED If flush type is not supported. 66 @retval EFI_DEVICE_ERROR If requested range could not be flushed. 67 68 **/ 69 EFI_STATUS 70 EFIAPI 71 CpuFlushCpuDataCache ( 72 IN EFI_CPU_ARCH_PROTOCOL *This, 73 IN EFI_PHYSICAL_ADDRESS Start, 74 IN UINT64 Length, 75 IN EFI_CPU_FLUSH_TYPE FlushType 76 ); 77 78 /** 79 Enables CPU interrupts. 80 81 @param This Protocol instance structure 82 83 @retval EFI_SUCCESS If interrupts were enabled in the CPU 84 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU. 85 86 **/ 87 EFI_STATUS 88 EFIAPI 89 CpuEnableInterrupt ( 90 IN EFI_CPU_ARCH_PROTOCOL *This 91 ); 92 93 /** 94 Disables CPU interrupts. 95 96 @param This Protocol instance structure 97 98 @retval EFI_SUCCESS If interrupts were disabled in the CPU. 99 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU. 100 101 **/ 102 EFI_STATUS 103 EFIAPI 104 CpuDisableInterrupt ( 105 IN EFI_CPU_ARCH_PROTOCOL *This 106 ); 107 108 /** 109 Return the state of interrupts. 110 111 @param This Protocol instance structure 112 @param State Pointer to the CPU's current interrupt state 113 114 @retval EFI_SUCCESS If interrupts were disabled in the CPU. 115 @retval EFI_INVALID_PARAMETER State is NULL. 116 117 **/ 118 EFI_STATUS 119 EFIAPI 120 CpuGetInterruptState ( 121 IN EFI_CPU_ARCH_PROTOCOL *This, 122 OUT BOOLEAN *State 123 ); 124 125 /** 126 Generates an INIT to the CPU. 127 128 @param This Protocol instance structure 129 @param InitType Type of CPU INIT to perform 130 131 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be 132 seen. 133 @retval EFI_DEVICE_ERROR If CPU INIT failed. 134 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported. 135 136 **/ 137 EFI_STATUS 138 EFIAPI 139 CpuInit ( 140 IN EFI_CPU_ARCH_PROTOCOL *This, 141 IN EFI_CPU_INIT_TYPE InitType 142 ); 143 144 /** 145 Registers a function to be called from the CPU interrupt handler. 146 147 @param This Protocol instance structure 148 @param InterruptType Defines which interrupt to hook. IA-32 149 valid range is 0x00 through 0xFF 150 @param InterruptHandler A pointer to a function of type 151 EFI_CPU_INTERRUPT_HANDLER that is called 152 when a processor interrupt occurs. A null 153 pointer is an error condition. 154 155 @retval EFI_SUCCESS If handler installed or uninstalled. 156 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler 157 for InterruptType was previously installed. 158 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for 159 InterruptType was not previously installed. 160 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType 161 is not supported. 162 163 **/ 164 EFI_STATUS 165 EFIAPI 166 CpuRegisterInterruptHandler ( 167 IN EFI_CPU_ARCH_PROTOCOL *This, 168 IN EFI_EXCEPTION_TYPE InterruptType, 169 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler 170 ); 171 172 /** 173 Returns a timer value from one of the CPU's internal timers. There is no 174 inherent time interval between ticks but is a function of the CPU frequency. 175 176 @param This - Protocol instance structure. 177 @param TimerIndex - Specifies which CPU timer is requested. 178 @param TimerValue - Pointer to the returned timer value. 179 @param TimerPeriod - A pointer to the amount of time that passes 180 in femtoseconds (10-15) for each increment 181 of TimerValue. If TimerValue does not 182 increment at a predictable rate, then 0 is 183 returned. The amount of time that has 184 passed between two calls to GetTimerValue() 185 can be calculated with the formula 186 (TimerValue2 - TimerValue1) * TimerPeriod. 187 This parameter is optional and may be NULL. 188 189 @retval EFI_SUCCESS - If the CPU timer count was returned. 190 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers. 191 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer. 192 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL. 193 194 **/ 195 EFI_STATUS 196 EFIAPI 197 CpuGetTimerValue ( 198 IN EFI_CPU_ARCH_PROTOCOL *This, 199 IN UINT32 TimerIndex, 200 OUT UINT64 *TimerValue, 201 OUT UINT64 *TimerPeriod OPTIONAL 202 ); 203 204 /** 205 Set memory cacheability attributes for given range of memeory. 206 207 @param This Protocol instance structure 208 @param BaseAddress Specifies the start address of the 209 memory range 210 @param Length Specifies the length of the memory range 211 @param Attributes The memory cacheability for the memory range 212 213 @retval EFI_SUCCESS If the cacheability of that memory range is 214 set successfully 215 @retval EFI_UNSUPPORTED If the desired operation cannot be done 216 @retval EFI_INVALID_PARAMETER The input parameter is not correct, 217 such as Length = 0 218 219 **/ 220 EFI_STATUS 221 EFIAPI 222 CpuSetMemoryAttributes ( 223 IN EFI_CPU_ARCH_PROTOCOL *This, 224 IN EFI_PHYSICAL_ADDRESS BaseAddress, 225 IN UINT64 Length, 226 IN UINT64 Attributes 227 ); 228 229 /** 230 Initialize Global Descriptor Table. 231 232 **/ 233 VOID 234 InitGlobalDescriptorTable ( 235 VOID 236 ); 237 238 /** 239 Sets the code selector (CS). 240 241 @param Selector Value of code selector. 242 243 **/ 244 VOID 245 EFIAPI 246 SetCodeSelector ( 247 UINT16 Selector 248 ); 249 250 /** 251 Sets the data selector (DS). 252 253 @param Selector Value of data selector. 254 255 **/ 256 VOID 257 EFIAPI 258 SetDataSelectors ( 259 UINT16 Selector 260 ); 261 262 #endif 263 264