1/*++ 2 3Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved 4 5 This program and the accompanying materials are licensed and made available under 6 the terms and conditions of the BSD License that accompanies this distribution. 7 The full text of the license may be found at 8 http://opensource.org/licenses/bsd-license.php. 9 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 13 14 15Module Name: 16 17 Facp.c 18 19 20Abstract: The fixed ACPI description Table (FADT) Structure 21 22 23--*/ 24#ifdef ECP_FLAG 25#include "EDKIIGlueDxe.h" 26#else 27#include <PiDxe.h> 28#endif 29#include <IndustryStandard/Acpi50.h> 30#include "AcpiTablePlatform.h" 31 32EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = { 33 { 34 EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, 35 sizeof (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE), 36 EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, 37 0, // to make sum of entire table == 0 38 EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field 39 EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) 40 EFI_ACPI_OEM_REVISION, // OEM revision number 41 EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID 42 EFI_ACPI_CREATOR_REVISION // ASL compiler revision number 43 }, 44 0, // Physical addesss of FACS 45 0, // Physical address of DSDT 46 INT_MODEL, // System Interrupt Model (ignored in 2k and later, must be 0 for 98) 47 PM_PROFILE, // Preferred PM Profile 48 SCI_INT_VECTOR, // System vector of SCI interrupt 49 SMI_CMD_IO_PORT, // Port address of SMI command port 50 ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI 51 ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI 52 S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state 53 PSTATE_CNT, // PState control 54 PM1a_EVT_BLK, // Port address of Power Mgt 1a Event Reg Blk 55 PM1b_EVT_BLK, // Port address of Power Mgt 1b Event Reg Blk 56 PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk 57 PM1b_CNT_BLK, // Port address of Power Mgt 1b Ctrl Reg Blk 58 PM2_CNT_BLK, // Port address of Power Mgt 2 Ctrl Reg Blk 59 PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk 60 GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk 61 GPE1_BLK, // Port addr of General Purpose Event 1 Reg Blk 62 PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk 63 PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk 64 PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk 65 PM_TM_LEN, // Byte Length of ports at pm_tm_blk 66 GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk 67 GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk 68 GPE1_BASE, // offset in gpe model where gpe1 events start 69 CST_CNT, // _CST support 70 P_LVL2_LAT, // worst case HW latency to enter/exit C2 state 71 P_LVL3_LAT, // worst case HW latency to enter/exit C3 state 72 FLUSH_SIZE, // Size of area read to flush caches 73 FLUSH_STRIDE, // Stride used in flushing caches 74 DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg 75 DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg 76 DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM 77 MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM 78 CENTURY, // index to century in RTC CMOS RAM 79 IAPC_BOOT_ARCH, // IA-PCI Boot Architecture Flag 80 RESERVED, // reserved 81 FLAG, 82 { 83 EFI_ACPI_5_0_SYSTEM_IO, 84 8, 85 0, 86 0, 87 0xCF9 88 }, 89 0x0E, // Hardware reset value 90 0, 0, 0, // Reserved 91 0, // XFirmwareCtrl 92 0, // XDsdt 93 // 94 // X_PM1a Event Register Block 95 // 96 EFI_ACPI_5_0_SYSTEM_IO, 97 0x20, 98 0x00, 99 EFI_ACPI_3_0_DWORD, 100 PM1a_EVT_BLK, 101 102 // 103 // X_PM1b Event Register Block 104 // 105 EFI_ACPI_5_0_SYSTEM_IO, 106 0x00, 107 0x00, 108 EFI_ACPI_RESERVED_BYTE, 109 PM1b_EVT_BLK, 110 111 // 112 // X_PM1a Control Register Block 113 // 114 EFI_ACPI_5_0_SYSTEM_IO, 115 0x10, 116 0x00, 117 EFI_ACPI_3_0_WORD, 118 PM1a_CNT_BLK, 119 120 // 121 // X_PM1b Control Register Block 122 // 123 EFI_ACPI_5_0_SYSTEM_IO, 124 0x00, 125 0x00, 126 EFI_ACPI_RESERVED_BYTE, 127 PM1b_CNT_BLK, 128 129 // 130 // X_PM2 Control Register Block 131 // 132 EFI_ACPI_5_0_SYSTEM_IO, 133 0x08, 134 0x00, 135 EFI_ACPI_3_0_BYTE, 136 PM2_CNT_BLK, 137 138 // 139 // X_PM Timer Control Register Block 140 // 141 EFI_ACPI_5_0_SYSTEM_IO, 142 0x20, 143 0x00, 144 EFI_ACPI_3_0_DWORD, 145 PM_TMR_BLK, 146 147 // 148 // X_General Purpose Event 0 Register Block 149 // 150 EFI_ACPI_5_0_SYSTEM_IO, 151 0x80, 152 0x00, 153 EFI_ACPI_RESERVED_BYTE, 154 GPE0_BLK, 155 156 // 157 // X_General Purpose Event 1 Register Block 158 // 159 EFI_ACPI_5_0_SYSTEM_IO, 160 0x00, 161 0x00, 162 EFI_ACPI_RESERVED_BYTE, 163 GPE1_BLK, 164 165 // 166 // Sleep Control Register Block 167 // 168 EFI_ACPI_5_0_SYSTEM_IO, 169 0x08, 170 0x00, 171 EFI_ACPI_RESERVED_BYTE, 172 0, 173 174 // 175 // Sleep Status Register Block 176 // 177 EFI_ACPI_5_0_SYSTEM_IO, 178 0x08, 179 0x00, 180 EFI_ACPI_RESERVED_BYTE, 181 0, 182}; 183 184VOID* 185ReferenceAcpiTable ( 186 VOID 187 ) 188{ 189 // 190 // Reference the table being generated to prevent the optimizer from 191 // removing the data structure from the executable 192 // 193 return (VOID*)&FACP; 194} 195