1 // Auto-generated file. Do not edit!
2 // Template: src/f32-dwconv/up-avx.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/dwconv.h>
15
16
17 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
18
xnn_f32_dwconv_ukernel_up8x9__fma3_acc2(size_t channels,size_t output_width,const float ** input,const float * weights,float * output,size_t input_stride,size_t output_increment,const union xnn_f32_output_params params[restrict static1])19 void xnn_f32_dwconv_ukernel_up8x9__fma3_acc2(
20 size_t channels,
21 size_t output_width,
22 const float** input,
23 const float* weights,
24 float* output,
25 size_t input_stride,
26 size_t output_increment,
27 const union xnn_f32_output_params params[restrict static 1])
28 {
29 assert(channels != 0);
30 assert(output_width != 0);
31
32 const __m256 vmax = _mm256_broadcast_ps((const __m128*) params->sse.max);
33 const __m256 vmin = _mm256_broadcast_ps((const __m128*) params->sse.min);
34 do {
35 const float* i0 = input[0];
36 assert(i0 != NULL);
37 const float* i1 = input[1];
38 assert(i1 != NULL);
39 const float* i2 = input[2];
40 assert(i2 != NULL);
41 const float* i3 = input[3];
42 assert(i3 != NULL);
43 const float* i4 = input[4];
44 assert(i4 != NULL);
45 const float* i5 = input[5];
46 assert(i5 != NULL);
47 const float* i6 = input[6];
48 assert(i6 != NULL);
49 const float* i7 = input[7];
50 assert(i7 != NULL);
51 const float* i8 = input[8];
52 assert(i8 != NULL);
53 input = (const float**) ((uintptr_t) input + input_stride);
54
55 size_t c = channels;
56 const float* w = weights;
57 for (; c >= 8; c -= 8) {
58 __m256 vacc01234567p0 = _mm256_load_ps(w);
59
60
61 const __m256 vi0x01234567 = _mm256_loadu_ps(i0);
62 i0 += 8;
63
64 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
65 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
66
67 const __m256 vi1x01234567 = _mm256_loadu_ps(i1);
68 i1 += 8;
69
70 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
71 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
72
73 const __m256 vi2x01234567 = _mm256_loadu_ps(i2);
74 i2 += 8;
75
76 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
77 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
78
79 const __m256 vi3x01234567 = _mm256_loadu_ps(i3);
80 i3 += 8;
81
82 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
83 vacc01234567p1 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p1);
84
85 const __m256 vi4x01234567 = _mm256_loadu_ps(i4);
86 i4 += 8;
87
88 const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
89 vacc01234567p0 = _mm256_fmadd_ps(vi4x01234567, vk4x01234567, vacc01234567p0);
90
91 const __m256 vi5x01234567 = _mm256_loadu_ps(i5);
92 i5 += 8;
93
94 const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
95 vacc01234567p1 = _mm256_fmadd_ps(vi5x01234567, vk5x01234567, vacc01234567p1);
96
97 const __m256 vi6x01234567 = _mm256_loadu_ps(i6);
98 i6 += 8;
99
100 const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
101 vacc01234567p0 = _mm256_fmadd_ps(vi6x01234567, vk6x01234567, vacc01234567p0);
102
103 const __m256 vi7x01234567 = _mm256_loadu_ps(i7);
104 i7 += 8;
105
106 const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
107 vacc01234567p1 = _mm256_fmadd_ps(vi7x01234567, vk7x01234567, vacc01234567p1);
108
109 const __m256 vi8x01234567 = _mm256_loadu_ps(i8);
110 i8 += 8;
111
112 const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
113 vacc01234567p0 = _mm256_fmadd_ps(vi8x01234567, vk8x01234567, vacc01234567p0);
114
115 w += 80;
116
117 // Add up all accumulators to vacc01234567p0
118 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
119
120 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
121 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
122
123 _mm256_storeu_ps(output, vacc01234567);
124 output += 8;
125 }
126 if XNN_UNLIKELY(c != 0) {
127 assert(c >= 1);
128 assert(c <= 7);
129 __m256i vmask = _mm256_loadu_si256((const __m256i*) &mask_table[7 - c]);
130
131 __m256 vacc01234567p0 = _mm256_load_ps(w);
132
133 const __m256 vi0x01234567 = _mm256_maskload_ps(i0, vmask);
134 const __m256 vk0x01234567 = _mm256_load_ps(w + 8);
135 vacc01234567p0 = _mm256_fmadd_ps(vi0x01234567, vk0x01234567, vacc01234567p0);
136
137 const __m256 vi1x01234567 = _mm256_maskload_ps(i1, vmask);
138 const __m256 vk1x01234567 = _mm256_load_ps(w + 16);
139 __m256 vacc01234567p1 = _mm256_mul_ps(vi1x01234567, vk1x01234567);
140
141 const __m256 vi2x01234567 = _mm256_maskload_ps(i2, vmask);
142 const __m256 vk2x01234567 = _mm256_load_ps(w + 24);
143 vacc01234567p0 = _mm256_fmadd_ps(vi2x01234567, vk2x01234567, vacc01234567p0);
144
145 const __m256 vi3x01234567 = _mm256_maskload_ps(i3, vmask);
146 const __m256 vk3x01234567 = _mm256_load_ps(w + 32);
147 vacc01234567p1 = _mm256_fmadd_ps(vi3x01234567, vk3x01234567, vacc01234567p1);
148
149 const __m256 vi4x01234567 = _mm256_maskload_ps(i4, vmask);
150 const __m256 vk4x01234567 = _mm256_load_ps(w + 40);
151 vacc01234567p0 = _mm256_fmadd_ps(vi4x01234567, vk4x01234567, vacc01234567p0);
152
153 const __m256 vi5x01234567 = _mm256_maskload_ps(i5, vmask);
154 const __m256 vk5x01234567 = _mm256_load_ps(w + 48);
155 vacc01234567p1 = _mm256_fmadd_ps(vi5x01234567, vk5x01234567, vacc01234567p1);
156
157 const __m256 vi6x01234567 = _mm256_maskload_ps(i6, vmask);
158 const __m256 vk6x01234567 = _mm256_load_ps(w + 56);
159 vacc01234567p0 = _mm256_fmadd_ps(vi6x01234567, vk6x01234567, vacc01234567p0);
160
161 const __m256 vi7x01234567 = _mm256_maskload_ps(i7, vmask);
162 const __m256 vk7x01234567 = _mm256_load_ps(w + 64);
163 vacc01234567p1 = _mm256_fmadd_ps(vi7x01234567, vk7x01234567, vacc01234567p1);
164
165 const __m256 vi8x01234567 = _mm256_maskload_ps(i8, vmask);
166 const __m256 vk8x01234567 = _mm256_load_ps(w + 72);
167 vacc01234567p0 = _mm256_fmadd_ps(vi8x01234567, vk8x01234567, vacc01234567p0);
168
169 // Add up all accumulators to vacc01234567p0
170 vacc01234567p0 = _mm256_add_ps(vacc01234567p0, vacc01234567p1);
171
172 __m256 vacc01234567 = _mm256_max_ps(vacc01234567p0, vmin);
173 vacc01234567 = _mm256_min_ps(vacc01234567, vmax);
174
175 // _mm256_maskstore_ps(output, vmask, vacc01234567); output += c; could be used here, but triggers msan failures (probably an msan bug).
176 __m128 vacc0123 = _mm256_castps256_ps128(vacc01234567);
177 if (c & 4) {
178 _mm_storeu_ps(output, vacc0123);
179 vacc0123 = _mm256_extractf128_ps(vacc01234567, 1);
180 output += 4;
181 }
182 if (c & 2) {
183 _mm_storel_pi((__m64*) output, vacc0123);
184 vacc0123 = _mm_movehl_ps(vacc0123, vacc0123);
185 output += 2;
186 }
187 if (c & 1) {
188 _mm_store_ss(output, vacc0123);
189 output += 1;
190 }
191 }
192
193 output = (float*) ((uintptr_t) output + output_increment);
194 } while (--output_width != 0);
195 }
196