1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/avx2-p5.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/raddstoreexpminusmax.h>
15
16
17 static const int32_t mask_table[14] = {-1, -1, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0};
18
xnn_f32_raddstoreexpminusmax_ukernel__avx2_p5_x72(size_t elements,const float * input,float * output,float * sum,float max)19 void xnn_f32_raddstoreexpminusmax_ukernel__avx2_p5_x72(
20 size_t elements,
21 const float* input,
22 float* output,
23 float* sum,
24 float max)
25 {
26 assert(elements % sizeof(float) == 0);
27
28 const __m256 vmagic_bias = _mm256_set1_ps(0x1.8000FEp23f);
29 // The smallest x for which expf(x) is normalized.
30 const __m256 vdenorm_cutoff = _mm256_set1_ps(-0x1.5D589Ep6f);
31 const __m256 vlog2e = _mm256_set1_ps(0x1.715476p+0f);
32 const __m256 vminus_ln2_hi = _mm256_set1_ps(-0x1.62E43p-1f);
33 const __m256 vminus_ln2_lo = _mm256_set1_ps(0x1.05C61p-29f);
34
35 const __m256 vc1 = _mm256_set1_ps(0x1.FFFFF6p-1f);
36 const __m256 vc2 = _mm256_set1_ps(0x1.FFFDC6p-2f);
37 const __m256 vc3 = _mm256_set1_ps(0x1.555A80p-3f);
38 const __m256 vc4 = _mm256_set1_ps(0x1.573A1Ap-5f);
39 const __m256 vc5 = _mm256_set1_ps(0x1.0F9F9Cp-7f);
40
41 const __m256 vi_max = _mm256_set1_ps(max);
42
43 __m256 vacc0 = _mm256_setzero_ps();
44 for (; elements >= 72 * sizeof(float); elements -= 72 * sizeof(float)) {
45 // Load 72 (9x8) inputs at a time.
46 const __m256 vi0 = _mm256_loadu_ps(input);
47 const __m256 vi1 = _mm256_loadu_ps(input + 8);
48 const __m256 vi2 = _mm256_loadu_ps(input + 16);
49 const __m256 vi3 = _mm256_loadu_ps(input + 24);
50 const __m256 vi4 = _mm256_loadu_ps(input + 32);
51 const __m256 vi5 = _mm256_loadu_ps(input + 40);
52 const __m256 vi6 = _mm256_loadu_ps(input + 48);
53 const __m256 vi7 = _mm256_loadu_ps(input + 56);
54 const __m256 vi8 = _mm256_loadu_ps(input + 64);
55 input += 72;
56
57 // Subtract maximum input x := i - i_max. This implies x <= 0.
58 const __m256 vx0 = _mm256_sub_ps(vi0, vi_max);
59 const __m256 vx1 = _mm256_sub_ps(vi1, vi_max);
60 const __m256 vx2 = _mm256_sub_ps(vi2, vi_max);
61 const __m256 vx3 = _mm256_sub_ps(vi3, vi_max);
62 const __m256 vx4 = _mm256_sub_ps(vi4, vi_max);
63 const __m256 vx5 = _mm256_sub_ps(vi5, vi_max);
64 const __m256 vx6 = _mm256_sub_ps(vi6, vi_max);
65 const __m256 vx7 = _mm256_sub_ps(vi7, vi_max);
66 const __m256 vx8 = _mm256_sub_ps(vi8, vi_max);
67
68 // Compute reduced argument elements := round(x / log(2)).
69 __m256 vn0 = _mm256_fmadd_ps(vx0, vlog2e, vmagic_bias);
70 __m256 vn1 = _mm256_fmadd_ps(vx1, vlog2e, vmagic_bias);
71 __m256 vn2 = _mm256_fmadd_ps(vx2, vlog2e, vmagic_bias);
72 __m256 vn3 = _mm256_fmadd_ps(vx3, vlog2e, vmagic_bias);
73 __m256 vn4 = _mm256_fmadd_ps(vx4, vlog2e, vmagic_bias);
74 __m256 vn5 = _mm256_fmadd_ps(vx5, vlog2e, vmagic_bias);
75 __m256 vn6 = _mm256_fmadd_ps(vx6, vlog2e, vmagic_bias);
76 __m256 vn7 = _mm256_fmadd_ps(vx7, vlog2e, vmagic_bias);
77 __m256 vn8 = _mm256_fmadd_ps(vx8, vlog2e, vmagic_bias);
78
79 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
80 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
81 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
82 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
83 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
84 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
85 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
86 const __m256 vs5 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn5), 23));
87 const __m256 vs6 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn6), 23));
88 const __m256 vs7 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn7), 23));
89 const __m256 vs8 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn8), 23));
90
91 // Subtract the large number back to get final elements := round(x / log(2)).
92 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
93 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
94 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
95 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
96 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
97 vn5 = _mm256_sub_ps(vn5, vmagic_bias);
98 vn6 = _mm256_sub_ps(vn6, vmagic_bias);
99 vn7 = _mm256_sub_ps(vn7, vmagic_bias);
100 vn8 = _mm256_sub_ps(vn8, vmagic_bias);
101
102 // Compute reduced argument t := x - elements * log(2).
103 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
104 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2_hi, vx0);
105 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2_hi, vx1);
106 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2_hi, vx2);
107 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2_hi, vx3);
108 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2_hi, vx4);
109 __m256 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2_hi, vx5);
110 __m256 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2_hi, vx6);
111 __m256 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2_hi, vx7);
112 __m256 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2_hi, vx8);
113
114 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2_lo, vt0);
115 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2_lo, vt1);
116 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2_lo, vt2);
117 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2_lo, vt3);
118 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2_lo, vt4);
119 vt5 = _mm256_fmadd_ps(vn5, vminus_ln2_lo, vt5);
120 vt6 = _mm256_fmadd_ps(vn6, vminus_ln2_lo, vt6);
121 vt7 = _mm256_fmadd_ps(vn7, vminus_ln2_lo, vt7);
122 vt8 = _mm256_fmadd_ps(vn8, vminus_ln2_lo, vt8);
123
124 // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
125 __m256 vp0 = _mm256_fmadd_ps(vc5, vt0, vc4);
126 __m256 vp1 = _mm256_fmadd_ps(vc5, vt1, vc4);
127 __m256 vp2 = _mm256_fmadd_ps(vc5, vt2, vc4);
128 __m256 vp3 = _mm256_fmadd_ps(vc5, vt3, vc4);
129 __m256 vp4 = _mm256_fmadd_ps(vc5, vt4, vc4);
130 __m256 vp5 = _mm256_fmadd_ps(vc5, vt5, vc4);
131 __m256 vp6 = _mm256_fmadd_ps(vc5, vt6, vc4);
132 __m256 vp7 = _mm256_fmadd_ps(vc5, vt7, vc4);
133 __m256 vp8 = _mm256_fmadd_ps(vc5, vt8, vc4);
134
135 vp0 = _mm256_fmadd_ps(vp0, vt0, vc3);
136 vp1 = _mm256_fmadd_ps(vp1, vt1, vc3);
137 vp2 = _mm256_fmadd_ps(vp2, vt2, vc3);
138 vp3 = _mm256_fmadd_ps(vp3, vt3, vc3);
139 vp4 = _mm256_fmadd_ps(vp4, vt4, vc3);
140 vp5 = _mm256_fmadd_ps(vp5, vt5, vc3);
141 vp6 = _mm256_fmadd_ps(vp6, vt6, vc3);
142 vp7 = _mm256_fmadd_ps(vp7, vt7, vc3);
143 vp8 = _mm256_fmadd_ps(vp8, vt8, vc3);
144
145 vp0 = _mm256_fmadd_ps(vp0, vt0, vc2);
146 vp1 = _mm256_fmadd_ps(vp1, vt1, vc2);
147 vp2 = _mm256_fmadd_ps(vp2, vt2, vc2);
148 vp3 = _mm256_fmadd_ps(vp3, vt3, vc2);
149 vp4 = _mm256_fmadd_ps(vp4, vt4, vc2);
150 vp5 = _mm256_fmadd_ps(vp5, vt5, vc2);
151 vp6 = _mm256_fmadd_ps(vp6, vt6, vc2);
152 vp7 = _mm256_fmadd_ps(vp7, vt7, vc2);
153 vp8 = _mm256_fmadd_ps(vp8, vt8, vc2);
154
155 vp0 = _mm256_fmadd_ps(vp0, vt0, vc1);
156 vp1 = _mm256_fmadd_ps(vp1, vt1, vc1);
157 vp2 = _mm256_fmadd_ps(vp2, vt2, vc1);
158 vp3 = _mm256_fmadd_ps(vp3, vt3, vc1);
159 vp4 = _mm256_fmadd_ps(vp4, vt4, vc1);
160 vp5 = _mm256_fmadd_ps(vp5, vt5, vc1);
161 vp6 = _mm256_fmadd_ps(vp6, vt6, vc1);
162 vp7 = _mm256_fmadd_ps(vp7, vt7, vc1);
163 vp8 = _mm256_fmadd_ps(vp8, vt8, vc1);
164
165 // Reconstruct the final f value:
166 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
167 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
168 // = s + (t * s) * p
169 vt0 = _mm256_mul_ps(vt0, vs0);
170 vt1 = _mm256_mul_ps(vt1, vs1);
171 vt2 = _mm256_mul_ps(vt2, vs2);
172 vt3 = _mm256_mul_ps(vt3, vs3);
173 vt4 = _mm256_mul_ps(vt4, vs4);
174 vt5 = _mm256_mul_ps(vt5, vs5);
175 vt6 = _mm256_mul_ps(vt6, vs6);
176 vt7 = _mm256_mul_ps(vt7, vs7);
177 vt8 = _mm256_mul_ps(vt8, vs8);
178
179 __m256 vf0 = _mm256_fmadd_ps(vt0, vp0, vs0);
180 __m256 vf1 = _mm256_fmadd_ps(vt1, vp1, vs1);
181 __m256 vf2 = _mm256_fmadd_ps(vt2, vp2, vs2);
182 __m256 vf3 = _mm256_fmadd_ps(vt3, vp3, vs3);
183 __m256 vf4 = _mm256_fmadd_ps(vt4, vp4, vs4);
184 __m256 vf5 = _mm256_fmadd_ps(vt5, vp5, vs5);
185 __m256 vf6 = _mm256_fmadd_ps(vt6, vp6, vs6);
186 __m256 vf7 = _mm256_fmadd_ps(vt7, vp7, vs7);
187 __m256 vf8 = _mm256_fmadd_ps(vt8, vp8, vs8);
188
189 // For inputs below zero cutoff, replace output with +0.0f.
190 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
191 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vx0, vdenorm_cutoff, _CMP_LT_OS), vf0);
192 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vx1, vdenorm_cutoff, _CMP_LT_OS), vf1);
193 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vx2, vdenorm_cutoff, _CMP_LT_OS), vf2);
194 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vx3, vdenorm_cutoff, _CMP_LT_OS), vf3);
195 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vx4, vdenorm_cutoff, _CMP_LT_OS), vf4);
196 vf5 = _mm256_andnot_ps(_mm256_cmp_ps(vx5, vdenorm_cutoff, _CMP_LT_OS), vf5);
197 vf6 = _mm256_andnot_ps(_mm256_cmp_ps(vx6, vdenorm_cutoff, _CMP_LT_OS), vf6);
198 vf7 = _mm256_andnot_ps(_mm256_cmp_ps(vx7, vdenorm_cutoff, _CMP_LT_OS), vf7);
199 vf8 = _mm256_andnot_ps(_mm256_cmp_ps(vx8, vdenorm_cutoff, _CMP_LT_OS), vf8);
200
201 // Store 72 (9x8) outputs at a time.
202 _mm256_storeu_ps(output, vf0);
203 _mm256_storeu_ps(output + 8, vf1);
204 _mm256_storeu_ps(output + 16, vf2);
205 _mm256_storeu_ps(output + 24, vf3);
206 _mm256_storeu_ps(output + 32, vf4);
207 _mm256_storeu_ps(output + 40, vf5);
208 _mm256_storeu_ps(output + 48, vf6);
209 _mm256_storeu_ps(output + 56, vf7);
210 _mm256_storeu_ps(output + 64, vf8);
211 output += 72;
212
213 // Accumulate computed exponents.
214 vacc0 = _mm256_add_ps(vacc0, vf0);
215 vacc0 = _mm256_add_ps(vacc0, vf1);
216 vacc0 = _mm256_add_ps(vacc0, vf2);
217 vacc0 = _mm256_add_ps(vacc0, vf3);
218 vacc0 = _mm256_add_ps(vacc0, vf4);
219 vacc0 = _mm256_add_ps(vacc0, vf5);
220 vacc0 = _mm256_add_ps(vacc0, vf6);
221 vacc0 = _mm256_add_ps(vacc0, vf7);
222 vacc0 = _mm256_add_ps(vacc0, vf8);
223 }
224
225 __m256 vacc = vacc0;
226 for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
227 // Load 8 inputs at a time.
228 const __m256 vi = _mm256_loadu_ps(input);
229 input += 8;
230
231 // Subtract maximum input x := i - i_max. This implies x <= 0.
232 const __m256 vx = _mm256_sub_ps(vi, vi_max);
233
234 // Compute reduced argument elements := round(x / log(2)).
235 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
236
237 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
238 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
239 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
240
241 // Subtract the large number back to get final elements := round(x / log(2)).
242 vn = _mm256_sub_ps(vn, vmagic_bias);
243
244 // Compute reduced argument t := x - elements * log(2).
245 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
246 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx);
247 vt = _mm256_fmadd_ps(vn, vminus_ln2_lo, vt);
248
249 // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
250 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
251 vp = _mm256_fmadd_ps(vp, vt, vc3);
252 vp = _mm256_fmadd_ps(vp, vt, vc2);
253 vp = _mm256_fmadd_ps(vp, vt, vc1);
254
255 // Reconstruct the final f value:
256 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
257 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
258 // = s + (t * s) * p
259 vt = _mm256_mul_ps(vt, vs);
260 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
261
262 // For inputs below zero cutoff, replace output with +0.0f.
263 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
264 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
265
266 // Store 8 outputs at a time.
267 _mm256_storeu_ps(output, vf);
268 output += 8;
269
270 // Accumulate computed exponents.
271 vacc = _mm256_add_ps(vacc, vf);
272 }
273 if (elements != 0) {
274 assert(elements >= 1 * sizeof(float));
275 assert(elements <= 7 * sizeof(float));
276 const __m256i vmask = _mm256_loadu_si256((const __m256i*) ((uintptr_t) &mask_table[7] - elements));
277
278 // Load up to 7 inputs at a time.
279 const __m256 vi = _mm256_maskload_ps(input, vmask);
280
281 // Subtract maximum input x := i - i_max. This implies x <= 0.
282 const __m256 vx = _mm256_sub_ps(vi, vi_max);
283
284 // Compute reduced argument elements := round(x / log(2)).
285 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
286
287 // Create a floating-point number s (scale) such that s == 2**elements for inputs which don't cause underflow, i.e.
288 // -87.33642 <= x <= 0.0, and -126 <= elements <= 0 accordingly.
289 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
290
291 // Subtract the large number back to get final elements := round(x / log(2)).
292 vn = _mm256_sub_ps(vn, vmagic_bias);
293
294 // Compute reduced argument t := x - elements * log(2).
295 // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
296 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2_hi, vx);
297 vt = _mm256_fmadd_ps(vn, vminus_ln2_lo, vt);
298
299 // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
300 __m256 vp = _mm256_fmadd_ps(vc5, vt, vc4);
301 vp = _mm256_fmadd_ps(vp, vt, vc3);
302 vp = _mm256_fmadd_ps(vp, vt, vc2);
303 vp = _mm256_fmadd_ps(vp, vt, vc1);
304
305 // Reconstruct the final f value:
306 // f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
307 // = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
308 // = s + (t * s) * p
309 vt = _mm256_mul_ps(vt, vs);
310 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
311
312 // For inputs below zero cutoff, replace output with +0.0f.
313 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
314 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
315
316 // Store up to 7 outputs at a time.
317 _mm256_maskstore_ps(output, vmask, vf);
318
319 // Accumulate computed exponents. And addend with mask to leave unmasked 32-bit lanes unchanged.
320 vacc = _mm256_add_ps(vacc, _mm256_and_ps(vf, _mm256_castsi256_ps(vmask)));
321 }
322 // Reduce 8 elements in the SIMD register
323 __m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1));
324 vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo));
325 vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo));
326 _mm_store_ss(sum, vacc_lo);
327 _mm256_zeroupper();
328 }
329