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1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16 
17 
18 extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
19 
xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4(size_t elements,const float * input,float * output,float * sum,float max)20 void xnn_f32_raddstoreexpminusmax_ukernel__neon_lut64_p2_x16_acc4(
21     size_t elements,
22     const float* input,
23     float* output,
24     float* sum,
25     float max)
26 {
27   assert(elements % sizeof(float) == 0);
28 
29   const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
30   // The smallest x for which expf(x) is normalized.
31   const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
32   const float32x4_t vlog2e_x64  = vmovq_n_f32(0x1.715476p6f);
33   // Last 13 bits are zeroes
34   const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.630000p-7f);
35   const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.BD0106p-19f);
36 
37   const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
38 
39   const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
40 
41   const float32x4_t vi_max = vdupq_n_f32(max);
42 
43   float32x4_t vacc0 = vmovq_n_f32(0.0f);
44   float32x4_t vacc1 = vmovq_n_f32(0.0f);
45   float32x4_t vacc2 = vmovq_n_f32(0.0f);
46   float32x4_t vacc3 = vmovq_n_f32(0.0f);
47   for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
48     // Load 16 (4x4) inputs at a time.
49     const float32x4_t vi0123 = vld1q_f32(input); input += 4;
50     const float32x4_t vi4567 = vld1q_f32(input); input += 4;
51     const float32x4_t vi89AB = vld1q_f32(input); input += 4;
52     const float32x4_t viCDEF = vld1q_f32(input); input += 4;
53 
54     // Subtract maximum input x := i - i_max. This implies x <= 0.
55     const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
56     const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
57     const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
58     const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
59 
60     // Compute reduced argument n := round(x * 64 / log(2)).
61     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
62     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
63     // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
64     // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
65     // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
66     // algorithm.
67     float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vx0123, vlog2e_x64);
68     float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vx4567, vlog2e_x64);
69     float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
70     float32x4_t vnCDEF = vmlaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
71 
72     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
73     // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
74     // e := int(n / 64). We create s in two steps:
75     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
76     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
77     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
78     //    number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
79     //    and thus the adjusted exponent is not lower than -126.
80     //
81     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
82     const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
83     const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
84     const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
85     const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
86 
87     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
88     const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
89     const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
90     const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
91     const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
92     const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
93     const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
94     const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
95     const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
96     const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
97     const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
98     const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
99     const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
100 
101     float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
102     float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
103     float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
104     float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
105     float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
106     float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
107     float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
108     float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
109 
110     vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
111     vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
112     const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
113     vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
114     vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
115     const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
116     vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
117     vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
118     const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
119     vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
120     vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
121     const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
122 
123     // Adjust exponent of the value l fetched from the table to get the final s value.
124     const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
125     const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
126     const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
127     const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
128 
129     // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
130     vn0123 = vsubq_f32(vn0123, vmagic_bias);
131     vn4567 = vsubq_f32(vn4567, vmagic_bias);
132     vn89AB = vsubq_f32(vn89AB, vmagic_bias);
133     vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
134 
135     // Compute reduced argument t := x - n * log(2) / 64.
136     // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
137     float32x4_t vt0123 = vmlaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
138     float32x4_t vt4567 = vmlaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
139     float32x4_t vt89AB = vmlaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
140     float32x4_t vtCDEF = vmlaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
141 
142     vt0123 = vmlaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
143     vt4567 = vmlaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
144     vt89AB = vmlaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
145     vtCDEF = vmlaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
146 
147     // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
148     float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
149     float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
150     float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
151     float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
152 
153     vp0123 = vmlaq_f32(vt0123, vt0123, vp0123);
154     vp4567 = vmlaq_f32(vt4567, vt4567, vp4567);
155     vp89AB = vmlaq_f32(vt89AB, vt89AB, vp89AB);
156     vpCDEF = vmlaq_f32(vtCDEF, vtCDEF, vpCDEF);
157 
158     // Reconstruct the final f value:
159     //   f = s * (1 + t * (1 + t * c2))
160     //     = s * (1 + t + t * (t * c2))
161     //     = s + s * (t + t * (t * c2))
162     //     = s + s * p
163     float32x4_t vf0123 = vmlaq_f32(vs0123, vs0123, vp0123);
164     float32x4_t vf4567 = vmlaq_f32(vs4567, vs4567, vp4567);
165     float32x4_t vf89AB = vmlaq_f32(vs89AB, vs89AB, vp89AB);
166     float32x4_t vfCDEF = vmlaq_f32(vsCDEF, vsCDEF, vpCDEF);
167 
168     // For inputs below denormal cutoff, replace output with +0.0f.
169     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
170     vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
171     vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
172     vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
173     vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
174 
175     // Store 16 (4x4) outputs at a time.
176     vst1q_f32(output, vf0123); output += 4;
177     vst1q_f32(output, vf4567); output += 4;
178     vst1q_f32(output, vf89AB); output += 4;
179     vst1q_f32(output, vfCDEF); output += 4;
180 
181     // Accumulate computed exponents.
182     vacc0 = vaddq_f32(vacc0, vf0123);
183     vacc0 = vaddq_f32(vacc0, vf4567);
184     vacc0 = vaddq_f32(vacc0, vf89AB);
185     vacc0 = vaddq_f32(vacc0, vfCDEF);
186   }
187   // Add up all accumulators to vacc0
188   vacc0 = vaddq_f32(vacc0, vacc1);
189   vacc2 = vaddq_f32(vacc2, vacc3);
190   vacc0 = vaddq_f32(vacc0, vacc2);
191 
192   float32x4_t vacc = vacc0;
193   for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
194     // Load 4 inputs at a time.
195     const float32x4_t vi = vld1q_f32(input); input += 4;
196 
197     // Subtract maximum input x := i - i_max. This implies x <= 0.
198     const float32x4_t vx = vsubq_f32(vi, vi_max);
199 
200     // Compute reduced argument n := round(x * 64 / log(2)).
201     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
202     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
203     // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
204     // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
205     // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
206     // algorithm.
207     float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
208 
209     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
210     // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
211     // e := int(n / 64). We create s in two steps:
212     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
213     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
214     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
215     //    number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
216     //    and thus the adjusted exponent is not lower than -126.
217     //
218     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
219     const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
220 
221     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
222     const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
223     const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
224     const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
225     float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
226     float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
227     vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
228     vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
229     const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
230     // Adjust exponent of the value l fetched from the table to get the final s value.
231     const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
232 
233     // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
234     vn = vsubq_f32(vn, vmagic_bias);
235 
236     // Compute reduced argument t := x - n * log(2) / 64.
237     // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
238     float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
239     vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
240 
241     // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
242     float32x4_t vp = vmulq_f32(vt, vc2);
243     vp = vmlaq_f32(vt, vt, vp);
244 
245     // Reconstruct the final f value:
246     //   f = s * (1 + t * (1 + t * c2))
247     //     = s * (1 + t + t * (t * c2))
248     //     = s + s * (t + t * (t * c2))
249     //     = s + s * p
250     float32x4_t vf = vmlaq_f32(vs, vs, vp);
251 
252     // For inputs below denormal cutoff, replace output with +0.0f.
253     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
254     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
255 
256     // Store 4 outputs at a time.
257     vst1q_f32(output, vf); output += 4;
258 
259     // Accumulate computed exponents.
260     vacc = vaddq_f32(vacc, vf);
261   }
262 #if XNN_ARCH_ARM64
263   float vacc_lo = vaddvq_f32(vacc);
264 #else
265   float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
266 #endif
267   if (elements != 0) {
268     assert(elements >= 1 * sizeof(float));
269     assert(elements <= 3 * sizeof(float));
270     // Load 4 inputs at a time.
271     const float32x4_t vi = vld1q_f32(input); input += 4;
272 
273     // Subtract maximum input x := i - i_max. This implies x <= 0.
274     const float32x4_t vx = vsubq_f32(vi, vi_max);
275 
276     // Compute reduced argument n := round(x * 64 / log(2)).
277     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
278     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
279     // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
280     // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
281     // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
282     // algorithm.
283     float32x4_t vn = vmlaq_f32(vmagic_bias, vx, vlog2e_x64);
284 
285     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
286     // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
287     // e := int(n / 64). We create s in two steps:
288     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
289     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
290     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
291     //    number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
292     //    and thus the adjusted exponent is not lower than -126.
293     //
294     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
295     const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
296 
297     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
298     const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
299     const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
300     const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
301     float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
302     float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
303     vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
304     vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
305     const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
306     // Adjust exponent of the value l fetched from the table to get the final s value.
307     const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
308 
309     // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
310     vn = vsubq_f32(vn, vmagic_bias);
311 
312     // Compute reduced argument t := x - n * log(2) / 64.
313     // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
314     float32x4_t vt = vmlaq_f32(vx, vn, vminus_ln2_o64_hi);
315     vt = vmlaq_f32(vt, vn, vminus_ln2_o64_lo);
316 
317     // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
318     float32x4_t vp = vmulq_f32(vt, vc2);
319     vp = vmlaq_f32(vt, vt, vp);
320 
321     // Reconstruct the final f value:
322     //   f = s * (1 + t * (1 + t * c2))
323     //     = s * (1 + t + t * (t * c2))
324     //     = s + s * (t + t * (t * c2))
325     //     = s + s * p
326     float32x4_t vf = vmlaq_f32(vs, vs, vp);
327 
328     // For inputs below denormal cutoff, replace output with +0.0f.
329     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
330     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
331 
332     float32x2_t vf_lo = vget_low_f32(vf);
333     if (elements & (2 * sizeof(float))) {
334       // Store 2 outputs at a time.
335       vst1_f32(output, vf_lo); output += 2;
336 
337       // Accumulate 2 computed exponents.
338       #if XNN_ARCH_ARM64
339         vacc_lo += vaddv_f32(vf_lo);
340       #else
341         vacc_lo = vadd_f32(vacc_lo, vf_lo);
342       #endif
343 
344       vf_lo = vget_high_f32(vf);
345     }
346     if (elements & (1 * sizeof(float))) {
347       // Store 1 output at a time.
348       vst1_lane_f32(output, vf_lo, 0);
349 
350       // Accumulate 1 computed exponent.
351       #if XNN_ARCH_ARM64
352         vacc_lo += vget_lane_f32(vf_lo, 0);
353       #else
354         vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
355       #endif
356     }
357   }
358   // Reduce 4 elements in the SIMD register
359 #if XNN_ARCH_ARM64
360   *sum = vacc_lo;
361 #else
362   vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
363 #endif
364 }
365