1 // Auto-generated file. Do not edit!
2 // Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <arm_neon.h>
13
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
18 extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
19
xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5(size_t elements,const float * input,float * output,float * sum,float max)20 void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x20_acc5(
21 size_t elements,
22 const float* input,
23 float* output,
24 float* sum,
25 float max)
26 {
27 assert(elements % sizeof(float) == 0);
28
29 const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
30 // The smallest x for which expf(x) is normalized.
31 const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
32 const float32x4_t vlog2e_x64 = vmovq_n_f32(0x1.715476p6f);
33 const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
34 const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
35
36 const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
37
38 const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
39
40 const float32x4_t vi_max = vdupq_n_f32(max);
41
42 float32x4_t vacc0 = vmovq_n_f32(0.0f);
43 float32x4_t vacc1 = vmovq_n_f32(0.0f);
44 float32x4_t vacc2 = vmovq_n_f32(0.0f);
45 float32x4_t vacc3 = vmovq_n_f32(0.0f);
46 float32x4_t vacc4 = vmovq_n_f32(0.0f);
47 for (; elements >= 20 * sizeof(float); elements -= 20 * sizeof(float)) {
48 // Load 20 (5x4) inputs at a time.
49 const float32x4_t vi0123 = vld1q_f32(input); input += 4;
50 const float32x4_t vi4567 = vld1q_f32(input); input += 4;
51 const float32x4_t vi89AB = vld1q_f32(input); input += 4;
52 const float32x4_t viCDEF = vld1q_f32(input); input += 4;
53 const float32x4_t viGHIJ = vld1q_f32(input); input += 4;
54
55 // Subtract maximum input x := i - i_max. This implies x <= 0.
56 const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
57 const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
58 const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
59 const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
60 const float32x4_t vxGHIJ = vsubq_f32(viGHIJ, vi_max);
61
62 // Compute reduced argument n := round(x * 64 / log(2)).
63 // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
64 // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
65 // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
66 // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
67 // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
68 // algorithm.
69 float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
70 float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
71 float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e_x64);
72 float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e_x64);
73 float32x4_t vnGHIJ = vfmaq_f32(vmagic_bias, vxGHIJ, vlog2e_x64);
74
75 // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
76 // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
77 // e := int(n / 64). We create s in two steps:
78 // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
79 // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
80 // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
81 // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
82 // and thus the adjusted exponent is not lower than -126.
83 //
84 // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
85 const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
86 const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
87 const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
88 const int32x4_t veCDEF = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnCDEF), vmovq_n_s32(INT32_C(0x3F))), 17);
89 const int32x4_t veGHIJ = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vnGHIJ), vmovq_n_s32(INT32_C(0x3F))), 17);
90
91 // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
92 const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
93 const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
94 const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
95 const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
96 const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
97 const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
98 const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
99 const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
100 const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
101 const uint64x2_t vidxCDEF = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnCDEF), vindex_mask));
102 const uint64_t vidxCD = vgetq_lane_u64(vidxCDEF, 0);
103 const uint64_t vidxEF = vgetq_lane_u64(vidxCDEF, 1);
104 const uint64x2_t vidxGHIJ = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vnGHIJ), vindex_mask));
105 const uint64_t vidxGH = vgetq_lane_u64(vidxGHIJ, 0);
106 const uint64_t vidxIJ = vgetq_lane_u64(vidxGHIJ, 1);
107
108 float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
109 float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
110 float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
111 float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
112 float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
113 float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
114 float32x2_t vlCD = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxCD]);
115 float32x2_t vlEF = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxEF]);
116 float32x2_t vlGH = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxGH]);
117 float32x2_t vlIJ = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxIJ]);
118
119 vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
120 vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
121 const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
122 vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
123 vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
124 const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
125 vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
126 vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
127 const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
128 vlCD = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxCD >> 32)], vlCD, 1);
129 vlEF = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxEF >> 32)], vlEF, 1);
130 const float32x4_t vlCDEF = vcombine_f32(vlCD, vlEF);
131 vlGH = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxGH >> 32)], vlGH, 1);
132 vlIJ = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxIJ >> 32)], vlIJ, 1);
133 const float32x4_t vlGHIJ = vcombine_f32(vlGH, vlIJ);
134
135 // Adjust exponent of the value l fetched from the table to get the final s value.
136 const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
137 const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
138 const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
139 const float32x4_t vsCDEF = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlCDEF), veCDEF));
140 const float32x4_t vsGHIJ = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vlGHIJ), veGHIJ));
141
142 // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
143 vn0123 = vsubq_f32(vn0123, vmagic_bias);
144 vn4567 = vsubq_f32(vn4567, vmagic_bias);
145 vn89AB = vsubq_f32(vn89AB, vmagic_bias);
146 vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
147 vnGHIJ = vsubq_f32(vnGHIJ, vmagic_bias);
148
149 // Compute reduced argument t := x - n * log(2) / 64.
150 // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
151 float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
152 float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
153 float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_o64_hi);
154 float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_o64_hi);
155 float32x4_t vtGHIJ = vfmaq_f32(vxGHIJ, vnGHIJ, vminus_ln2_o64_hi);
156
157 vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
158 vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
159 vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_o64_lo);
160 vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_o64_lo);
161 vtGHIJ = vfmaq_f32(vtGHIJ, vnGHIJ, vminus_ln2_o64_lo);
162
163 // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
164 float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
165 float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
166 float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
167 float32x4_t vpCDEF = vmulq_f32(vtCDEF, vc2);
168 float32x4_t vpGHIJ = vmulq_f32(vtGHIJ, vc2);
169
170 vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
171 vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
172 vp89AB = vfmaq_f32(vt89AB, vt89AB, vp89AB);
173 vpCDEF = vfmaq_f32(vtCDEF, vtCDEF, vpCDEF);
174 vpGHIJ = vfmaq_f32(vtGHIJ, vtGHIJ, vpGHIJ);
175
176 // Reconstruct the final f value:
177 // f = s * (1 + t * (1 + t * c2))
178 // = s * (1 + t + t * (t * c2))
179 // = s + s * (t + t * (t * c2))
180 // = s + s * p
181 float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
182 float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
183 float32x4_t vf89AB = vfmaq_f32(vs89AB, vs89AB, vp89AB);
184 float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vsCDEF, vpCDEF);
185 float32x4_t vfGHIJ = vfmaq_f32(vsGHIJ, vsGHIJ, vpGHIJ);
186
187 // For inputs below denormal cutoff, replace output with +0.0f.
188 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
189 vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
190 vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
191 vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
192 vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
193 vfGHIJ = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfGHIJ), vcltq_f32(vxGHIJ, vdenorm_cutoff)));
194
195 // Store 20 (5x4) outputs at a time.
196 vst1q_f32(output, vf0123); output += 4;
197 vst1q_f32(output, vf4567); output += 4;
198 vst1q_f32(output, vf89AB); output += 4;
199 vst1q_f32(output, vfCDEF); output += 4;
200 vst1q_f32(output, vfGHIJ); output += 4;
201
202 // Accumulate computed exponents.
203 vacc0 = vaddq_f32(vacc0, vf0123);
204 vacc4 = vaddq_f32(vacc4, vf4567);
205 vacc3 = vaddq_f32(vacc3, vf89AB);
206 vacc2 = vaddq_f32(vacc2, vfCDEF);
207 vacc1 = vaddq_f32(vacc1, vfGHIJ);
208 }
209 // Add up all accumulators to vacc0
210 vacc0 = vaddq_f32(vacc0, vacc1);
211 vacc2 = vaddq_f32(vacc2, vacc3);
212 vacc0 = vaddq_f32(vacc0, vacc2);
213 vacc0 = vaddq_f32(vacc0, vacc4);
214
215 float32x4_t vacc = vacc0;
216 for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
217 // Load 4 inputs at a time.
218 const float32x4_t vi = vld1q_f32(input); input += 4;
219
220 // Subtract maximum input x := i - i_max. This implies x <= 0.
221 const float32x4_t vx = vsubq_f32(vi, vi_max);
222
223 // Compute reduced argument n := round(x * 64 / log(2)).
224 // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
225 // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
226 // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
227 // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
228 // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
229 // algorithm.
230 float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
231
232 // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
233 // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
234 // e := int(n / 64). We create s in two steps:
235 // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
236 // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
237 // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
238 // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
239 // and thus the adjusted exponent is not lower than -126.
240 //
241 // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
242 const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
243
244 // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
245 const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
246 const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
247 const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
248 float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
249 float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
250 vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
251 vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
252 const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
253 // Adjust exponent of the value l fetched from the table to get the final s value.
254 const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
255
256 // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
257 vn = vsubq_f32(vn, vmagic_bias);
258
259 // Compute reduced argument t := x - n * log(2) / 64.
260 // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
261 float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
262 vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
263
264 // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
265 float32x4_t vp = vmulq_f32(vt, vc2);
266 vp = vfmaq_f32(vt, vt, vp);
267
268 // Reconstruct the final f value:
269 // f = s * (1 + t * (1 + t * c2))
270 // = s * (1 + t + t * (t * c2))
271 // = s + s * (t + t * (t * c2))
272 // = s + s * p
273 float32x4_t vf = vfmaq_f32(vs, vs, vp);
274
275 // For inputs below denormal cutoff, replace output with +0.0f.
276 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
277 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
278
279 // Store 4 outputs at a time.
280 vst1q_f32(output, vf); output += 4;
281
282 // Accumulate computed exponents.
283 vacc = vaddq_f32(vacc, vf);
284 }
285 #if XNN_ARCH_ARM64
286 float vacc_lo = vaddvq_f32(vacc);
287 #else
288 float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
289 #endif
290 if (elements != 0) {
291 assert(elements >= 1 * sizeof(float));
292 assert(elements <= 3 * sizeof(float));
293 // Load 4 inputs at a time.
294 const float32x4_t vi = vld1q_f32(input); input += 4;
295
296 // Subtract maximum input x := i - i_max. This implies x <= 0.
297 const float32x4_t vx = vsubq_f32(vi, vi_max);
298
299 // Compute reduced argument n := round(x * 64 / log(2)).
300 // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
301 // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
302 // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
303 // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
304 // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
305 // algorithm.
306 float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
307
308 // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
309 // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
310 // e := int(n / 64). We create s in two steps:
311 // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
312 // fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
313 // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
314 // number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
315 // and thus the adjusted exponent is not lower than -126.
316 //
317 // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
318 const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
319
320 // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
321 const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
322 const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
323 const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
324 float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
325 float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
326 vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
327 vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
328 const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
329 // Adjust exponent of the value l fetched from the table to get the final s value.
330 const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
331
332 // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
333 vn = vsubq_f32(vn, vmagic_bias);
334
335 // Compute reduced argument t := x - n * log(2) / 64.
336 // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
337 float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
338 vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
339
340 // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
341 float32x4_t vp = vmulq_f32(vt, vc2);
342 vp = vfmaq_f32(vt, vt, vp);
343
344 // Reconstruct the final f value:
345 // f = s * (1 + t * (1 + t * c2))
346 // = s * (1 + t + t * (t * c2))
347 // = s + s * (t + t * (t * c2))
348 // = s + s * p
349 float32x4_t vf = vfmaq_f32(vs, vs, vp);
350
351 // For inputs below denormal cutoff, replace output with +0.0f.
352 // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
353 vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
354
355 float32x2_t vf_lo = vget_low_f32(vf);
356 if (elements & (2 * sizeof(float))) {
357 // Store 2 outputs at a time.
358 vst1_f32(output, vf_lo); output += 2;
359
360 // Accumulate 2 computed exponents.
361 #if XNN_ARCH_ARM64
362 vacc_lo += vaddv_f32(vf_lo);
363 #else
364 vacc_lo = vadd_f32(vacc_lo, vf_lo);
365 #endif
366
367 vf_lo = vget_high_f32(vf);
368 }
369 if (elements & (1 * sizeof(float))) {
370 // Store 1 output at a time.
371 vst1_lane_f32(output, vf_lo, 0);
372
373 // Accumulate 1 computed exponent.
374 #if XNN_ARCH_ARM64
375 vacc_lo += vget_lane_f32(vf_lo, 0);
376 #else
377 vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
378 #endif
379 }
380 }
381 // Reduce 4 elements in the SIMD register
382 #if XNN_ARCH_ARM64
383 *sum = vacc_lo;
384 #else
385 vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
386 #endif
387 }
388