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1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-raddstoreexpminusmax/neon-lut64-p2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16 
17 
18 extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
19 
xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8(size_t elements,const float * input,float * output,float * sum,float max)20 void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_lut64_p2_x8(
21     size_t elements,
22     const float* input,
23     float* output,
24     float* sum,
25     float max)
26 {
27   assert(elements % sizeof(float) == 0);
28 
29   const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
30   // The smallest x for which expf(x) is normalized.
31   const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
32   const float32x4_t vlog2e_x64  = vmovq_n_f32(0x1.715476p6f);
33   const float32x4_t vminus_ln2_o64_hi = vmovq_n_f32(-0x1.62e43p-7f);
34   const float32x4_t vminus_ln2_o64_lo = vmovq_n_f32(0x1.05c61p-35f);
35 
36   const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
37 
38   const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
39 
40   const float32x4_t vi_max = vdupq_n_f32(max);
41 
42   float32x4_t vacc0 = vmovq_n_f32(0.0f);
43   for (; elements >= 8 * sizeof(float); elements -= 8 * sizeof(float)) {
44     // Load 8 (2x4) inputs at a time.
45     const float32x4_t vi0123 = vld1q_f32(input); input += 4;
46     const float32x4_t vi4567 = vld1q_f32(input); input += 4;
47 
48     // Subtract maximum input x := i - i_max. This implies x <= 0.
49     const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
50     const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
51 
52     // Compute reduced argument n := round(x * 64 / log(2)).
53     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
54     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
55     // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
56     // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
57     // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
58     // algorithm.
59     float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e_x64);
60     float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e_x64);
61 
62     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
63     // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
64     // e := int(n / 64). We create s in two steps:
65     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
66     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
67     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
68     //    number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
69     //    and thus the adjusted exponent is not lower than -126.
70     //
71     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
72     const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
73     const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
74 
75     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
76     const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
77     const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
78     const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
79     const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
80     const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
81     const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
82 
83     float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
84     float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
85     float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
86     float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
87 
88     vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
89     vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
90     const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
91     vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
92     vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
93     const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
94 
95     // Adjust exponent of the value l fetched from the table to get the final s value.
96     const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
97     const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
98 
99     // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
100     vn0123 = vsubq_f32(vn0123, vmagic_bias);
101     vn4567 = vsubq_f32(vn4567, vmagic_bias);
102 
103     // Compute reduced argument t := x - n * log(2) / 64.
104     // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
105     float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_o64_hi);
106     float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_o64_hi);
107 
108     vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_o64_lo);
109     vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_o64_lo);
110 
111     // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
112     float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
113     float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
114 
115     vp0123 = vfmaq_f32(vt0123, vt0123, vp0123);
116     vp4567 = vfmaq_f32(vt4567, vt4567, vp4567);
117 
118     // Reconstruct the final f value:
119     //   f = s * (1 + t * (1 + t * c2))
120     //     = s * (1 + t + t * (t * c2))
121     //     = s + s * (t + t * (t * c2))
122     //     = s + s * p
123     float32x4_t vf0123 = vfmaq_f32(vs0123, vs0123, vp0123);
124     float32x4_t vf4567 = vfmaq_f32(vs4567, vs4567, vp4567);
125 
126     // For inputs below denormal cutoff, replace output with +0.0f.
127     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
128     vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
129     vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
130 
131     // Store 8 (2x4) outputs at a time.
132     vst1q_f32(output, vf0123); output += 4;
133     vst1q_f32(output, vf4567); output += 4;
134 
135     // Accumulate computed exponents.
136     vacc0 = vaddq_f32(vacc0, vf0123);
137     vacc0 = vaddq_f32(vacc0, vf4567);
138   }
139 
140   float32x4_t vacc = vacc0;
141   for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
142     // Load 4 inputs at a time.
143     const float32x4_t vi = vld1q_f32(input); input += 4;
144 
145     // Subtract maximum input x := i - i_max. This implies x <= 0.
146     const float32x4_t vx = vsubq_f32(vi, vi_max);
147 
148     // Compute reduced argument n := round(x * 64 / log(2)).
149     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
150     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
151     // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
152     // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
153     // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
154     // algorithm.
155     float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
156 
157     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
158     // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
159     // e := int(n / 64). We create s in two steps:
160     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
161     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
162     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
163     //    number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
164     //    and thus the adjusted exponent is not lower than -126.
165     //
166     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
167     const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
168 
169     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
170     const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
171     const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
172     const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
173     float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
174     float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
175     vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
176     vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
177     const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
178     // Adjust exponent of the value l fetched from the table to get the final s value.
179     const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
180 
181     // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
182     vn = vsubq_f32(vn, vmagic_bias);
183 
184     // Compute reduced argument t := x - n * log(2) / 64.
185     // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
186     float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
187     vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
188 
189     // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
190     float32x4_t vp = vmulq_f32(vt, vc2);
191     vp = vfmaq_f32(vt, vt, vp);
192 
193     // Reconstruct the final f value:
194     //   f = s * (1 + t * (1 + t * c2))
195     //     = s * (1 + t + t * (t * c2))
196     //     = s + s * (t + t * (t * c2))
197     //     = s + s * p
198     float32x4_t vf = vfmaq_f32(vs, vs, vp);
199 
200     // For inputs below denormal cutoff, replace output with +0.0f.
201     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
202     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
203 
204     // Store 4 outputs at a time.
205     vst1q_f32(output, vf); output += 4;
206 
207     // Accumulate computed exponents.
208     vacc = vaddq_f32(vacc, vf);
209   }
210 #if XNN_ARCH_ARM64
211   float vacc_lo = vaddvq_f32(vacc);
212 #else
213   float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
214 #endif
215   if (elements != 0) {
216     assert(elements >= 1 * sizeof(float));
217     assert(elements <= 3 * sizeof(float));
218     // Load 4 inputs at a time.
219     const float32x4_t vi = vld1q_f32(input); input += 4;
220 
221     // Subtract maximum input x := i - i_max. This implies x <= 0.
222     const float32x4_t vx = vsubq_f32(vi, vi_max);
223 
224     // Compute reduced argument n := round(x * 64 / log(2)).
225     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
226     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
227     // The trick with adding large number is valid only within certain bounds (|x * 64 / log(2)| <= 2**22, i.e.
228     // |x| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs outside of [-87.336540, 0.0]
229     // result in denormalized or underflown expf(x). We fixup the result for such inputs at the very end of the
230     // algorithm.
231     float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e_x64);
232 
233     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that expf(x) is normalized,
234     // i.e. -87.33642 <= x <= 0.0. As n has 6 fractional bits, we split s == 2**(n / 64) = 2**e * 2**(n / 64 - e), where
235     // e := int(n / 64). We create s in two steps:
236     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
237     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
238     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
239     //    number, because for -87.33642 <= x <= 0.0 (inputs for which expf(x) is normalized) we have -126 <= e <= 0,
240     //    and thus the adjusted exponent is not lower than -126.
241     //
242     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
243     const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
244 
245     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
246     const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
247     const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
248     const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
249     float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
250     float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
251     vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
252     vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
253     const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
254     // Adjust exponent of the value l fetched from the table to get the final s value.
255     const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
256 
257     // Subtract the large number back to get final n := round(x * 64 / log(2)) as a floating-point number.
258     vn = vsubq_f32(vn, vmagic_bias);
259 
260     // Compute reduced argument t := x - n * log(2) / 64.
261     // Use Cody-Waite range reduction method (note the two constants representing log(2) / 64) to improve accuracy.
262     float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_o64_hi);
263     vt = vfmaq_f32(vt, vn, vminus_ln2_o64_lo);
264 
265     // Compute degree-2 polynomial approxiatmion for exp(t) on [-log(2)/128, log(2)/128].
266     float32x4_t vp = vmulq_f32(vt, vc2);
267     vp = vfmaq_f32(vt, vt, vp);
268 
269     // Reconstruct the final f value:
270     //   f = s * (1 + t * (1 + t * c2))
271     //     = s * (1 + t + t * (t * c2))
272     //     = s + s * (t + t * (t * c2))
273     //     = s + s * p
274     float32x4_t vf = vfmaq_f32(vs, vs, vp);
275 
276     // For inputs below denormal cutoff, replace output with +0.0f.
277     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
278     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
279 
280     float32x2_t vf_lo = vget_low_f32(vf);
281     if (elements & (2 * sizeof(float))) {
282       // Store 2 outputs at a time.
283       vst1_f32(output, vf_lo); output += 2;
284 
285       // Accumulate 2 computed exponents.
286       #if XNN_ARCH_ARM64
287         vacc_lo += vaddv_f32(vf_lo);
288       #else
289         vacc_lo = vadd_f32(vacc_lo, vf_lo);
290       #endif
291 
292       vf_lo = vget_high_f32(vf);
293     }
294     if (elements & (1 * sizeof(float))) {
295       // Store 1 output at a time.
296       vst1_lane_f32(output, vf_lo, 0);
297 
298       // Accumulate 1 computed exponent.
299       #if XNN_ARCH_ARM64
300         vacc_lo += vget_lane_f32(vf_lo, 0);
301       #else
302         vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
303       #endif
304     }
305   }
306   // Reduce 4 elements in the SIMD register
307 #if XNN_ARCH_ARM64
308   *sum = vacc_lo;
309 #else
310   vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
311 #endif
312 }
313