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1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-raddstoreexpminusmax/neon-p5.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16 
17 
xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2(size_t elements,const float * input,float * output,float * sum,float max)18 void xnn_f32_raddstoreexpminusmax_ukernel__neonfma_p5_x16_acc2(
19     size_t elements,
20     const float* input,
21     float* output,
22     float* sum,
23     float max)
24 {
25   assert(elements % sizeof(float) == 0);
26 
27   const float32x4_t vmagic_bias = vmovq_n_f32(0x1.8000FEp23f);
28   // The smallest x for which expf(x) is normalized.
29   const float32x4_t vdenorm_cutoff = vmovq_n_f32(-0x1.5D589Ep6f);
30   const float32x4_t vlog2e = vmovq_n_f32(0x1.715476p+0f);
31   const float32x4_t vminus_ln2_hi = vmovq_n_f32(-0x1.62E43p-1f);
32   const float32x4_t vminus_ln2_lo = vmovq_n_f32(0x1.05C61p-29f);
33 
34   const float32x4_t vc1 = vmovq_n_f32(0x1.FFFFF6p-1f);
35   const float32x4_t vc2 = vmovq_n_f32(0x1.FFFDC6p-2f);
36   const float32x4_t vc3 = vmovq_n_f32(0x1.555A80p-3f);
37   const float32x4_t vc4 = vmovq_n_f32(0x1.573A1Ap-5f);
38   const float32x4_t vc5 = vmovq_n_f32(0x1.0F9F9Cp-7f);
39 
40   const float32x4_t vi_max = vdupq_n_f32(max);
41 
42   float32x4_t vacc0 = vmovq_n_f32(0.0f);
43   float32x4_t vacc1 = vmovq_n_f32(0.0f);
44   for (; elements >= 16 * sizeof(float); elements -= 16 * sizeof(float)) {
45     // Load 16 (4x4) inputs at a time.
46     const float32x4_t vi0123 = vld1q_f32(input); input += 4;
47     const float32x4_t vi4567 = vld1q_f32(input); input += 4;
48     const float32x4_t vi89AB = vld1q_f32(input); input += 4;
49     const float32x4_t viCDEF = vld1q_f32(input); input += 4;
50 
51     // Subtract maximum input x := i - i_max. This implies x <= 0.
52     const float32x4_t vx0123 = vsubq_f32(vi0123, vi_max);
53     const float32x4_t vx4567 = vsubq_f32(vi4567, vi_max);
54     const float32x4_t vx89AB = vsubq_f32(vi89AB, vi_max);
55     const float32x4_t vxCDEF = vsubq_f32(viCDEF, vi_max);
56 
57     // Compute reduced argument n := round(x / log(2)).
58     // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
59     // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
60     // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
61     // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
62     // of the algorithm.
63     float32x4_t vn0123 = vfmaq_f32(vmagic_bias, vx0123, vlog2e);
64     float32x4_t vn4567 = vfmaq_f32(vmagic_bias, vx4567, vlog2e);
65     float32x4_t vn89AB = vfmaq_f32(vmagic_bias, vx89AB, vlog2e);
66     float32x4_t vnCDEF = vfmaq_f32(vmagic_bias, vxCDEF, vlog2e);
67 
68     // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
69     // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
70     const float32x4_t vs0123 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn0123), 23));
71     const float32x4_t vs4567 = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn4567), 23));
72     const float32x4_t vs89AB = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn89AB), 23));
73     const float32x4_t vsCDEF = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vnCDEF), 23));
74 
75     // Subtract the large number back to get final n := round(x / log(2)).
76     vn0123 = vsubq_f32(vn0123, vmagic_bias);
77     vn4567 = vsubq_f32(vn4567, vmagic_bias);
78     vn89AB = vsubq_f32(vn89AB, vmagic_bias);
79     vnCDEF = vsubq_f32(vnCDEF, vmagic_bias);
80 
81     // Compute reduced argument t := z - n * log(2).
82     // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
83     float32x4_t vt0123 = vfmaq_f32(vx0123, vn0123, vminus_ln2_hi);
84     float32x4_t vt4567 = vfmaq_f32(vx4567, vn4567, vminus_ln2_hi);
85     float32x4_t vt89AB = vfmaq_f32(vx89AB, vn89AB, vminus_ln2_hi);
86     float32x4_t vtCDEF = vfmaq_f32(vxCDEF, vnCDEF, vminus_ln2_hi);
87 
88     vt0123 = vfmaq_f32(vt0123, vn0123, vminus_ln2_lo);
89     vt4567 = vfmaq_f32(vt4567, vn4567, vminus_ln2_lo);
90     vt89AB = vfmaq_f32(vt89AB, vn89AB, vminus_ln2_lo);
91     vtCDEF = vfmaq_f32(vtCDEF, vnCDEF, vminus_ln2_lo);
92 
93     // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
94     float32x4_t vp0123 = vfmaq_f32(vc4, vc5, vt0123);
95     float32x4_t vp4567 = vfmaq_f32(vc4, vc5, vt4567);
96     float32x4_t vp89AB = vfmaq_f32(vc4, vc5, vt89AB);
97     float32x4_t vpCDEF = vfmaq_f32(vc4, vc5, vtCDEF);
98 
99     vp0123 = vfmaq_f32(vc3, vp0123, vt0123);
100     vp4567 = vfmaq_f32(vc3, vp4567, vt4567);
101     vp89AB = vfmaq_f32(vc3, vp89AB, vt89AB);
102     vpCDEF = vfmaq_f32(vc3, vpCDEF, vtCDEF);
103 
104     vp0123 = vfmaq_f32(vc2, vp0123, vt0123);
105     vp4567 = vfmaq_f32(vc2, vp4567, vt4567);
106     vp89AB = vfmaq_f32(vc2, vp89AB, vt89AB);
107     vpCDEF = vfmaq_f32(vc2, vpCDEF, vtCDEF);
108 
109     vp0123 = vfmaq_f32(vc1, vp0123, vt0123);
110     vp4567 = vfmaq_f32(vc1, vp4567, vt4567);
111     vp89AB = vfmaq_f32(vc1, vp89AB, vt89AB);
112     vpCDEF = vfmaq_f32(vc1, vpCDEF, vtCDEF);
113 
114     // Reconstruct the final f value:
115     //   f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
116     //     = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
117     //     = s + (t * s) * p
118     vt0123 = vmulq_f32(vt0123, vs0123);
119     vt4567 = vmulq_f32(vt4567, vs4567);
120     vt89AB = vmulq_f32(vt89AB, vs89AB);
121     vtCDEF = vmulq_f32(vtCDEF, vsCDEF);
122 
123     float32x4_t vf0123 = vfmaq_f32(vs0123, vp0123, vt0123);
124     float32x4_t vf4567 = vfmaq_f32(vs4567, vp4567, vt4567);
125     float32x4_t vf89AB = vfmaq_f32(vs89AB, vp89AB, vt89AB);
126     float32x4_t vfCDEF = vfmaq_f32(vsCDEF, vpCDEF, vtCDEF);
127 
128     // For inputs below denormal cutoff, replace output with +0.0f.
129     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
130     vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcltq_f32(vx0123, vdenorm_cutoff)));
131     vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcltq_f32(vx4567, vdenorm_cutoff)));
132     vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcltq_f32(vx89AB, vdenorm_cutoff)));
133     vfCDEF = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vfCDEF), vcltq_f32(vxCDEF, vdenorm_cutoff)));
134 
135     // Store 16 (4x4) outputs at a time.
136     vst1q_f32(output, vf0123); output += 4;
137     vst1q_f32(output, vf4567); output += 4;
138     vst1q_f32(output, vf89AB); output += 4;
139     vst1q_f32(output, vfCDEF); output += 4;
140 
141     // Accumulate computed exponents.
142     vacc0 = vaddq_f32(vacc0, vf0123);
143     vacc0 = vaddq_f32(vacc0, vf4567);
144     vacc0 = vaddq_f32(vacc0, vf89AB);
145     vacc0 = vaddq_f32(vacc0, vfCDEF);
146   }
147   // Add up all accumulators to vacc0
148   vacc0 = vaddq_f32(vacc0, vacc1);
149 
150   float32x4_t vacc = vacc0;
151   for (; elements >= 4 * sizeof(float); elements -= 4 * sizeof(float)) {
152     // Load 4 inputs at a time.
153     const float32x4_t vi = vld1q_f32(input); input += 4;
154 
155     // Subtract maximum input x := i - i_max. This implies x <= 0.
156     const float32x4_t vx = vsubq_f32(vi, vi_max);
157 
158     // Compute reduced argument n := round(x / log(2)).
159     // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
160     // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
161     // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
162     // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
163     // of the algorithm.
164     float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
165 
166     // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
167     // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
168     const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
169 
170     // Subtract the large number back to get final n := round(x / log(2)).
171     vn = vsubq_f32(vn, vmagic_bias);
172 
173     // Compute reduced argument t := z - n * log(2).
174     // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
175     float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
176     vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
177 
178     // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
179     float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
180     vp = vfmaq_f32(vc3, vp, vt);
181     vp = vfmaq_f32(vc2, vp, vt);
182     vp = vfmaq_f32(vc1, vp, vt);
183 
184     // Reconstruct the final f value:
185     //   f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
186     //     = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
187     //     = s + (t * s) * p
188     vt = vmulq_f32(vt, vs);
189     float32x4_t vf = vfmaq_f32(vs, vp, vt);
190 
191     // For inputs below denormal cutoff, replace output with +0.0f.
192     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
193     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
194 
195     // Store 4 outputs at a time.
196     vst1q_f32(output, vf); output += 4;
197 
198     // Accumulate computed exponents.
199     vacc = vaddq_f32(vacc, vf);
200   }
201 #if XNN_ARCH_ARM64
202   float vacc_lo = vaddvq_f32(vacc);
203 #else
204   float32x2_t vacc_lo = vadd_f32(vget_high_f32(vacc), vget_low_f32(vacc));
205 #endif
206   if (elements != 0) {
207     assert(elements >= 1 * sizeof(float));
208     assert(elements <= 3 * sizeof(float));
209     // Load 4 inputs at a time.
210     const float32x4_t vi = vld1q_f32(input); input += 4;
211 
212     // Subtract maximum input x := i - i_max. This implies x <= 0.
213     const float32x4_t vx = vsubq_f32(vi, vi_max);
214 
215     // Compute reduced argument n := round(x / log(2)).
216     // We do it by adding a large number (magic bias), which cause rounding of result to an integer, then subtracing the
217     // large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
218     // The trick with adding large number is valid only within certain bounds (|x| <= 2**22), but thats ok, because
219     // inputs outside of [-87.336540, 0.0] underflow expf(x) anyway. We fixup the result for such inputs at the very end
220     // of the algorithm.
221     float32x4_t vn = vfmaq_f32(vmagic_bias, vx, vlog2e);
222 
223     // Create a floating-point number s (scale) such that s == 2**n for inputs which don't cause underflow, i.e.
224     // -87.33642 <= x <= 0.0, and -126 <= n <= 0 accordingly.
225     const float32x4_t vs = vreinterpretq_f32_s32(vshlq_n_s32(vreinterpretq_s32_f32(vn), 23));
226 
227     // Subtract the large number back to get final n := round(x / log(2)).
228     vn = vsubq_f32(vn, vmagic_bias);
229 
230     // Compute reduced argument t := z - n * log(2).
231     // Use Cody-Waite range reduction method (note two constants to represent log(2)) to improve accuracy.
232     float32x4_t vt = vfmaq_f32(vx, vn, vminus_ln2_hi);
233     vt = vfmaq_f32(vt, vn, vminus_ln2_lo);
234 
235     // Compute degree-5 polynomial approxiatmion for exp(t) on [-log(2)/2, log(2)/2].
236     float32x4_t vp = vfmaq_f32(vc4, vc5, vt);
237     vp = vfmaq_f32(vc3, vp, vt);
238     vp = vfmaq_f32(vc2, vp, vt);
239     vp = vfmaq_f32(vc1, vp, vt);
240 
241     // Reconstruct the final f value:
242     //   f = s * (1 + t * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5)))))
243     //     = s + (t * s) * (c1 + t * (c2 + t * (c3 + t * (c4 + t * c5))))
244     //     = s + (t * s) * p
245     vt = vmulq_f32(vt, vs);
246     float32x4_t vf = vfmaq_f32(vs, vp, vt);
247 
248     // For inputs below denormal cutoff, replace output with +0.0f.
249     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
250     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcltq_f32(vx, vdenorm_cutoff)));
251 
252     float32x2_t vf_lo = vget_low_f32(vf);
253     if (elements & (2 * sizeof(float))) {
254       // Store 2 outputs at a time.
255       vst1_f32(output, vf_lo); output += 2;
256 
257       // Accumulate 2 computed exponents.
258       #if XNN_ARCH_ARM64
259         vacc_lo += vaddv_f32(vf_lo);
260       #else
261         vacc_lo = vadd_f32(vacc_lo, vf_lo);
262       #endif
263 
264       vf_lo = vget_high_f32(vf);
265     }
266     if (elements & (1 * sizeof(float))) {
267       // Store 1 output at a time.
268       vst1_lane_f32(output, vf_lo, 0);
269 
270       // Accumulate 1 computed exponent.
271       #if XNN_ARCH_ARM64
272         vacc_lo += vget_lane_f32(vf_lo, 0);
273       #else
274         vacc_lo = vadd_f32(vacc_lo, vreinterpret_f32_u64(vshl_n_u64(vreinterpret_u64_f32(vf_lo), 32)));
275       #endif
276     }
277   }
278   // Reduce 4 elements in the SIMD register
279 #if XNN_ARCH_ARM64
280   *sum = vacc_lo;
281 #else
282   vst1_lane_f32(sum, vpadd_f32(vacc_lo, vacc_lo), 0);
283 #endif
284 }
285