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1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-sigmoid/neon-lut64-p2.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2019 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <arm_neon.h>
13 
14 #include <xnnpack/common.h>
15 #include <xnnpack/vunary.h>
16 
17 
18 extern XNN_INTERNAL const float xnn_table_exp2_k_over_64[64];
19 
xnn_f32_sigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x12(size_t n,const float * x,float * y,const void * params)20 void xnn_f32_sigmoid_ukernel__neon_rr2_lut64_p2_nr2recps_x12(
21     size_t n,
22     const float* x,
23     float* y,
24     const void* params)
25 {
26   assert(n % sizeof(float) == 0);
27 
28   const float32x4_t vmagic_bias = vmovq_n_f32(0x1.800000p23f);
29   // The largest z for which sigmoidf(-z) is normalized.
30   // This number is also the largest z for which expf(-z) is normalized.
31   const float32x4_t vdenorm_cutoff = vmovq_n_f32(0x1.5D589Ep+6f);
32   const float32x4_t vminus_log2e_x64 = vmovq_n_f32(-0x1.715476p6f);
33   // Last 13 bits are zeroes
34   const float32x4_t vln2_o64_hi = vmovq_n_f32(0x1.630000p-7f);
35   const float32x4_t vln2_o64_lo = vmovq_n_f32(-0x1.BD0106p-19f);
36   const float32x4_t vone = vmovq_n_f32(1.0f);
37 
38   const float32x4_t vc2 = vmovq_n_f32(0x1.FFFF0Ap-2f);
39 
40   const int32x4_t vindex_mask = vmovq_n_s32(INT32_C(0x3F));
41 
42   for (; n >= 12 * sizeof(float); n -= 12 * sizeof(float)) {
43     const float32x4_t vx0123 = vld1q_f32(x); x += 4;
44     const float32x4_t vx4567 = vld1q_f32(x); x += 4;
45     const float32x4_t vx89AB = vld1q_f32(x); x += 4;
46 
47     // General structure of the algorithm:
48     //           / exp(x) / (1 + exp(x)) if x <= 0
49     //   f[x] :=
50     //           \ 1 - f[-x] if x >= 0
51     //
52     // First we compute f[-z] := exp(-z) / (1 + exp(-z)) where z = abs(x),
53     // then replace result with 1 - f[-z] if x >= 0.
54     const float32x4_t vz0123 = vabsq_f32(vx0123);
55     const float32x4_t vz4567 = vabsq_f32(vx4567);
56     const float32x4_t vz89AB = vabsq_f32(vx89AB);
57 
58     // Compute reduced argument n := round(-z * 64 / log(2)).
59     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
60     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
61     // The trick with adding large number is valid only within certain bounds (|z * 64 / log(2)| <= 2**22, i.e.
62     // |z| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs x outside of [-87.336544, 17.328678]
63     // (i.e. z outsize [0, 87.336544]) underflow or saturate sigmoidf(x). We fixup the result  for such inputs at the
64     // very end of the algorithm.
65     float32x4_t vn0123 = vmlaq_f32(vmagic_bias, vz0123, vminus_log2e_x64);
66     float32x4_t vn4567 = vmlaq_f32(vmagic_bias, vz4567, vminus_log2e_x64);
67     float32x4_t vn89AB = vmlaq_f32(vmagic_bias, vz89AB, vminus_log2e_x64);
68 
69     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that sigmoidf(-z) is
70     // normalized, i.e. 0 <= z <= 87.33642. As n has 6 fractional bits, we split s == 2**(n / 64) =
71     // = 2**e * 2**(n / 64 - e), where e := int(n / 64). We create s in two steps:
72     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
73     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
74     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
75     //    number, because for 0 <= z <= 87.33642 (inputs for which sigmoidf(-z) is normalized) we have -126 <= e <= 0,
76     //    and thus the adjusted exponent is not lower than -126.
77     //
78     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
79     const int32x4_t ve0123 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn0123), vmovq_n_s32(INT32_C(0x3F))), 17);
80     const int32x4_t ve4567 = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn4567), vmovq_n_s32(INT32_C(0x3F))), 17);
81     const int32x4_t ve89AB = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn89AB), vmovq_n_s32(INT32_C(0x3F))), 17);
82 
83     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
84     const uint64x2_t vidx0123 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn0123), vindex_mask));
85     const uint64x2_t vidx4567 = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn4567), vindex_mask));
86     const uint64x2_t vidx89AB = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn89AB), vindex_mask));
87 
88     const uint64_t vidx01 = vgetq_lane_u64(vidx0123, 0);
89     const uint64_t vidx23 = vgetq_lane_u64(vidx0123, 1);
90     float32x2_t vl01 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx01]);
91     float32x2_t vl23 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx23]);
92     const uint64_t vidx45 = vgetq_lane_u64(vidx4567, 0);
93     const uint64_t vidx67 = vgetq_lane_u64(vidx4567, 1);
94     float32x2_t vl45 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx45]);
95     float32x2_t vl67 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx67]);
96     const uint64_t vidx89 = vgetq_lane_u64(vidx89AB, 0);
97     const uint64_t vidxAB = vgetq_lane_u64(vidx89AB, 1);
98     float32x2_t vl89 = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx89]);
99     float32x2_t vlAB = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidxAB]);
100 
101     vl01 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx01 >> 32)], vl01, 1);
102     vl23 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx23 >> 32)], vl23, 1);
103     const float32x4_t vl0123 = vcombine_f32(vl01, vl23);
104     vl45 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx45 >> 32)], vl45, 1);
105     vl67 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx67 >> 32)], vl67, 1);
106     const float32x4_t vl4567 = vcombine_f32(vl45, vl67);
107     vl89 = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx89 >> 32)], vl89, 1);
108     vlAB = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidxAB >> 32)], vlAB, 1);
109     const float32x4_t vl89AB = vcombine_f32(vl89, vlAB);
110 
111     // Adjust exponent of the value l fetched from the table to get the final s value.
112     const float32x4_t vs0123 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl0123), ve0123));
113     const float32x4_t vs4567 = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl4567), ve4567));
114     const float32x4_t vs89AB = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl89AB), ve89AB));
115 
116     // Subtract the large number back to get the final n := round(-z * 64 / log(2)) as a floating-point number.
117     vn0123 = vsubq_f32(vn0123, vmagic_bias);
118     vn4567 = vsubq_f32(vn4567, vmagic_bias);
119     vn89AB = vsubq_f32(vn89AB, vmagic_bias);
120 
121     // Compute reduced argument t := (z + n * log(2) / 64). Note that -t = -z - n * log(2) / 64.
122     // Use Cody-Waite range reduction method (note two constants to represent log(2) / 64) to improve accuracy.
123     float32x4_t vt0123 = vmlaq_f32(vz0123, vn0123, vln2_o64_hi);
124     float32x4_t vt4567 = vmlaq_f32(vz4567, vn4567, vln2_o64_hi);
125     float32x4_t vt89AB = vmlaq_f32(vz89AB, vn89AB, vln2_o64_hi);
126 
127     vt0123 = vmlaq_f32(vt0123, vn0123, vln2_o64_lo);
128     vt4567 = vmlaq_f32(vt4567, vn4567, vln2_o64_lo);
129     vt89AB = vmlaq_f32(vt89AB, vn89AB, vln2_o64_lo);
130 
131     // Compute degree-2 polynomial approxiatmion for exp(-t) on [-log(2)/128, log(2)/128].
132     //   P1(t) = 1 + t * (-1 + t * c2)
133     float32x4_t vp0123 = vmulq_f32(vt0123, vc2);
134     float32x4_t vp4567 = vmulq_f32(vt4567, vc2);
135     float32x4_t vp89AB = vmulq_f32(vt89AB, vc2);
136 
137     vp0123 = vmlsq_f32(vt0123, vp0123, vt0123);
138     vp4567 = vmlsq_f32(vt4567, vp4567, vt4567);
139     vp89AB = vmlsq_f32(vt89AB, vp89AB, vt89AB);
140 
141     // Reconstruct the exp(-z) value:
142     //   f = s * (1 + t * (-1 + t * c2))
143     //     = s * (1 - t + t * (t * c2))
144     //     = s - s * (t - t * (t * c2))
145     //     = s - s * p
146     const float32x4_t vy0123 = vmlsq_f32(vs0123, vs0123, vp0123);
147     const float32x4_t vy4567 = vmlsq_f32(vs4567, vs4567, vp4567);
148     const float32x4_t vy89AB = vmlsq_f32(vs89AB, vs89AB, vp89AB);
149 
150     // Denominator of the sigmoid fraction: 1.0 + exp(-z)
151     const float32x4_t vd0123 = vaddq_f32(vy0123, vone);
152     const float32x4_t vd4567 = vaddq_f32(vy4567, vone);
153     const float32x4_t vd89AB = vaddq_f32(vy89AB, vone);
154 
155     // Use Newton-Raphson method (2 iterations) to compute reciprocal of denominator.
156     // Note: 1 < d <= 2, because z >= 0.0 and 0 < exp(-z) <= 1.0.
157     // Thus the reciprocal of the denominator never overflows.
158     float32x4_t vr0123 = vrecpeq_f32(vd0123);
159     float32x4_t vr4567 = vrecpeq_f32(vd4567);
160     float32x4_t vr89AB = vrecpeq_f32(vd89AB);
161 
162     vr0123 = vmulq_f32(vr0123, vrecpsq_f32(vr0123, vd0123));
163     vr4567 = vmulq_f32(vr4567, vrecpsq_f32(vr4567, vd4567));
164     vr89AB = vmulq_f32(vr89AB, vrecpsq_f32(vr89AB, vd89AB));
165 
166     vr0123 = vmulq_f32(vr0123, vrecpsq_f32(vr0123, vd0123));
167     vr4567 = vmulq_f32(vr4567, vrecpsq_f32(vr4567, vd4567));
168     vr89AB = vmulq_f32(vr89AB, vrecpsq_f32(vr89AB, vd89AB));
169 
170     // Reconstruct sigmoid(-z) = exp(-z) / (1.0 + exp(-z))
171     float32x4_t vf0123 = vmulq_f32(vy0123, vr0123);
172     float32x4_t vf4567 = vmulq_f32(vy4567, vr4567);
173     float32x4_t vf89AB = vmulq_f32(vy89AB, vr89AB);
174 
175     // For inputs below denormal cutoff, replace output with +0.0f.
176     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
177     vf0123 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf0123), vcagtq_f32(vx0123, vdenorm_cutoff)));
178     vf4567 = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf4567), vcagtq_f32(vx4567, vdenorm_cutoff)));
179     vf89AB = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf89AB), vcagtq_f32(vx89AB, vdenorm_cutoff)));
180 
181     // Reconstruct sigmoid(x) = x < 0 ? sigmoid(-z) : 1.0 - sigmoid(-z)
182     const uint32x4_t vm0123 = vcltq_f32(vx0123, vmovq_n_f32(0.0f));
183     const uint32x4_t vm4567 = vcltq_f32(vx4567, vmovq_n_f32(0.0f));
184     const uint32x4_t vm89AB = vcltq_f32(vx89AB, vmovq_n_f32(0.0f));
185 
186     vf0123 = vbslq_f32(vm0123, vf0123, vsubq_f32(vone, vf0123));
187     vf4567 = vbslq_f32(vm4567, vf4567, vsubq_f32(vone, vf4567));
188     vf89AB = vbslq_f32(vm89AB, vf89AB, vsubq_f32(vone, vf89AB));
189 
190     vst1q_f32(y, vf0123); y += 4;
191     vst1q_f32(y, vf4567); y += 4;
192     vst1q_f32(y, vf89AB); y += 4;
193   }
194   for (; n >= 4 * sizeof(float); n -= 4 * sizeof(float)) {
195     const float32x4_t vx = vld1q_f32(x); x += 4;
196 
197     // General structure of the algorithm:
198     //           / exp(x) / (1 + exp(x)) if x <= 0
199     //   f[x] :=
200     //           \ 1 - f[-x] if x >= 0
201     //
202     // First we compute f[-z] := exp(-z) / (1 + exp(-z)) where z = abs(x),
203     // then replace result with 1 - f[-z] if x >= 0.
204     const float32x4_t vz = vabsq_f32(vx);
205 
206     // Compute reduced argument n := round(-z * 64 / log(2)).
207     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
208     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
209     // The trick with adding large number is valid only within certain bounds (|z * 64 / log(2)| <= 2**22, i.e.
210     // |z| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs x outside of [-87.336544, 17.328678]
211     // (i.e. z outsize [0, 87.336544]) underflow or saturate sigmoidf(x). We fixup the result  for such inputs at the
212     // very end of the algorithm.
213     float32x4_t vn = vmlaq_f32(vmagic_bias, vz, vminus_log2e_x64);
214 
215     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that sigmoidf(-z) is
216     // normalized, i.e. 0 <= z <= 87.33642. As n has 6 fractional bits, we split s == 2**(n / 64) =
217     // = 2**e * 2**(n / 64 - e), where e := int(n / 64). We create s in two steps:
218     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
219     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
220     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
221     //    number, because for 0 <= z <= 87.33642 (inputs for which sigmoidf(-z) is normalized) we have -126 <= e <= 0,
222     //    and thus the adjusted exponent is not lower than -126.
223     //
224     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
225     const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
226 
227     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
228     const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
229     const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
230     const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
231     float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
232     float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
233     vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
234     vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
235     const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
236     // Adjust exponent of the value l fetched from the table to get the final s value.
237     const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
238 
239     // Subtract the large number back to get the final n := round(-z * 64 / log(2)) as a floating-point number.
240     vn = vsubq_f32(vn, vmagic_bias);
241 
242     // Compute reduced argument t := (z + n * log(2) / 64). Note that -t = -z - n * log(2) / 64.
243     // Use Cody-Waite range reduction method (note two constants to represent log(2) / 64) to improve accuracy.
244     float32x4_t vt = vmlaq_f32(vz, vn, vln2_o64_hi);
245     vt = vmlaq_f32(vt, vn, vln2_o64_lo);
246 
247     // Compute degree-2 polynomial approxiatmion for exp(-t) on [-log(2)/128, log(2)/128].
248     //   P1(t) = 1 + t * (-1 + t * c2)
249     float32x4_t vp = vmulq_f32(vt, vc2);
250     vp = vmlsq_f32(vt, vp, vt);
251 
252     // Reconstruct the exp(-z) value:
253     //   f = s * (1 + t * (-1 + t * c2))
254     //     = s * (1 - t + t * (t * c2))
255     //     = s - s * (t - t * (t * c2))
256     //     = s - s * p
257     const float32x4_t vy = vmlsq_f32(vs, vs, vp);
258 
259     // Denominator of the sigmoid fraction: 1.0 + exp(-z)
260     const float32x4_t vd = vaddq_f32(vy, vone);
261 
262     // Use Newton-Raphson method (2 iterations) to compute reciprocal of denominator.
263     // Note: 1 < d <= 2, because z >= 0.0 and 0 < exp(-z) <= 1.0.
264     // Thus the reciprocal of the denominator never overflows.
265     float32x4_t vr = vrecpeq_f32(vd);
266 
267     vr = vmulq_f32(vr, vrecpsq_f32(vr, vd));
268 
269     vr = vmulq_f32(vr, vrecpsq_f32(vr, vd));
270 
271     // Reconstruct sigmoid(-z) = exp(-z) / (1.0 + exp(-z))
272     float32x4_t vf = vmulq_f32(vy, vr);
273 
274     // For inputs below denormal cutoff, replace output with +0.0f.
275     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
276     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcagtq_f32(vx, vdenorm_cutoff)));
277 
278     // Reconstruct sigmoid(x) = x < 0 ? sigmoid(-z) : 1.0 - sigmoid(-z)
279     const uint32x4_t vm = vcltq_f32(vx, vmovq_n_f32(0.0f));
280     vf = vbslq_f32(vm, vf, vsubq_f32(vone, vf));
281 
282     vst1q_f32(y, vf); y += 4;
283   }
284   if XNN_UNLIKELY(n != 0) {
285     const float32x4_t vx = vld1q_f32(x);
286 
287     // General structure of the algorithm:
288     //           / exp(x) / (1 + exp(x)) if x <= 0
289     //   f[x] :=
290     //           \ 1 - f[-x] if x >= 0
291     //
292     // First we compute f[-z] := exp(-z) / (1 + exp(-z)) where z = abs(x),
293     // then replace result with 1 - f[-z] if x >= 0.
294     const float32x4_t vz = vabsq_f32(vx);
295 
296     // Compute reduced argument n := round(-z * 64 / log(2)).
297     // We do it by adding a large number (magic bias), which cause rounding of the result to an integer, then subtracing
298     // the large number back. The first addition is combined with multiplication by log2e into a single FMA instruction.
299     // The trick with adding large number is valid only within certain bounds (|z * 64 / log(2)| <= 2**22, i.e.
300     // |z| <= 0x1.62E43p+15 = 45426.09375), but that is acceptable, because inputs x outside of [-87.336544, 17.328678]
301     // (i.e. z outsize [0, 87.336544]) underflow or saturate sigmoidf(x). We fixup the result  for such inputs at the
302     // very end of the algorithm.
303     float32x4_t vn = vmlaq_f32(vmagic_bias, vz, vminus_log2e_x64);
304 
305     // Create a floating-point number s (scale) such that s := 2**(n / 64) for such inputs that sigmoidf(-z) is
306     // normalized, i.e. 0 <= z <= 87.33642. As n has 6 fractional bits, we split s == 2**(n / 64) =
307     // = 2**e * 2**(n / 64 - e), where e := int(n / 64). We create s in two steps:
308     // 1. Fetch 2**(n / 64 - e) = 2**(n % 64) from the table using the 6 low bits of n, as integer. Note that the
309     //    fetched values are in the [1.0, 2.0) range, i.e. their floating-point exponent is 0.
310     // 2. Adjust fecthed value by addition of e to its floating-point exponent. The result is always a normalized
311     //    number, because for 0 <= z <= 87.33642 (inputs for which sigmoidf(-z) is normalized) we have -126 <= e <= 0,
312     //    and thus the adjusted exponent is not lower than -126.
313     //
314     // Extract e from bits 6:14 of n and shift it into bits 23:31 (position of floating-point exponent).
315     const int32x4_t ve = vshlq_n_s32(vbicq_s32(vreinterpretq_s32_f32(vn), vmovq_n_s32(INT32_C(0x3F))), 17);
316 
317     // Use bits 0:6 bits of n, as integer, as an index for table lookup of l := 2**(n % 64).
318     const uint64x2_t vidx = vreinterpretq_u64_s32(vandq_s32(vreinterpretq_s32_f32(vn), vindex_mask));
319     const uint64_t vidx_lo = vgetq_lane_u64(vidx, 0);
320     const uint64_t vidx_hi = vgetq_lane_u64(vidx, 1);
321     float32x2_t vl_lo = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_lo]);
322     float32x2_t vl_hi = vld1_dup_f32(&xnn_table_exp2_k_over_64[(uint32_t) vidx_hi]);
323     vl_lo = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_lo >> 32)], vl_lo, 1);
324     vl_hi = vld1_lane_f32(&xnn_table_exp2_k_over_64[(uint32_t) (vidx_hi >> 32)], vl_hi, 1);
325     const float32x4_t vl = vcombine_f32(vl_lo, vl_hi);
326     // Adjust exponent of the value l fetched from the table to get the final s value.
327     const float32x4_t vs = vreinterpretq_f32_s32(vaddq_s32(vreinterpretq_s32_f32(vl), ve));
328 
329     // Subtract the large number back to get the final n := round(-z * 64 / log(2)) as a floating-point number.
330     vn = vsubq_f32(vn, vmagic_bias);
331 
332     // Compute reduced argument t := (z + n * log(2) / 64). Note that -t = -z - n * log(2) / 64.
333     // Use Cody-Waite range reduction method (note two constants to represent log(2) / 64) to improve accuracy.
334     float32x4_t vt = vmlaq_f32(vz, vn, vln2_o64_hi);
335     vt = vmlaq_f32(vt, vn, vln2_o64_lo);
336 
337     // Compute degree-2 polynomial approxiatmion for exp(-t) on [-log(2)/128, log(2)/128].
338     //   P1(t) = 1 + t * (-1 + t * c2)
339     float32x4_t vp = vmulq_f32(vt, vc2);
340     vp = vmlsq_f32(vt, vp, vt);
341 
342     // Reconstruct the exp(-z) value:
343     //   f = s * (1 + t * (-1 + t * c2))
344     //     = s * (1 - t + t * (t * c2))
345     //     = s - s * (t - t * (t * c2))
346     //     = s - s * p
347     const float32x4_t vy = vmlsq_f32(vs, vs, vp);
348 
349     // Denominator of the sigmoid fraction: 1.0 + exp(-z)
350     const float32x4_t vd = vaddq_f32(vy, vone);
351 
352     // Use Newton-Raphson method (2 iterations) to compute reciprocal of denominator.
353     // Note: 1 < d <= 2, because z >= 0.0 and 0 < exp(-z) <= 1.0.
354     // Thus the reciprocal of the denominator never overflows.
355     float32x4_t vr = vrecpeq_f32(vd);
356 
357     vr = vmulq_f32(vr, vrecpsq_f32(vr, vd));
358 
359     vr = vmulq_f32(vr, vrecpsq_f32(vr, vd));
360 
361     // Reconstruct sigmoid(-z) = exp(-z) / (1.0 + exp(-z))
362     float32x4_t vf = vmulq_f32(vy, vr);
363 
364     // For inputs below denormal cutoff, replace output with +0.0f.
365     // Note that for NaN inputs, comparison result is false, and outputs are left unchanged.
366     vf = vreinterpretq_f32_u32(vbicq_u32(vreinterpretq_u32_f32(vf), vcagtq_f32(vx, vdenorm_cutoff)));
367 
368     // Reconstruct sigmoid(x) = x < 0 ? sigmoid(-z) : 1.0 - sigmoid(-z)
369     const uint32x4_t vm = vcltq_f32(vx, vmovq_n_f32(0.0f));
370     vf = vbslq_f32(vm, vf, vsubq_f32(vone, vf));
371 
372     float32x2_t vf_lo = vget_low_f32(vf);
373     if (n & (2 * sizeof(float))) {
374       vst1_f32(y, vf_lo); y += 2;
375       vf_lo = vget_high_f32(vf);
376     }
377     if (n & (1 * sizeof(float))) {
378       vst1_lane_f32(y, vf_lo, 0);
379     }
380   }
381 }
382