1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 #include <lib/mmio.h> 9 10 #include <sunxi_mmap.h> 11 #include <sunxi_private.h> 12 13 #ifdef SUNXI_SPC_BASE 14 #define SPC_DECPORT_STA_REG(p) (SUNXI_SPC_BASE + ((p) * 0x0c) + 0x4) 15 #define SPC_DECPORT_SET_REG(p) (SUNXI_SPC_BASE + ((p) * 0x0c) + 0x8) 16 #define SPC_DECPORT_CLR_REG(p) (SUNXI_SPC_BASE + ((p) * 0x0c) + 0xc) 17 #endif 18 19 #define R_PRCM_SEC_SWITCH_REG 0x1d0 20 #define DMA_SEC_REG 0x20 21 22 /* 23 * Setup the peripherals to be accessible by non-secure world. 24 * This will not work for the Secure Peripherals Controller (SPC) unless 25 * a fuse it burnt (seems to be an erratum), but we do it nevertheless, 26 * to allow booting on boards using secure boot. 27 */ sunxi_security_setup(void)28void sunxi_security_setup(void) 29 { 30 #ifdef SUNXI_SPC_BASE 31 int i; 32 33 INFO("Configuring SPC Controller\n"); 34 /* SPC setup: set all devices to non-secure */ 35 for (i = 0; i < 6; i++) 36 mmio_write_32(SPC_DECPORT_SET_REG(i), 0xff); 37 #endif 38 39 /* set MBUS clocks, bus clocks (AXI/AHB/APB) and PLLs to non-secure */ 40 mmio_write_32(SUNXI_CCU_SEC_SWITCH_REG, 0x7); 41 42 /* set R_PRCM clocks to non-secure */ 43 mmio_write_32(SUNXI_R_PRCM_BASE + R_PRCM_SEC_SWITCH_REG, 0x7); 44 45 /* Set all DMA channels (16 max.) to non-secure */ 46 mmio_write_32(SUNXI_DMA_BASE + DMA_SEC_REG, 0xffff); 47 } 48