1 /* 2 * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef PLAT_SOCFPGA_DEF_H 8 #define PLAT_SOCFPGA_DEF_H 9 10 #include <platform_def.h> 11 12 /* Platform Setting */ 13 #define PLATFORM_MODEL PLAT_SOCFPGA_STRATIX10 14 15 /* Register Mapping */ 16 #define SOCFPGA_MMC_REG_BASE 0xff808000 17 18 #define SOCFPGA_RSTMGR_REG_BASE 0xffd11000 19 #define SOCFPGA_SYSMGR_REG_BASE 0xffd12000 20 21 #define SOCFPGA_L4_PER_SCR_REG_BASE 0xffd21000 22 #define SOCFPGA_L4_SYS_SCR_REG_BASE 0xffd21100 23 #define SOCFPGA_SOC2FPGA_SCR_REG_BASE 0xffd21200 24 #define SOCFPGA_LWSOC2FPGA_SCR_REG_BASE 0xffd21300 25 26 27 #endif /* PLATSOCFPGA_DEF_H */ 28 29