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1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #include <armada_common.h>
9 
10 /*
11  * If bootrom is currently at BLE there's no need to include the memory
12  * maps structure at this point
13  */
14 #include <mvebu_def.h>
15 #ifndef IMAGE_BLE
16 
17 /*****************************************************************************
18  * AMB Configuration
19  *****************************************************************************
20  */
21 struct addr_map_win amb_memory_map[] = {
22 	/* CP0 SPI1 CS0 Direct Mode access */
23 	{0xf900,	0x1000000,	AMB_SPI1_CS0_ID},
24 };
25 
marvell_get_amb_memory_map(struct addr_map_win ** win,uint32_t * size,uintptr_t base)26 int marvell_get_amb_memory_map(struct addr_map_win **win,
27 			       uint32_t *size, uintptr_t base)
28 {
29 	*win = amb_memory_map;
30 	if (*win == NULL)
31 		*size = 0;
32 	else
33 		*size = ARRAY_SIZE(amb_memory_map);
34 
35 	return 0;
36 }
37 #endif
38 
39 /*****************************************************************************
40  * IO_WIN Configuration
41  *****************************************************************************
42  */
43 struct addr_map_win io_win_memory_map[] = {
44 #ifndef IMAGE_BLE
45 	/* MCI 0 indirect window */
46 	{MVEBU_MCI_REG_BASE_REMAP(0),	0x100000, MCI_0_TID},
47 	/* MCI 1 indirect window */
48 	{MVEBU_MCI_REG_BASE_REMAP(1),	0x100000, MCI_1_TID},
49 #endif
50 };
51 
marvell_get_io_win_gcr_target(int ap_index)52 uint32_t marvell_get_io_win_gcr_target(int ap_index)
53 {
54 	return PIDI_TID;
55 }
56 
marvell_get_io_win_memory_map(int ap_index,struct addr_map_win ** win,uint32_t * size)57 int marvell_get_io_win_memory_map(int ap_index, struct addr_map_win **win,
58 				  uint32_t *size)
59 {
60 	*win = io_win_memory_map;
61 	if (*win == NULL)
62 		*size = 0;
63 	else
64 		*size = ARRAY_SIZE(io_win_memory_map);
65 
66 	return 0;
67 }
68 
69 #ifndef IMAGE_BLE
70 /*****************************************************************************
71  * IOB Configuration
72  *****************************************************************************
73  */
74 struct addr_map_win iob_memory_map[] = {
75 	/* PEX1_X1 window */
76 	{0x00000000f7000000,	0x1000000,	PEX1_TID},
77 	/* PEX2_X1 window */
78 	{0x00000000f8000000,	0x1000000,	PEX2_TID},
79 	{0x00000000c0000000,	0x30000000,	PEX2_TID},
80 	{0x0000000800000000,	0x100000000,	PEX2_TID},
81 	/* PEX0_X4 window */
82 	{0x00000000f6000000,	0x1000000,	PEX0_TID},
83 	/* SPI1_CS0 (RUNIT) window */
84 	{0x00000000f9000000,	0x1000000,	RUNIT_TID},
85 };
86 
marvell_get_iob_memory_map(struct addr_map_win ** win,uint32_t * size,uintptr_t base)87 int marvell_get_iob_memory_map(struct addr_map_win **win, uint32_t *size,
88 			       uintptr_t base)
89 {
90 	*win = iob_memory_map;
91 	*size = ARRAY_SIZE(iob_memory_map);
92 
93 	return 0;
94 }
95 #endif
96 
97 /*****************************************************************************
98  * CCU Configuration
99  *****************************************************************************
100  */
101 struct addr_map_win ccu_memory_map[] = {	/* IO window */
102 #ifdef IMAGE_BLE
103 	{0x00000000f2000000,	0x4000000,	IO_0_TID}, /* IO window */
104 #else
105 	{0x00000000f2000000,	0xe000000,	IO_0_TID},
106 	{0x00000000c0000000,	0x30000000,	IO_0_TID}, /* IO window */
107 	{0x0000000800000000,	0x100000000,	IO_0_TID}, /* IO window */
108 #endif
109 };
110 
marvell_get_ccu_gcr_target(int ap)111 uint32_t marvell_get_ccu_gcr_target(int ap)
112 {
113 	return DRAM_0_TID;
114 }
115 
marvell_get_ccu_memory_map(int ap_index,struct addr_map_win ** win,uint32_t * size)116 int marvell_get_ccu_memory_map(int ap_index, struct addr_map_win **win,
117 			       uint32_t *size)
118 {
119 	*win = ccu_memory_map;
120 	*size = ARRAY_SIZE(ccu_memory_map);
121 
122 	return 0;
123 }
124 
125 #ifdef IMAGE_BLE
126 /*****************************************************************************
127  * SKIP IMAGE Configuration
128  *****************************************************************************
129  */
130 #if PLAT_RECOVERY_IMAGE_ENABLE
131 struct skip_image skip_im = {
132 	.detection_method = GPIO,
133 	.info.gpio.num = 33,
134 	.info.gpio.button_state = HIGH,
135 	.info.test.cp_ap = CP,
136 	.info.test.cp_index = 0,
137 };
138 
plat_marvell_get_skip_image_data(void)139 void *plat_marvell_get_skip_image_data(void)
140 {
141 	/* Return the skip_image configurations */
142 	return &skip_im;
143 }
144 #endif
145 #endif
146