1#!/usr/bin/env python 2 3# Capstone Python bindings, by Nguyen Anh Quynnh <aquynh@gmail.com> 4from __future__ import print_function 5from capstone import * 6import binascii 7from xprint import to_hex 8 9 10X86_CODE16 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" 11X86_CODE32 = b"\x8d\x4c\x32\x08\x01\xd8\x81\xc6\x34\x12\x00\x00" 12X86_CODE64 = b"\x55\x48\x8b\x05\xb8\x13\x00\x00" 13ARM_CODE = b"\xED\xFF\xFF\xEB\x04\xe0\x2d\xe5\x00\x00\x00\x00\xe0\x83\x22\xe5\xf1\x02\x03\x0e\x00\x00\xa0\xe3\x02\x30\xc1\xe7\x00\x00\x53\xe3" 14ARM_CODE2 = b"\x10\xf1\x10\xe7\x11\xf2\x31\xe7\xdc\xa1\x2e\xf3\xe8\x4e\x62\xf3" 15THUMB_CODE = b"\x70\x47\xeb\x46\x83\xb0\xc9\x68" 16THUMB_CODE2 = b"\x4f\xf0\x00\x01\xbd\xe8\x00\x88\xd1\xe8\x00\xf0" 17MIPS_CODE = b"\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56" 18MIPS_CODE2 = b"\x56\x34\x21\x34\xc2\x17\x01\x00" 19ARM64_CODE = b"\x21\x7c\x02\x9b\x21\x7c\x00\x53\x00\x40\x21\x4b\xe1\x0b\x40\xb9" 20PPC_CODE = b"\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21" 21 22all_tests = ( 23 (CS_ARCH_X86, CS_MODE_16, X86_CODE16, "X86 16bit (Intel syntax)", 0), 24 (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32bit (ATT syntax)", CS_OPT_SYNTAX_ATT), 25 (CS_ARCH_X86, CS_MODE_32, X86_CODE32, "X86 32 (Intel syntax)", 0), 26 (CS_ARCH_X86, CS_MODE_64, X86_CODE64, "X86 64 (Intel syntax)", 0), 27 (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE, "ARM", 0), 28 (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE2, "THUMB-2", 0), 29 (CS_ARCH_ARM, CS_MODE_ARM, ARM_CODE2, "ARM: Cortex-A15 + NEON", 0), 30 (CS_ARCH_ARM, CS_MODE_THUMB, THUMB_CODE, "THUMB", 0), 31 (CS_ARCH_MIPS, CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN, MIPS_CODE, "MIPS-32 (Big-endian)", 0), 32 (CS_ARCH_MIPS, CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN, MIPS_CODE2, "MIPS-64-EL (Little-endian)", 0), 33 (CS_ARCH_ARM64, CS_MODE_ARM, ARM64_CODE, "ARM-64", 0), 34 (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64", 0), 35 (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64, print register with number only", CS_OPT_SYNTAX_NOREGNAME), 36 ) 37 38 39# ## Test cs_disasm_quick() 40def test_cs_disasm_quick(): 41 for (arch, mode, code, comment, syntax) in all_tests: 42 print('*' * 40) 43 print("Platform: %s" % comment) 44 print("Disasm:"), 45 print(to_hex(code)) 46 for (addr, size, mnemonic, op_str) in cs_disasm_lite(arch, mode, code, 0x1000): 47 print("0x%x:\t%s\t%s" % (addr, mnemonic, op_str)) 48 print() 49 50 51# ## Test class Cs 52def test_class(): 53 for (arch, mode, code, comment, syntax) in all_tests: 54 print('*' * 16) 55 print("Platform: %s" % comment) 56 print("Code: %s" % to_hex(code)) 57 print("Disasm:") 58 59 try: 60 md = Cs(arch, mode) 61 62 if syntax != 0: 63 md.syntax = syntax 64 65 for (addr, size, mnemonic, op_str) in md.disasm_lite(code, 0x1000): 66 print("0x%x:\t%s\t%s" % (addr, mnemonic, op_str)) 67 68 print("0x%x:" % (addr + size)) 69 print() 70 except CsError as e: 71 print("ERROR: %s" % e) 72 73 74# test_cs_disasm_quick() 75# print "*" * 40 76if __name__ == '__main__': 77 test_class() 78