1 #include <stdint.h>
2
3 #if CPUINFO_MOCK
4 #include <cpuinfo-mock.h>
5 #endif
6 #include <arm/linux/api.h>
7 #include <arm/linux/cp.h>
8 #include <arm/midr.h>
9 #include <cpuinfo/log.h>
10
11
12 #if CPUINFO_MOCK
13 uint32_t cpuinfo_arm_fpsid = 0;
14 uint32_t cpuinfo_arm_mvfr0 = 0;
15 uint32_t cpuinfo_arm_wcid = 0;
16
cpuinfo_set_fpsid(uint32_t fpsid)17 void cpuinfo_set_fpsid(uint32_t fpsid) {
18 cpuinfo_arm_fpsid = fpsid;
19 }
20
cpuinfo_set_wcid(uint32_t wcid)21 void cpuinfo_set_wcid(uint32_t wcid) {
22 cpuinfo_arm_wcid = wcid;
23 }
24 #endif
25
26
cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(uint32_t features,uint32_t features2,uint32_t midr,uint32_t architecture_version,uint32_t architecture_flags,const struct cpuinfo_arm_chipset chipset[restrict static1],struct cpuinfo_arm_isa isa[restrict static1])27 void cpuinfo_arm_linux_decode_isa_from_proc_cpuinfo(
28 uint32_t features,
29 uint32_t features2,
30 uint32_t midr,
31 uint32_t architecture_version,
32 uint32_t architecture_flags,
33 const struct cpuinfo_arm_chipset chipset[restrict static 1],
34 struct cpuinfo_arm_isa isa[restrict static 1])
35 {
36 if (architecture_version >= 8) {
37 /*
38 * ARMv7 code running on ARMv8: IDIV, VFP, NEON are always supported,
39 * but may be not reported in /proc/cpuinfo features.
40 */
41 isa->armv5e = true;
42 isa->armv6 = true;
43 isa->armv6k = true;
44 isa->armv7 = true;
45 isa->armv7mp = true;
46 isa->thumb = true;
47 isa->thumb2 = true;
48 isa->idiv = true;
49 isa->vfpv3 = true;
50 isa->d32 = true;
51 isa->fp16 = true;
52 isa->fma = true;
53 isa->neon = true;
54
55 /*
56 * NEON FP16 compute extension and VQRDMLAH/VQRDMLSH instructions are not indicated in /proc/cpuinfo.
57 * Use a MIDR-based heuristic to whitelist processors known to support it:
58 * - Processors with Qualcomm-modified Cortex-A55 cores
59 * - Processors with Qualcomm-modified Cortex-A75 cores
60 * - Processors with Qualcomm-modified Cortex-A76 cores
61 * - Kirin 980 processor
62 */
63 switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) {
64 case UINT32_C(0x51008020): /* Kryo 385 Gold (Cortex-A75) */
65 case UINT32_C(0x51008030): /* Kryo 385 Silver (Cortex-A55) */
66 case UINT32_C(0x51008040): /* Kryo 485 Gold (Cortex-A76) */
67 isa->fp16arith = true;
68 isa->rdm = true;
69 break;
70 default:
71 if (chipset->series == cpuinfo_arm_chipset_series_hisilicon_kirin && chipset->model == 980) {
72 isa->fp16arith = true;
73 isa->rdm = true;
74 }
75 break;
76 }
77
78 /*
79 * NEON VDOT instructions are not indicated in /proc/cpuinfo.
80 * Use a MIDR-based heuristic to whitelist processors known to support it:
81 * - Processors with Qualcomm-modified Cortex-A76 cores
82 * - Kirin 980 processor
83 */
84 switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) {
85 case UINT32_C(0x51008040): /* Kryo 485 Gold (Cortex-A76) */
86 isa->dot = true;
87 break;
88 default:
89 if (chipset->series == cpuinfo_arm_chipset_series_hisilicon_kirin && chipset->model == 980) {
90 isa->dot = true;
91 }
92 break;
93 }
94 } else {
95 /* ARMv7 or lower: use feature flags to detect optional features */
96
97 /*
98 * ARM11 (ARM 1136/1156/1176/11 MPCore) processors can report v7 architecture
99 * even though they support only ARMv6 instruction set.
100 */
101 if (architecture_version == 7 && midr_is_arm11(midr)) {
102 cpuinfo_log_warning("kernel-reported architecture ARMv7 ignored due to mismatch with processor microarchitecture (ARM11)");
103 architecture_version = 6;
104 }
105
106 if (architecture_version < 7) {
107 const uint32_t armv7_features_mask = CPUINFO_ARM_LINUX_FEATURE_VFPV3 | CPUINFO_ARM_LINUX_FEATURE_VFPV3D16 | CPUINFO_ARM_LINUX_FEATURE_VFPD32 |
108 CPUINFO_ARM_LINUX_FEATURE_VFPV4 | CPUINFO_ARM_LINUX_FEATURE_NEON | CPUINFO_ARM_LINUX_FEATURE_IDIVT | CPUINFO_ARM_LINUX_FEATURE_IDIVA;
109 if (features & armv7_features_mask) {
110 architecture_version = 7;
111 }
112 }
113 if ((architecture_version >= 6) || (features & CPUINFO_ARM_LINUX_FEATURE_EDSP) || (architecture_flags & CPUINFO_ARM_LINUX_ARCH_E)) {
114 isa->armv5e = true;
115 }
116 if (architecture_version >= 6) {
117 isa->armv6 = true;
118 }
119 if (architecture_version >= 7) {
120 isa->armv6k = true;
121 isa->armv7 = true;
122
123 /*
124 * ARMv7 MP extension (PLDW instruction) is not indicated in /proc/cpuinfo.
125 * Use heuristic list of supporting processors:
126 * - Processors supporting UDIV/SDIV instructions ("idiva" + "idivt" features in /proc/cpuinfo)
127 * - Cortex-A5
128 * - Cortex-A9
129 * - Dual-Core Scorpion
130 * - Krait (supports UDIV/SDIV, but kernels may not report it in /proc/cpuinfo)
131 *
132 * TODO: check single-core Qualcomm Scorpion.
133 */
134 switch (midr & (CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK)) {
135 case UINT32_C(0x4100C050): /* Cortex-A5 */
136 case UINT32_C(0x4100C090): /* Cortex-A9 */
137 case UINT32_C(0x510002D0): /* Scorpion (dual-core) */
138 case UINT32_C(0x510004D0): /* Krait (dual-core) */
139 case UINT32_C(0x510006F0): /* Krait (quad-core) */
140 isa->armv7mp = true;
141 break;
142 default:
143 /* In practice IDIV instruction implies ARMv7+MP ISA */
144 isa->armv7mp = (features & CPUINFO_ARM_LINUX_FEATURE_IDIV) == CPUINFO_ARM_LINUX_FEATURE_IDIV;
145 break;
146 }
147 }
148
149 if (features & CPUINFO_ARM_LINUX_FEATURE_IWMMXT) {
150 const uint32_t wcid = read_wcid();
151 cpuinfo_log_debug("WCID = 0x%08"PRIx32, wcid);
152 const uint32_t coprocessor_type = (wcid >> 8) & UINT32_C(0xFF);
153 if (coprocessor_type >= 0x10) {
154 isa->wmmx = true;
155 if (coprocessor_type >= 0x20) {
156 isa->wmmx2 = true;
157 }
158 } else {
159 cpuinfo_log_warning("WMMX ISA disabled: OS reported iwmmxt feature, "
160 "but WCID coprocessor type 0x%"PRIx32" indicates no WMMX support",
161 coprocessor_type);
162 }
163 }
164
165 if ((features & CPUINFO_ARM_LINUX_FEATURE_THUMB) || (architecture_flags & CPUINFO_ARM_LINUX_ARCH_T)) {
166 isa->thumb = true;
167
168 /*
169 * There is no separate feature flag for Thumb 2.
170 * All ARMv7 processors and ARM 1156 support Thumb 2.
171 */
172 if (architecture_version >= 7 || midr_is_arm1156(midr)) {
173 isa->thumb2 = true;
174 }
175 }
176 if (features & CPUINFO_ARM_LINUX_FEATURE_THUMBEE) {
177 isa->thumbee = true;
178 }
179 if ((features & CPUINFO_ARM_LINUX_FEATURE_JAVA) || (architecture_flags & CPUINFO_ARM_LINUX_ARCH_J)) {
180 isa->jazelle = true;
181 }
182
183 /* Qualcomm Krait may have buggy kernel configuration that doesn't report IDIV */
184 if ((features & CPUINFO_ARM_LINUX_FEATURE_IDIV) == CPUINFO_ARM_LINUX_FEATURE_IDIV || midr_is_krait(midr)) {
185 isa->idiv = true;
186 }
187
188 const uint32_t vfp_mask = \
189 CPUINFO_ARM_LINUX_FEATURE_VFP | CPUINFO_ARM_LINUX_FEATURE_VFPV3 | CPUINFO_ARM_LINUX_FEATURE_VFPV3D16 | \
190 CPUINFO_ARM_LINUX_FEATURE_VFPD32 | CPUINFO_ARM_LINUX_FEATURE_VFPV4 | CPUINFO_ARM_LINUX_FEATURE_NEON;
191 if (features & vfp_mask) {
192 const uint32_t vfpv3_mask = CPUINFO_ARM_LINUX_FEATURE_VFPV3 | CPUINFO_ARM_LINUX_FEATURE_VFPV3D16 | \
193 CPUINFO_ARM_LINUX_FEATURE_VFPD32 | CPUINFO_ARM_LINUX_FEATURE_VFPV4 | CPUINFO_ARM_LINUX_FEATURE_NEON;
194 if ((architecture_version >= 7) || (features & vfpv3_mask)) {
195 isa->vfpv3 = true;
196
197 const uint32_t d32_mask = CPUINFO_ARM_LINUX_FEATURE_VFPD32 | CPUINFO_ARM_LINUX_FEATURE_NEON;
198 if (features & d32_mask) {
199 isa->d32 = true;
200 }
201 } else {
202 #if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_8A__) || defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
203 isa->vfpv3 = true;
204 #else
205 const uint32_t fpsid = read_fpsid();
206 cpuinfo_log_debug("FPSID = 0x%08"PRIx32, fpsid);
207 const uint32_t subarchitecture = (fpsid >> 16) & UINT32_C(0x7F);
208 if (subarchitecture >= 0x01) {
209 isa->vfpv2 = true;
210 }
211 #endif
212 }
213 }
214 if (features & CPUINFO_ARM_LINUX_FEATURE_NEON) {
215 isa->neon = true;
216 }
217
218 /*
219 * There is no separate feature flag for FP16 support.
220 * VFPv4 implies VFPv3-FP16 support (and in practice, NEON-HP as well).
221 * Additionally, ARM Cortex-A9 and Qualcomm Scorpion support FP16.
222 */
223 if ((features & CPUINFO_ARM_LINUX_FEATURE_VFPV4) || midr_is_cortex_a9(midr) || midr_is_scorpion(midr)) {
224 isa->fp16 = true;
225 }
226
227 if (features & CPUINFO_ARM_LINUX_FEATURE_VFPV4) {
228 isa->fma = true;
229 }
230 }
231
232 if (features2 & CPUINFO_ARM_LINUX_FEATURE2_AES) {
233 isa->aes = true;
234 }
235 if (features2 & CPUINFO_ARM_LINUX_FEATURE2_PMULL) {
236 isa->pmull = true;
237 }
238 if (features2 & CPUINFO_ARM_LINUX_FEATURE2_SHA1) {
239 isa->sha1 = true;
240 }
241 if (features2 & CPUINFO_ARM_LINUX_FEATURE2_SHA2) {
242 isa->sha2 = true;
243 }
244 if (features2 & CPUINFO_ARM_LINUX_FEATURE2_CRC32) {
245 isa->crc32 = true;
246 }
247 }
248