1 /* -*- c-basic-offset: 8 -*- */
2 /*
3 * Copyright © 2006 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 *
27 */
28
29 #ifndef __GEN4ASM_H__
30 #define __GEN4ASM_H__
31
32 #include <inttypes.h>
33 #include <stdbool.h>
34 #include <assert.h>
35
36 #include "brw_reg.h"
37 #include "brw_defines.h"
38 #include "brw_structs.h"
39 #include "gen8_instruction.h"
40
41 extern long int gen_level;
42 extern int advanced_flag;
43 extern int errors;
44
45 #define WARN_ALWAYS (1 << 0)
46 #define WARN_ALL (1 << 31)
47 extern unsigned int warning_flags;
48
49 extern char *input_filename;
50
51 extern struct brw_context genasm_context;
52 extern struct brw_compile genasm_compile;
53
54 /* Predicate for Gen X and above */
55 #define IS_GENp(x) (gen_level >= (x)*10)
56
57 /* Predicate for Gen X exactly */
58 #define IS_GENx(x) (gen_level >= (x)*10 && gen_level < ((x)+1)*10)
59
60 /* Predicate to match Haswell processors */
61 #define IS_HASWELL(x) (gen_level == 75)
62
63 void yyerror (char *msg);
64
65 #define STRUCT_SIZE_ASSERT(TYPE, SIZE) \
66 typedef struct { \
67 char compile_time_assert_ ## TYPE ## _size[ \
68 (sizeof (struct TYPE) == (SIZE)) ? 1 : -1]; \
69 } _ ## TYPE ## SizeCheck
70
71 /* ensure nobody changes the size of struct brw_instruction */
72 STRUCT_SIZE_ASSERT(brw_instruction, 16);
73
74 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
75
76 struct condition {
77 int cond;
78 int flag_reg_nr;
79 int flag_subreg_nr;
80 };
81
82 struct predicate {
83 unsigned pred_control:4;
84 unsigned pred_inverse:1;
85 unsigned flag_reg_nr:1;
86 unsigned flag_subreg_nr:1;
87 };
88
89 struct options {
90 unsigned access_mode:1;
91 unsigned compression_control:2; /* gen6: quater control */
92 unsigned thread_control:2;
93 unsigned dependency_control:2;
94 unsigned mask_control:1;
95 unsigned debug_control:1;
96 unsigned acc_wr_control:1;
97
98 unsigned end_of_thread:1;
99 };
100
101 struct region {
102 int vert_stride, width, horiz_stride;
103 int is_default;
104 };
105 struct regtype {
106 int type;
107 int is_default;
108 };
109
110 /**
111 * This structure is the internal representation of source operands in the
112 * parser.
113 */
114 struct src_operand {
115 struct brw_reg reg;
116 int default_region;
117 uint32_t imm32; /* set if src_operand is expressing a branch offset */
118 char *reloc_target; /* bspec: branching instructions JIP and UIP are source operands */
119 } src_operand;
120
121 typedef struct {
122 enum {
123 imm32_d, imm32_f
124 } r;
125 union {
126 uint32_t d;
127 float f;
128 int32_t signed_d;
129 } u;
130 } imm32_t;
131
132 enum assembler_instruction_type {
133 GEN4ASM_INSTRUCTION_GEN,
134 GEN4ASM_INSTRUCTION_GEN_RELOCATABLE,
135 GEN4ASM_INSTRUCTION_GEN8,
136 GEN4ASM_INSTRUCTION_GEN8_RELOCATABLE,
137 GEN4ASM_INSTRUCTION_LABEL,
138 };
139
140 struct label_instruction {
141 char *name;
142 };
143
144 struct relocation {
145 char *first_reloc_target, *second_reloc_target; // JIP and UIP respectively
146 int first_reloc_offset, second_reloc_offset; // in number of instructions
147 };
148
149 /**
150 * This structure is just the list container for instructions accumulated by
151 * the parser and labels.
152 */
153 struct brw_program_instruction {
154 enum assembler_instruction_type type;
155 unsigned inst_offset;
156 union {
157 struct brw_instruction gen;
158 struct gen8_instruction gen8;
159 struct label_instruction label;
160 } insn;
161 struct relocation reloc;
162 struct brw_program_instruction *next;
163 };
164
is_label(struct brw_program_instruction * instruction)165 static inline bool is_label(struct brw_program_instruction *instruction)
166 {
167 return instruction->type == GEN4ASM_INSTRUCTION_LABEL;
168 }
169
label_name(struct brw_program_instruction * i)170 static inline char *label_name(struct brw_program_instruction *i)
171 {
172 assert(is_label(i));
173 return i->insn.label.name;
174 }
175
is_relocatable(struct brw_program_instruction * intruction)176 static inline bool is_relocatable(struct brw_program_instruction *intruction)
177 {
178 return intruction->type == GEN4ASM_INSTRUCTION_GEN_RELOCATABLE;
179 }
180
181 /**
182 * This structure is a list of instructions. It is the final output of the
183 * parser.
184 */
185 struct brw_program {
186 struct brw_program_instruction *first;
187 struct brw_program_instruction *last;
188 };
189
190 extern struct brw_program compiled_program;
191
192 #define TYPE_B_INDEX 0
193 #define TYPE_UB_INDEX 1
194 #define TYPE_W_INDEX 2
195 #define TYPE_UW_INDEX 3
196 #define TYPE_D_INDEX 4
197 #define TYPE_UD_INDEX 5
198 #define TYPE_F_INDEX 6
199
200 #define TOTAL_TYPES 7
201
202 struct program_defaults {
203 int execute_size;
204 int execute_type[TOTAL_TYPES];
205 int register_type;
206 int register_type_regfile;
207 struct region source_region;
208 struct region source_region_type[TOTAL_TYPES];
209 struct region dest_region;
210 struct region dest_region_type[TOTAL_TYPES];
211 };
212 extern struct program_defaults program_defaults;
213
214 struct declared_register {
215 char *name;
216 struct brw_reg reg;
217 int element_size;
218 struct region src_region;
219 int dst_region;
220 };
221 struct declared_register *find_register(char *name);
222 void insert_register(struct declared_register *reg);
223
224 int yyparse(void);
225 int yylex(void);
226 int yylex_destroy(void);
227
228 char *
229 lex_text(void);
230
231 #endif /* __GEN4ASM_H__ */
232