1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 /** @file gem_linear_blits.c
29 *
30 * This is a test of doing many blits, with a working set
31 * larger than the aperture size.
32 *
33 * The goal is to simply ensure the basics work.
34 */
35
36 #include "igt.h"
37 #include <stdlib.h>
38 #include <stdio.h>
39 #include <string.h>
40 #include <fcntl.h>
41 #include <inttypes.h>
42 #include <errno.h>
43 #include <sys/stat.h>
44 #include <sys/time.h>
45
46 #include <drm.h>
47
48
49 IGT_TEST_DESCRIPTION("Test doing many blits with a working set larger than the"
50 " aperture size.");
51
52 #define WIDTH 512
53 #define HEIGHT 512
54
55 static uint32_t linear[WIDTH*HEIGHT];
56
57 static void
copy(int fd,uint32_t dst,uint32_t src)58 copy(int fd, uint32_t dst, uint32_t src)
59 {
60 uint32_t batch[12];
61 struct drm_i915_gem_relocation_entry reloc[2];
62 struct drm_i915_gem_exec_object2 obj[3];
63 struct drm_i915_gem_execbuffer2 exec;
64 int i = 0;
65
66 batch[i++] = XY_SRC_COPY_BLT_CMD |
67 XY_SRC_COPY_BLT_WRITE_ALPHA |
68 XY_SRC_COPY_BLT_WRITE_RGB;
69 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
70 batch[i - 1] |= 8;
71 else
72 batch[i - 1] |= 6;
73
74 batch[i++] = (3 << 24) | /* 32 bits */
75 (0xcc << 16) | /* copy ROP */
76 WIDTH*4;
77 batch[i++] = 0; /* dst x1,y1 */
78 batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */
79 batch[i++] = 0; /* dst reloc */
80 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
81 batch[i++] = 0;
82 batch[i++] = 0; /* src x1,y1 */
83 batch[i++] = WIDTH*4;
84 batch[i++] = 0; /* src reloc */
85 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
86 batch[i++] = 0;
87 batch[i++] = MI_BATCH_BUFFER_END;
88 batch[i++] = MI_NOOP;
89
90 memset(reloc, 0, sizeof(reloc));
91 reloc[0].target_handle = dst;
92 reloc[0].delta = 0;
93 reloc[0].offset = 4 * sizeof(batch[0]);
94 reloc[0].presumed_offset = 0;
95 reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
96 reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
97
98 reloc[1].target_handle = src;
99 reloc[1].delta = 0;
100 reloc[1].offset = 7 * sizeof(batch[0]);
101 if (intel_gen(intel_get_drm_devid(fd)) >= 8)
102 reloc[1].offset += sizeof(batch[0]);
103 reloc[1].presumed_offset = 0;
104 reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
105 reloc[1].write_domain = 0;
106
107 memset(obj, 0, sizeof(obj));
108 obj[0].handle = dst;
109 obj[1].handle = src;
110 obj[2].handle = gem_create(fd, 4096);
111 gem_write(fd, obj[2].handle, 0, batch, i * sizeof(batch[0]));
112 obj[2].relocation_count = 2;
113 obj[2].relocs_ptr = to_user_pointer(reloc);
114
115 memset(&exec, 0, sizeof(exec));
116 exec.buffers_ptr = to_user_pointer(obj);
117 exec.buffer_count = 3;
118 exec.batch_len = i * sizeof(batch[0]);
119 exec.flags = gem_has_blt(fd) ? I915_EXEC_BLT : 0;
120
121 gem_execbuf(fd, &exec);
122 gem_close(fd, obj[2].handle);
123 }
124
125 static uint32_t
create_bo(int fd,uint32_t val)126 create_bo(int fd, uint32_t val)
127 {
128 uint32_t handle;
129 int i;
130
131 handle = gem_create(fd, sizeof(linear));
132
133 /* Fill the BO with dwords starting at val */
134 for (i = 0; i < WIDTH*HEIGHT; i++)
135 linear[i] = val++;
136 gem_write(fd, handle, 0, linear, sizeof(linear));
137
138 return handle;
139 }
140
141 static void
check_bo(int fd,uint32_t handle,uint32_t val)142 check_bo(int fd, uint32_t handle, uint32_t val)
143 {
144 int num_errors;
145 int i;
146
147 gem_read(fd, handle, 0, linear, sizeof(linear));
148
149 num_errors = 0;
150 for (i = 0; i < WIDTH*HEIGHT; i++) {
151 if (linear[i] != val && num_errors++ < 32)
152 igt_warn("[%08x] Expected 0x%08x, found 0x%08x (difference 0x%08x)\n",
153 i * 4, val, linear[i], val ^ linear[i]);
154 val++;
155 }
156 igt_assert_eq(num_errors, 0);
157 }
158
run_test(int fd,int count)159 static void run_test(int fd, int count)
160 {
161 uint32_t *handle, *start_val;
162 uint32_t start = 0;
163 int i;
164
165 igt_debug("Using %d 1MiB buffers\n", count);
166
167 handle = malloc(sizeof(uint32_t)*count*2);
168 start_val = handle + count;
169
170 for (i = 0; i < count; i++) {
171 handle[i] = create_bo(fd, start);
172 start_val[i] = start;
173 start += 1024 * 1024 / 4;
174 }
175
176 igt_debug("Verifying initialisation...\n");
177 for (i = 0; i < count; i++)
178 check_bo(fd, handle[i], start_val[i]);
179
180 igt_debug("Cyclic blits, forward...\n");
181 for (i = 0; i < count * 4; i++) {
182 int src = i % count;
183 int dst = (i + 1) % count;
184
185 copy(fd, handle[dst], handle[src]);
186 start_val[dst] = start_val[src];
187 }
188 for (i = 0; i < count; i++)
189 check_bo(fd, handle[i], start_val[i]);
190
191 igt_debug("Cyclic blits, backward...\n");
192 for (i = 0; i < count * 4; i++) {
193 int src = (i + 1) % count;
194 int dst = i % count;
195
196 copy(fd, handle[dst], handle[src]);
197 start_val[dst] = start_val[src];
198 }
199 for (i = 0; i < count; i++)
200 check_bo(fd, handle[i], start_val[i]);
201
202 igt_debug("Random blits...\n");
203 for (i = 0; i < count * 4; i++) {
204 int src = random() % count;
205 int dst = random() % count;
206
207 if (src == dst)
208 continue;
209
210 copy(fd, handle[dst], handle[src]);
211 start_val[dst] = start_val[src];
212 }
213 for (i = 0; i < count; i++) {
214 check_bo(fd, handle[i], start_val[i]);
215 gem_close(fd, handle[i]);
216 }
217
218 free(handle);
219 }
220
221 #define MAX_32b ((1ull << 32) - 4096)
222
223 igt_main
224 {
225 int fd = 0;
226
227 igt_fixture {
228 fd = drm_open_driver(DRIVER_INTEL);
229 igt_require_gem(fd);
230 }
231
232 igt_subtest("basic")
233 run_test(fd, 2);
234
235 igt_subtest("normal") {
236 uint64_t count;
237
238 count = gem_aperture_size(fd);
239 if (count >> 32)
240 count = MAX_32b;
241 count = 3 * count / (1024*1024) / 2;
242 igt_require(count > 1);
243 intel_require_memory(count, sizeof(linear), CHECK_RAM);
244
245 run_test(fd, count);
246 }
247
248 igt_subtest("interruptible") {
249 uint64_t count;
250
251 count = gem_aperture_size(fd);
252 if (count >> 32)
253 count = MAX_32b;
254 count = 3 * count / (1024*1024) / 2;
255 igt_require(count > 1);
256 intel_require_memory(count, sizeof(linear), CHECK_RAM);
257
258 igt_fork_signal_helper();
259 run_test(fd, count);
260 igt_stop_signal_helper();
261 }
262 }
263