• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Copyright © 2012 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21  * DEALINGS IN THE SOFTWARE.
22  *
23  * Authors:
24  *      Paulo Zanoni <paulo.r.zanoni@intel.com>
25  */
26 
27 #include <assert.h>
28 #include <stdbool.h>
29 #include <stdio.h>
30 #include <unistd.h>
31 #include <stdlib.h>
32 #include <string.h>
33 #include "intel_io.h"
34 #include "intel_chipset.h"
35 #include "intel_reg.h"
36 #include "drmtest.h"
37 
38 int gen;
39 
40 uint32_t HTOTAL[]     = { 0x60000, 0x61000, 0x62000 };
41 uint32_t VTOTAL[]     = { 0x6000C, 0x6100C, 0x6200C };
42 uint32_t PIPECONF[]   = { 0x70008, 0x71008, 0x72008 };
43 uint32_t PIPESRC[]    = { 0x6001C, 0x6101C, 0x6201C };
44 uint32_t PF_CTRL1[]   = { 0x68080, 0x68880, 0x69080 };
45 uint32_t PF_WIN_POS[] = { 0x68070, 0x68870, 0x69070 };
46 uint32_t PF_WIN_SZ[]  = { 0x68074, 0x68874, 0x69074 };
47 
48 #define PIPECONF_ENABLE         (1 << 31)
49 #define PIPECONF_INTERLACE_MASK (7 << 21)
50 #define PIPECONF_PF_PD          (0 << 21)
51 #define PIPECONF_PF_ID          (1 << 21)
52 #define PIPECONF_IF_ID          (3 << 21)
53 
54 #define HTOTAL_ACTIVE_MASK (0xFFF << 0)
55 #define VTOTAL_ACTIVE_MASK (0xFFF << 0)
56 
57 #define PIPESRC_HORIZ_MASK (0xFFF << 16)
58 #define PIPESRC_VERT_MASK  (0xFFF << 0)
59 
60 /*#define PF_ENABLE    (1 << 31)*/
61 #define PF_PIPE_MASK   (3 << 29)
62 #define PF_FILTER_MASK (3 << 23)
63 #define PF_FILTER_MED  (1 << 23)
64 #define PF_PIPE_A      (0 << 29)
65 #define PF_PIPE_B      (1 << 29)
66 #define PF_PIPE_C      (2 << 29)
67 
68 #define PF_WIN_SZ_X_MASK (0x1FFF << 16)
69 #define PF_WIN_SZ_Y_MASK (0xFFF << 0)
70 
71 struct pipe_info {
72 	bool enabled;
73 	bool pf_enabled;
74 	uint32_t interlace_mode;
75 	uint32_t tot_width;  /* htotal */
76 	uint32_t tot_height; /* vtotal */
77 	uint32_t src_width;  /* pipesrc.x */
78 	uint32_t src_height; /* pipesrc.y */
79 	uint32_t dst_width;  /* pf_win_sz.x */
80 	uint32_t dst_height; /* pf_win_sz.y */
81 };
82 
read_pipe_info(int intel_pipe,struct pipe_info * info)83 static void read_pipe_info(int intel_pipe, struct pipe_info *info)
84 {
85 	uint32_t conf, vtotal, htotal, src, ctrl1, win_sz;
86 
87 	conf   = INREG(PIPECONF[intel_pipe]);
88 	htotal = INREG(HTOTAL[intel_pipe]);
89 	vtotal = INREG(VTOTAL[intel_pipe]);
90 	src    = INREG(PIPESRC[intel_pipe]);
91 	ctrl1  = INREG(PF_CTRL1[intel_pipe]);
92 	win_sz = INREG(PF_WIN_SZ[intel_pipe]);
93 
94 	info->enabled = (conf & PIPECONF_ENABLE) ? true : false;
95 	info->tot_width = (htotal & HTOTAL_ACTIVE_MASK) + 1;
96 	info->tot_height = (vtotal & VTOTAL_ACTIVE_MASK) + 1;
97 	info->src_width = ((src & PIPESRC_HORIZ_MASK) >> 16) + 1;
98 	info->src_height = (src & PIPESRC_VERT_MASK) + 1;
99 	info->interlace_mode = conf & PIPECONF_INTERLACE_MASK;
100 	info->pf_enabled = ctrl1 & PF_ENABLE;
101 	info->dst_width = (win_sz & PF_WIN_SZ_X_MASK) >> 16;
102 	info->dst_height = win_sz & PF_WIN_SZ_Y_MASK;
103 }
104 
dump_pipe(int intel_pipe)105 static void dump_pipe(int intel_pipe)
106 {
107 	struct pipe_info info;
108 
109 	read_pipe_info(intel_pipe, &info);
110 
111 	printf("\nPipe %c:\n", intel_pipe + 'A');
112 
113 	printf("- %s\n", info.enabled ? "enabled" : "disabled");
114 	if (!info.enabled)
115 		return;
116 
117 	switch (info.interlace_mode) {
118 	case PIPECONF_PF_PD:
119 		printf("- progressive\n");
120 		break;
121 	case PIPECONF_PF_ID:
122 		printf("- interlaced (progressive fetch)\n");
123 		break;
124 	case PIPECONF_IF_ID:
125 		printf("- interlaced (interlaced fetch)\n");
126 		break;
127 	default:
128 		assert(0);
129 	}
130 
131 	printf("- pf %s\n", info.pf_enabled ? "enabled" : "disabled");
132 	if (!info.pf_enabled)
133 		return;
134 
135 	printf("- tot %dx%d\n", info.tot_width, info.tot_height);
136 	printf("- src %dx%d\n", info.src_width, info.src_height);
137 	printf("- dst %dx%d\n", info.dst_width, info.dst_height);
138 }
139 
dump_info(void)140 static void dump_info(void)
141 {
142 	int i;
143 	int pipes;
144 
145 	if (gen < 7)
146 		pipes = 2;
147 	else
148 		pipes = 3;
149 
150 	for (i = 0; i < pipes; i++) {
151 		dump_pipe(i);
152 	}
153 }
154 
change_screen_size(int intel_pipe,int x,int y)155 static int change_screen_size(int intel_pipe, int x, int y)
156 {
157 	struct pipe_info info;
158 	uint32_t dst_width, dst_height, pos_x, pos_y;
159 	uint32_t ctrl1_val;
160 	uint32_t win_pos_val;
161 	uint32_t win_sz_val;
162 
163 	read_pipe_info(intel_pipe, &info);
164 
165 	if (x == 0) {
166 		if (info.dst_width != 0)
167 			dst_width = info.dst_width;
168 		else
169 			dst_width = info.src_width;
170 	} else {
171 		dst_width = x;
172 	}
173 
174 	if (y == 0) {
175 		if (info.dst_height != 0)
176 			dst_height = info.dst_height;
177 		else
178 			dst_height = info.src_height;
179 	} else {
180 		dst_height = y;
181 	}
182 
183 	pos_x = abs((info.tot_width - dst_width)) / 2;
184 	pos_y = abs((info.tot_height - dst_height)) / 2;
185 
186 	if (pos_x == 1)
187 		pos_x = 0;
188 
189 	if (info.src_width / (double) dst_width > 1.125) {
190 		printf("X is too small\n");
191 		return 1;
192 	} else if (info.tot_width < dst_width) {
193 		printf("X is too big\n");
194 		return 1;
195 	} else if (dst_width & 1) {
196 		printf("X must be even\n");
197 		return 1;
198 	} else if (info.src_height / (double) dst_height > 1.125) {
199 		printf("Y is too small\n");
200 		return 1;
201 	} else if (info.tot_height < dst_height) {
202 		printf("Y is too big\n");
203 		return 1;
204 	} else if (dst_height & 1) {
205 		printf("Y must be even\n");
206 		return 1;
207 	}
208 
209 	printf("Changing size for pipe %c:\n"
210 	       "- width:  %d -> %d\n"
211 	       "- height: %d -> %d\n"
212 	       "- pos: %dx%d\n",
213 	       intel_pipe + 'A', info.src_width, dst_width, info.src_height,
214 	       dst_height, pos_x, pos_y);
215 
216 	ctrl1_val = PF_ENABLE | PF_FILTER_MED;
217 
218 	/* This can break stuff if the panel fitter is already enabled for
219 	 * another pipe */
220 	if (gen >= 7) {
221 		switch (intel_pipe) {
222 		case 0:
223 			ctrl1_val |= PF_PIPE_A;
224 			break;
225 		case 1:
226 			ctrl1_val |= PF_PIPE_B;
227 			break;
228 		case 2:
229 			ctrl1_val |= PF_PIPE_C;
230 			break;
231 		default:
232 			assert(0);
233 		}
234 	}
235 	OUTREG(PF_CTRL1[intel_pipe], ctrl1_val);
236 
237 	win_pos_val = pos_x << 16;
238 	win_pos_val |= pos_y;
239 	OUTREG(PF_WIN_POS[intel_pipe], win_pos_val);
240 
241 	win_sz_val = dst_width << 16;
242 	win_sz_val |= dst_height;
243 	OUTREG(PF_WIN_SZ[intel_pipe], win_sz_val);
244 
245 	return 0;
246 }
247 
disable_panel_fitter(int intel_pipe)248 static int disable_panel_fitter(int intel_pipe)
249 {
250 	OUTREG(PF_CTRL1[intel_pipe], 0);
251 	OUTREG(PF_WIN_POS[intel_pipe], 0);
252 	OUTREG(PF_WIN_SZ[intel_pipe], 0);
253 	return 0;
254 }
255 
print_usage(void)256 static void print_usage(void)
257 {
258 	printf("Options:\n"
259 "  -p pipe:    pipe to be used (A, B or C)\n"
260 "  -x value:   final screen width size in pixels\n"
261 "  -y value:   final screen height size in pixels\n"
262 "  -d:         disable panel fitter\n"
263 "  -l:         list the current state of each pipe\n"
264 "  -h:         prints this message\n");
265 }
266 
main(int argc,char * argv[])267 int main (int argc, char *argv[])
268 {
269 	int opt;
270 	int ret = 0;
271 	char intel_pipe = '\0';
272 	int x = 0, y = 0;
273 	bool do_disable = false, do_dump = false, do_usage = false;
274 	struct pci_device *pci_dev;
275 	uint32_t devid;
276 
277 	printf("WARNING:\n"
278 	       "This tool is a workaround for people that don't have a Kernel "
279 	       "with overscan compensation properties: it is just a temporary "
280 	       "solution that may or may not work. Use it at your own risk.\n");
281 
282 	pci_dev = intel_get_pci_device();
283 	intel_register_access_init(pci_dev, 0, -1);
284 	devid = pci_dev->device_id;
285 
286 	if (!HAS_PCH_SPLIT(devid)) {
287 		printf("This tool was only tested on Ironlake and newer\n");
288 		ret = 1;
289 		goto out;
290 	}
291 	if (IS_GEN5(devid))
292 		gen = 5;
293 	else if (IS_GEN6(devid))
294 		gen = 6;
295 	else
296 		gen = 7;
297 
298 	while ((opt = getopt(argc, argv, "p:x:y:dlh")) != -1) {
299 		switch (opt) {
300 		case 'p':
301 			intel_pipe = optarg[0];
302 			if (intel_pipe != 'A' && intel_pipe != 'B' &&
303 			    (gen <= 6 || intel_pipe != 'C')) {
304 				printf("Invalid pipe\n");
305 				ret = 1;
306 				goto out;
307 			}
308 			break;
309 		case 'x':
310 			x = atoi(optarg);
311 			break;
312 		case 'y':
313 			y = atoi(optarg);
314 			break;
315 		case 'd':
316 			do_disable = true;
317 			break;
318 		case 'l':
319 			do_dump = true;
320 			break;
321 		case 'h':
322 			do_usage = true;
323 			break;
324 		default:
325 			do_usage = true;
326 			ret = 1;
327 		}
328 	}
329 
330 	if (do_usage) {
331 		print_usage();
332 	} else if (do_dump) {
333 		dump_info();
334 	} else if (intel_pipe) {
335 		if (do_disable)
336 			ret = disable_panel_fitter(intel_pipe - 'A');
337 		else
338 			ret = change_screen_size(intel_pipe - 'A', x, y);
339 	} else {
340 		print_usage();
341 		ret = 1;
342 	}
343 
344 out:
345 	intel_register_access_fini();
346 	return ret;
347 }
348