1//===-- R600.td - R600 Tablegen files ----------------------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9 10include "llvm/Target/Target.td" 11 12def R600InstrInfo : InstrInfo { 13 let guessInstructionProperties = 1; 14 let noNamedPositionallyEncodedOperands = 1; 15} 16 17def R600 : Target { 18 let InstructionSet = R600InstrInfo; 19 let AllowRegisterRenaming = 1; 20} 21 22let Namespace = "R600" in { 23 24foreach Index = 0-15 in { 25 def sub#Index : SubRegIndex<32, !shl(Index, 5)>; 26} 27 28include "R600RegisterInfo.td" 29 30} 31 32def NullALU : InstrItinClass; 33def ALU_NULL : FuncUnit; 34 35include "AMDGPUFeatures.td" 36include "R600Schedule.td" 37include "R600Processors.td" 38include "AMDGPUInstrInfo.td" 39include "AMDGPUInstructions.td" 40include "R600Instructions.td" 41include "R700Instructions.td" 42include "EvergreenInstructions.td" 43include "CaymanInstructions.td" 44 45// Calling convention for R600 46def CC_R600 : CallingConv<[ 47 CCIfInReg<CCIfType<[v4f32, v4i32] , CCAssignToReg<[ 48 T0_XYZW, T1_XYZW, T2_XYZW, T3_XYZW, T4_XYZW, T5_XYZW, T6_XYZW, T7_XYZW, 49 T8_XYZW, T9_XYZW, T10_XYZW, T11_XYZW, T12_XYZW, T13_XYZW, T14_XYZW, T15_XYZW, 50 T16_XYZW, T17_XYZW, T18_XYZW, T19_XYZW, T20_XYZW, T21_XYZW, T22_XYZW, 51 T23_XYZW, T24_XYZW, T25_XYZW, T26_XYZW, T27_XYZW, T28_XYZW, T29_XYZW, 52 T30_XYZW, T31_XYZW, T32_XYZW 53 ]>>> 54]>; 55