1//===-- SIIntrinsics.td - SI Intrinsic defs ----------------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Backend internal SI Intrinsic Definitions. User code should not 11// directly use these. 12// 13//===----------------------------------------------------------------------===// 14 15 16let TargetPrefix = "SI", isTarget = 1 in { 17 def int_SI_load_const : Intrinsic <[llvm_float_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>; 18 19 // Fully-flexible TBUFFER_STORE_FORMAT_* except for the ADDR64 bit, which is not exposed 20 def int_SI_tbuffer_store : Intrinsic < 21 [], 22 [llvm_anyint_ty, // rsrc(SGPR) 23 llvm_anyint_ty, // vdata(VGPR), overloaded for types i32, v2i32, v4i32 24 llvm_i32_ty, // num_channels(imm), selects opcode suffix: 1=X, 2=XY, 3=XYZ, 4=XYZW 25 llvm_i32_ty, // vaddr(VGPR) 26 llvm_i32_ty, // soffset(SGPR) 27 llvm_i32_ty, // inst_offset(imm) 28 llvm_i32_ty, // dfmt(imm) 29 llvm_i32_ty, // nfmt(imm) 30 llvm_i32_ty, // offen(imm) 31 llvm_i32_ty, // idxen(imm) 32 llvm_i32_ty, // glc(imm) 33 llvm_i32_ty, // slc(imm) 34 llvm_i32_ty], // tfe(imm) 35 []>; 36 37 // Fully-flexible BUFFER_LOAD_DWORD_* except for the ADDR64 bit, which is not exposed 38 def int_SI_buffer_load_dword : Intrinsic < 39 [llvm_anyint_ty], // vdata(VGPR), overloaded for types i32, v2i32, v4i32 40 [llvm_anyint_ty, // rsrc(SGPR) 41 llvm_anyint_ty, // vaddr(VGPR) 42 llvm_i32_ty, // soffset(SGPR) 43 llvm_i32_ty, // inst_offset(imm) 44 llvm_i32_ty, // offen(imm) 45 llvm_i32_ty, // idxen(imm) 46 llvm_i32_ty, // glc(imm) 47 llvm_i32_ty, // slc(imm) 48 llvm_i32_ty], // tfe(imm) 49 [IntrReadMem, IntrArgMemOnly]>; 50 51} // End TargetPrefix = "SI", isTarget = 1 52