1//===- LanaiRegisterInfo.td - Lanai Register defs ------------*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// Declarations that describe the Lanai register file 10//===----------------------------------------------------------------------===// 11 12// Registers are identified with 5-bit ID numbers. 13class LanaiReg<bits<5> num, string n, list<Register> subregs = [], 14 list<string> altNames = []> : Register<n, altNames> { 15 field bits<5> Num; 16 let Num = num; 17 let Namespace = "Lanai"; 18 let SubRegs = subregs; 19} 20 21let Namespace = "Lanai" in { 22 def sub_32 : SubRegIndex<32>; 23} 24 25// Integer registers 26foreach i = 0-31 in { 27 def R#i : LanaiReg<i, "r"#i>, DwarfRegNum<[i]>; 28} 29 30// Register aliases 31let SubRegIndices = [sub_32] in { 32 def PC : LanaiReg< 2, "pc", [R2]>, DwarfRegAlias<R2>; 33 def SP : LanaiReg< 4, "sp", [R4]>, DwarfRegAlias<R4>; 34 def FP : LanaiReg< 5, "fp", [R5]>, DwarfRegAlias<R5>; 35 def RV : LanaiReg< 8, "rv", [R8]>, DwarfRegAlias<R8>; 36 def RR1 : LanaiReg<10, "rr1", [R10]>, DwarfRegAlias<R10>; 37 def RR2 : LanaiReg<11, "rr2", [R11]>, DwarfRegAlias<R11>; 38 def RCA : LanaiReg<15, "rca", [R15]>, DwarfRegAlias<R15>; 39} 40 41// Define a status register to capture the dependencies between the set flag 42// and setcc instructions 43def SR : LanaiReg< 0, "sw">; 44 45// Register classes. 46def GPR : RegisterClass<"Lanai", [i32], 32, 47 (add R3, R9, R12, R13, R14, R16, R17, 48 (sequence "R%i", 20, 31), 49 R6, R7, R18, R19, // registers for passing arguments 50 R15, RCA, // register for constant addresses 51 R10, RR1, R11, RR2, // programmer controlled registers 52 R8, RV, // return value 53 R5, FP, // frame pointer 54 R4, SP, // stack pointer 55 R2, PC, // program counter 56 R1, // all 1s (0xffffffff) 57 R0 // constant 0 58 )>; 59 60// Condition code register class 61def CCR : RegisterClass<"Lanai", [i32], 32, (add SR)> { 62 let CopyCost = -1; // Don't allow copying of status registers 63 let isAllocatable = 0; 64} 65