1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -mtriple aarch64 -O0 -stop-after=instruction-select -global-isel -verify-machineinstrs %s -o - 2>&1 | FileCheck %s 3 4%dag = type { { { i8, { i8 } }, { { i8, { i8 } }, { i8 } } }, { { i8, { i8 } }, { i8 } } } 5 6define void @test_const(%dag* %dst) { 7 ; CHECK-LABEL: name: test_const 8 ; CHECK: bb.1.entry: 9 ; CHECK: liveins: $x0 10 ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0 11 ; CHECK: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 10 12 ; CHECK: [[MOVi32imm1:%[0-9]+]]:gpr32 = MOVi32imm 20 13 ; CHECK: [[MOVi32imm2:%[0-9]+]]:gpr32 = MOVi32imm 50 14 ; CHECK: STRBBui [[MOVi32imm]], [[COPY]], 0 :: (store 1 into %ir.dst) 15 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 1 :: (store 1 into %ir.dst + 1) 16 ; CHECK: STRBBui [[MOVi32imm]], [[COPY]], 2 :: (store 1 into %ir.dst + 2) 17 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 3 :: (store 1 into %ir.dst + 3) 18 ; CHECK: STRBBui [[MOVi32imm2]], [[COPY]], 4 :: (store 1 into %ir.dst + 4) 19 ; CHECK: STRBBui [[MOVi32imm]], [[COPY]], 5 :: (store 1 into %ir.dst + 5) 20 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 6 :: (store 1 into %ir.dst + 6) 21 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 7 :: (store 1 into %ir.dst + 7) 22 ; CHECK: STRBBui [[MOVi32imm]], [[COPY]], 0 :: (store 1 into %ir.dst) 23 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 1 :: (store 1 into %ir.dst + 1) 24 ; CHECK: STRBBui [[MOVi32imm]], [[COPY]], 2 :: (store 1 into %ir.dst + 2) 25 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 3 :: (store 1 into %ir.dst + 3) 26 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 4 :: (store 1 into %ir.dst + 4) 27 ; CHECK: STRBBui [[MOVi32imm]], [[COPY]], 5 :: (store 1 into %ir.dst + 5) 28 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 6 :: (store 1 into %ir.dst + 6) 29 ; CHECK: STRBBui [[MOVi32imm1]], [[COPY]], 7 :: (store 1 into %ir.dst + 7) 30 ; CHECK: RET_ReallyLR 31entry: 32 %updated = insertvalue 33 ; Check that we're visiting constants with shared parts 34 ; (deduplicated via LLVMContext, forming a proper DAG) correctly: 35 %dag { 36 { { i8, { i8 } }, { { i8, { i8 } }, { i8 } } } { 37 { i8, { i8 } } { 38 i8 10, 39 { i8 } { i8 20 } 40 }, 41 { { i8, { i8 } }, { i8 } } { 42 { i8, { i8 } } { 43 i8 10, 44 { i8 } { i8 20 } 45 }, 46 { i8 } { i8 20 } 47 } 48 }, 49 { { i8, { i8 } }, { i8 } } { 50 { i8, { i8 } } { 51 i8 10, 52 { i8 } { i8 20 } 53 }, 54 { i8 } { i8 20 } 55 } 56 }, 57 { { i8, { i8 } }, { i8 } } { 58 { i8, { i8 } } { 59 i8 10, 60 { i8 } { i8 20 } 61 }, 62 { i8 } { i8 50 } 63 }, 64 0, 65 1 66 store %dag %updated, %dag* %dst 67 ; 10, 20, 10, 20, 50, 10, 20, 20 sequence is expected 68 69 store 70 ; Check that we didn't overwrite a previously seen constant 71 ; while processing an insertvalue into it: 72 %dag { 73 { { i8, { i8 } }, { { i8, { i8 } }, { i8 } } } { 74 { i8, { i8 } } { 75 i8 10, 76 { i8 } { i8 20 } 77 }, 78 { { i8, { i8 } }, { i8 } } { 79 { i8, { i8 } } { 80 i8 10, 81 { i8 } { i8 20 } 82 }, 83 { i8 } { i8 20 } 84 } 85 }, 86 { { i8, { i8 } }, { i8 } } { 87 { i8, { i8 } } { 88 i8 10, 89 { i8 } { i8 20 } 90 }, 91 { i8 } { i8 20 } 92 } 93 }, 94 %dag* %dst 95 ; 10, 20, 10, 20, 20, 10, 20, 20 sequence is expected 96 ret void 97} 98