1; RUN: llc -mattr=avr6 < %s -march=avr | FileCheck %s 2 3; CHECK-LABEL: atomic_load16 4; CHECK: in r0, 63 5; CHECK-NEXT: cli 6; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]]+ 7; CHECK-NEXT: ld [[RR:r[0-9]+]], [[RD:(X|Y|Z)]] 8; CHECK-NEXT: out 63, r0 9define i16 @atomic_load16(i16* %foo) { 10 %val = load atomic i16, i16* %foo unordered, align 2 11 ret i16 %val 12} 13 14; CHECK-LABEL: atomic_load_swap16 15; CHECK: call __sync_lock_test_and_set_2 16define i16 @atomic_load_swap16(i16* %foo) { 17 %val = atomicrmw xchg i16* %foo, i16 13 seq_cst 18 ret i16 %val 19} 20 21; CHECK-LABEL: atomic_load_cmp_swap16 22; CHECK: call __sync_val_compare_and_swap_2 23define i16 @atomic_load_cmp_swap16(i16* %foo) { 24 %val = cmpxchg i16* %foo, i16 5, i16 10 acq_rel monotonic 25 %value_loaded = extractvalue { i16, i1 } %val, 0 26 ret i16 %value_loaded 27} 28 29; CHECK-LABEL: atomic_load_add16 30; CHECK: in r0, 63 31; CHECK-NEXT: cli 32; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+ 33; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]] 34; CHECK-NEXT: add [[RR1]], [[TMP:r[0-9]+]] 35; CHECK-NEXT: adc [[RR2]], [[TMP:r[0-9]+]] 36; CHECK-NEXT: st [[RD1]], [[RR1]] 37; CHECK-NEXT: std [[RD1]]+1, [[A:r[0-9]+]] 38; CHECK-NEXT: out 63, r0 39define i16 @atomic_load_add16(i16* %foo) { 40 %val = atomicrmw add i16* %foo, i16 13 seq_cst 41 ret i16 %val 42} 43 44; CHECK-LABEL: atomic_load_sub16 45; CHECK: in r0, 63 46; CHECK-NEXT: cli 47; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+ 48; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]] 49; CHECK-NEXT: sub [[RR1]], [[TMP:r[0-9]+]] 50; CHECK-NEXT: sbc [[RR2]], [[TMP:r[0-9]+]] 51; CHECK-NEXT: st [[RD1]], [[RR1]] 52; CHECK-NEXT: std [[RD1]]+1, [[A:r[0-9]+]] 53; CHECK-NEXT: out 63, r0 54define i16 @atomic_load_sub16(i16* %foo) { 55 %val = atomicrmw sub i16* %foo, i16 13 seq_cst 56 ret i16 %val 57} 58 59; CHECK-LABEL: atomic_load_and16 60; CHECK: in r0, 63 61; CHECK-NEXT: cli 62; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+ 63; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]] 64; CHECK-NEXT: and [[RR1]], [[TMP:r[0-9]+]] 65; CHECK-NEXT: and [[RR2]], [[TMP:r[0-9]+]] 66; CHECK-NEXT: st [[RD1]], [[RR1]] 67; CHECK-NEXT: std [[RD1]]+1, [[A:r[0-9]+]] 68; CHECK-NEXT: out 63, r0 69define i16 @atomic_load_and16(i16* %foo) { 70 %val = atomicrmw and i16* %foo, i16 13 seq_cst 71 ret i16 %val 72} 73 74; CHECK-LABEL: atomic_load_or16 75; CHECK: in r0, 63 76; CHECK-NEXT: cli 77; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+ 78; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]] 79; CHECK-NEXT: or [[RR1]], [[TMP:r[0-9]+]] 80; CHECK-NEXT: or [[RR2]], [[TMP:r[0-9]+]] 81; CHECK-NEXT: st [[RD1]], [[RR1]] 82; CHECK-NEXT: std [[RD1]]+1, [[A:r[0-9]+]] 83; CHECK-NEXT: out 63, r0 84define i16 @atomic_load_or16(i16* %foo) { 85 %val = atomicrmw or i16* %foo, i16 13 seq_cst 86 ret i16 %val 87} 88 89; CHECK-LABEL: atomic_load_xor16 90; CHECK: in r0, 63 91; CHECK-NEXT: cli 92; CHECK-NEXT: ld [[RR1:r[0-9]+]], [[RD1:(X|Y|Z)]]+ 93; CHECK-NEXT: ld [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]] 94; CHECK-NEXT: eor [[RR1]], [[TMP:r[0-9]+]] 95; CHECK-NEXT: eor [[RR2]], [[TMP:r[0-9]+]] 96; CHECK-NEXT: st [[RD1]], [[RR1]] 97; CHECK-NEXT: std [[RD1]]+1, [[A:r[0-9]+]] 98; CHECK-NEXT: out 63, r0 99define i16 @atomic_load_xor16(i16* %foo) { 100 %val = atomicrmw xor i16* %foo, i16 13 seq_cst 101 ret i16 %val 102} 103 104; CHECK-LABEL: atomic_load_nand16 105; CHECK: call __sync_fetch_and_nand_2 106define i16 @atomic_load_nand16(i16* %foo) { 107 %val = atomicrmw nand i16* %foo, i16 13 seq_cst 108 ret i16 %val 109} 110 111; CHECK-LABEL: atomic_load_max16 112; CHECK: call __sync_fetch_and_max_2 113define i16 @atomic_load_max16(i16* %foo) { 114 %val = atomicrmw max i16* %foo, i16 13 seq_cst 115 ret i16 %val 116} 117 118; CHECK-LABEL: atomic_load_min16 119; CHECK: call __sync_fetch_and_min_2 120define i16 @atomic_load_min16(i16* %foo) { 121 %val = atomicrmw min i16* %foo, i16 13 seq_cst 122 ret i16 %val 123} 124 125; CHECK-LABEL: atomic_load_umax16 126; CHECK: call __sync_fetch_and_umax_2 127define i16 @atomic_load_umax16(i16* %foo) { 128 %val = atomicrmw umax i16* %foo, i16 13 seq_cst 129 ret i16 %val 130} 131 132; CHECK-LABEL: atomic_load_umin16 133; CHECK: call __sync_fetch_and_umin_2 134define i16 @atomic_load_umin16(i16* %foo) { 135 %val = atomicrmw umin i16* %foo, i16 13 seq_cst 136 ret i16 %val 137} 138