1; RUN: llc -march=hexagon -disable-packetizer -hexagon-align-loads < %s | FileCheck %s 2 3; CHECK-LABEL: test_00: 4; CHECK-DAG: v[[V00:[0-9]+]] = vmem(r[[B00:[0-9]+]]+#0) 5; CHECK-DAG: v[[V01:[0-9]+]] = vmem(r[[B00]]+#1) 6; CHECK: valign(v[[V01]],v[[V00]],r[[B00]]) 7define void @test_00(<64 x i8>* %p, <64 x i8>* %q) #0 { 8 %v0 = load <64 x i8>, <64 x i8>* %p, align 1 9 store <64 x i8> %v0, <64 x i8>* %q, align 1 10 ret void 11} 12 13; CHECK-LABEL: test_01: 14; CHECK-DAG: v[[V10:[0-9]+]] = vmem(r[[B01:[0-9]+]]+#0) 15; CHECK-DAG: v[[V11:[0-9]+]] = vmem(r[[B01]]+#1) 16; CHECK-DAG: v[[V12:[0-9]+]] = vmem(r[[B01]]+#2) 17; CHECK: } 18; CHECK-DAG: valign(v[[V11]],v[[V10]],r[[B01]]) 19; CHECK-DAG: valign(v[[V12]],v[[V11]],r[[B01]]) 20define void @test_01(<128 x i8>* %p, <128 x i8>* %q) #0 { 21 %v0 = load <128 x i8>, <128 x i8>* %p, align 1 22 store <128 x i8> %v0, <128 x i8>* %q, align 1 23 ret void 24} 25 26attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" } 27